xref: /qemu/accel/tcg/watchpoint.c (revision 6ff5da16000f908140723e164d33a0b51a6c4162)
1 /*
2  * CPU watchpoints
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/main-loop.h"
22 #include "exec/breakpoint.h"
23 #include "exec/cpu-interrupt.h"
24 #include "exec/page-protection.h"
25 #include "exec/translation-block.h"
26 #include "system/tcg.h"
27 #include "system/replay.h"
28 #include "accel/tcg/cpu-ops.h"
29 #include "hw/core/cpu.h"
30 #include "internal-common.h"
31 
32 /*
33  * Return true if this watchpoint address matches the specified
34  * access (ie the address range covered by the watchpoint overlaps
35  * partially or completely with the address range covered by the
36  * access).
37  */
38 static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
39                                               vaddr addr, vaddr len)
40 {
41     /*
42      * We know the lengths are non-zero, but a little caution is
43      * required to avoid errors in the case where the range ends
44      * exactly at the top of the address space and so addr + len
45      * wraps round to zero.
46      */
47     vaddr wpend = wp->vaddr + wp->len - 1;
48     vaddr addrend = addr + len - 1;
49 
50     return !(addr > wpend || wp->vaddr > addrend);
51 }
52 
53 /* Return flags for watchpoints that match addr + prot.  */
54 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
55 {
56     CPUWatchpoint *wp;
57     int ret = 0;
58 
59     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
60         if (watchpoint_address_matches(wp, addr, len)) {
61             ret |= wp->flags;
62         }
63     }
64     return ret;
65 }
66 
67 /* Generate a debug exception if a watchpoint has been hit.  */
68 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
69                           MemTxAttrs attrs, int flags, uintptr_t ra)
70 {
71     CPUClass *cc = CPU_GET_CLASS(cpu);
72     CPUWatchpoint *wp;
73 
74     assert(tcg_enabled());
75     if (cpu->watchpoint_hit) {
76         /*
77          * We re-entered the check after replacing the TB.
78          * Now raise the debug interrupt so that it will
79          * trigger after the current instruction.
80          */
81         bql_lock();
82         cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
83         bql_unlock();
84         return;
85     }
86 
87     if (cc->tcg_ops->adjust_watchpoint_address) {
88         /* this is currently used only by ARM BE32 */
89         addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
90     }
91 
92     assert((flags & ~BP_MEM_ACCESS) == 0);
93     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
94         int hit_flags = wp->flags & flags;
95 
96         if (hit_flags && watchpoint_address_matches(wp, addr, len)) {
97             if (replay_running_debug()) {
98                 /*
99                  * replay_breakpoint reads icount.
100                  * Force recompile to succeed, because icount may
101                  * be read only at the end of the block.
102                  */
103                 if (!cpu->neg.can_do_io) {
104                     /* Force execution of one insn next time.  */
105                     cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
106                     cpu_loop_exit_restore(cpu, ra);
107                 }
108                 /*
109                  * Don't process the watchpoints when we are
110                  * in a reverse debugging operation.
111                  */
112                 replay_breakpoint();
113                 return;
114             }
115 
116             wp->flags |= hit_flags << BP_HIT_SHIFT;
117             wp->hitaddr = MAX(addr, wp->vaddr);
118             wp->hitattrs = attrs;
119 
120             if (wp->flags & BP_CPU
121                 && cc->tcg_ops->debug_check_watchpoint
122                 && !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
123                 wp->flags &= ~BP_WATCHPOINT_HIT;
124                 continue;
125             }
126             cpu->watchpoint_hit = wp;
127 
128             mmap_lock();
129             /* This call also restores vCPU state */
130             tb_check_watchpoint(cpu, ra);
131             if (wp->flags & BP_STOP_BEFORE_ACCESS) {
132                 cpu->exception_index = EXCP_DEBUG;
133                 mmap_unlock();
134                 cpu_loop_exit(cpu);
135             } else {
136                 /* Force execution of one insn next time.  */
137                 cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
138                 mmap_unlock();
139                 cpu_loop_exit_noexc(cpu);
140             }
141         } else {
142             wp->flags &= ~BP_WATCHPOINT_HIT;
143         }
144     }
145 }
146