xref: /qemu/accel/tcg/watchpoint.c (revision 513823e7521a09ed7ad1e32e6454bac3b2cbf52d)
1 /*
2  * CPU watchpoints
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/main-loop.h"
22 #include "qemu/error-report.h"
23 #include "exec/exec-all.h"
24 #include "exec/page-protection.h"
25 #include "exec/translation-block.h"
26 #include "tb-internal.h"
27 #include "system/tcg.h"
28 #include "system/replay.h"
29 #include "hw/core/tcg-cpu-ops.h"
30 #include "hw/core/cpu.h"
31 #include "internal-common.h"
32 
33 /*
34  * Return true if this watchpoint address matches the specified
35  * access (ie the address range covered by the watchpoint overlaps
36  * partially or completely with the address range covered by the
37  * access).
38  */
39 static inline bool watchpoint_address_matches(CPUWatchpoint *wp,
40                                               vaddr addr, vaddr len)
41 {
42     /*
43      * We know the lengths are non-zero, but a little caution is
44      * required to avoid errors in the case where the range ends
45      * exactly at the top of the address space and so addr + len
46      * wraps round to zero.
47      */
48     vaddr wpend = wp->vaddr + wp->len - 1;
49     vaddr addrend = addr + len - 1;
50 
51     return !(addr > wpend || wp->vaddr > addrend);
52 }
53 
54 /* Return flags for watchpoints that match addr + prot.  */
55 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len)
56 {
57     CPUWatchpoint *wp;
58     int ret = 0;
59 
60     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
61         if (watchpoint_address_matches(wp, addr, len)) {
62             ret |= wp->flags;
63         }
64     }
65     return ret;
66 }
67 
68 /* Generate a debug exception if a watchpoint has been hit.  */
69 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
70                           MemTxAttrs attrs, int flags, uintptr_t ra)
71 {
72     CPUClass *cc = CPU_GET_CLASS(cpu);
73     CPUWatchpoint *wp;
74 
75     assert(tcg_enabled());
76     if (cpu->watchpoint_hit) {
77         /*
78          * We re-entered the check after replacing the TB.
79          * Now raise the debug interrupt so that it will
80          * trigger after the current instruction.
81          */
82         bql_lock();
83         cpu_interrupt(cpu, CPU_INTERRUPT_DEBUG);
84         bql_unlock();
85         return;
86     }
87 
88     if (cc->tcg_ops->adjust_watchpoint_address) {
89         /* this is currently used only by ARM BE32 */
90         addr = cc->tcg_ops->adjust_watchpoint_address(cpu, addr, len);
91     }
92 
93     assert((flags & ~BP_MEM_ACCESS) == 0);
94     QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
95         int hit_flags = wp->flags & flags;
96 
97         if (hit_flags && watchpoint_address_matches(wp, addr, len)) {
98             if (replay_running_debug()) {
99                 /*
100                  * replay_breakpoint reads icount.
101                  * Force recompile to succeed, because icount may
102                  * be read only at the end of the block.
103                  */
104                 if (!cpu->neg.can_do_io) {
105                     /* Force execution of one insn next time.  */
106                     cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
107                     cpu_loop_exit_restore(cpu, ra);
108                 }
109                 /*
110                  * Don't process the watchpoints when we are
111                  * in a reverse debugging operation.
112                  */
113                 replay_breakpoint();
114                 return;
115             }
116 
117             wp->flags |= hit_flags << BP_HIT_SHIFT;
118             wp->hitaddr = MAX(addr, wp->vaddr);
119             wp->hitattrs = attrs;
120 
121             if (wp->flags & BP_CPU
122                 && cc->tcg_ops->debug_check_watchpoint
123                 && !cc->tcg_ops->debug_check_watchpoint(cpu, wp)) {
124                 wp->flags &= ~BP_WATCHPOINT_HIT;
125                 continue;
126             }
127             cpu->watchpoint_hit = wp;
128 
129             mmap_lock();
130             /* This call also restores vCPU state */
131             tb_check_watchpoint(cpu, ra);
132             if (wp->flags & BP_STOP_BEFORE_ACCESS) {
133                 cpu->exception_index = EXCP_DEBUG;
134                 mmap_unlock();
135                 cpu_loop_exit(cpu);
136             } else {
137                 /* Force execution of one insn next time.  */
138                 cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
139                 mmap_unlock();
140                 cpu_loop_exit_noexc(cpu);
141             }
142         } else {
143             wp->flags &= ~BP_WATCHPOINT_HIT;
144         }
145     }
146 }
147