1[ 2 { 3 "BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page size.", 4 "Counter": "0,1,2,3,4,5,6,7", 5 "EventCode": "0x08", 6 "EventName": "DTLB_LOAD_MISSES.WALK_COMPLETED", 7 "PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetches) whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.", 8 "SampleAfterValue": "1000003", 9 "UMask": "0xe" 10 }, 11 { 12 "BriefDescription": "Counts the number of page walks completed due to store DTLB misses to any page size.", 13 "Counter": "0,1,2,3,4,5,6,7", 14 "EventCode": "0x49", 15 "EventName": "DTLB_STORE_MISSES.WALK_COMPLETED", 16 "PublicDescription": "Counts the number of page walks completed due to stores whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.", 17 "SampleAfterValue": "1000003", 18 "UMask": "0xe" 19 }, 20 { 21 "BriefDescription": "Counts the number of page walks completed due to instruction fetch misses to any page size.", 22 "Counter": "0,1,2,3,4,5,6,7", 23 "EventCode": "0x85", 24 "EventName": "ITLB_MISSES.WALK_COMPLETED", 25 "PublicDescription": "Counts the number of page walks completed due to instruction fetches whose address translations missed in all Translation Lookaside Buffer (TLB) levels and were mapped to any page size. Includes page walks that page fault.", 26 "SampleAfterValue": "1000003", 27 "UMask": "0xe" 28 } 29] 30