1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2 // 3 // This file is provided under a dual BSD/GPLv2 license. When using or 4 // redistributing this file, you may do so under either license. 5 // 6 // Copyright(c) 2021 Intel Corporation 7 // 8 // 9 10 #include <sound/pcm_params.h> 11 #include "ipc3-priv.h" 12 #include "ops.h" 13 #include "sof-priv.h" 14 #include "sof-audio.h" 15 16 static int sof_ipc3_pcm_hw_free(struct snd_soc_component *component, 17 struct snd_pcm_substream *substream) 18 { 19 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 20 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 21 struct sof_ipc_stream stream; 22 struct snd_sof_pcm *spcm; 23 24 spcm = snd_sof_find_spcm_dai(component, rtd); 25 if (!spcm) 26 return -EINVAL; 27 28 if (!spcm->prepared[substream->stream]) 29 return 0; 30 31 stream.hdr.size = sizeof(stream); 32 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_FREE; 33 stream.comp_id = spcm->stream[substream->stream].comp_id; 34 35 /* send IPC to the DSP */ 36 return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream)); 37 } 38 39 static int sof_ipc3_pcm_hw_params(struct snd_soc_component *component, 40 struct snd_pcm_substream *substream, 41 struct snd_pcm_hw_params *params, 42 struct snd_sof_platform_stream_params *platform_params) 43 { 44 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 45 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 46 struct sof_ipc_fw_version *v = &sdev->fw_ready.version; 47 struct snd_pcm_runtime *runtime = substream->runtime; 48 struct sof_ipc_pcm_params_reply ipc_params_reply; 49 struct sof_ipc_pcm_params pcm; 50 struct snd_sof_pcm *spcm; 51 int ret; 52 53 spcm = snd_sof_find_spcm_dai(component, rtd); 54 if (!spcm) 55 return -EINVAL; 56 57 memset(&pcm, 0, sizeof(pcm)); 58 59 /* number of pages should be rounded up */ 60 pcm.params.buffer.pages = PFN_UP(runtime->dma_bytes); 61 62 /* set IPC PCM parameters */ 63 pcm.hdr.size = sizeof(pcm); 64 pcm.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_PCM_PARAMS; 65 pcm.comp_id = spcm->stream[substream->stream].comp_id; 66 pcm.params.hdr.size = sizeof(pcm.params); 67 pcm.params.buffer.phy_addr = spcm->stream[substream->stream].page_table.addr; 68 pcm.params.buffer.size = runtime->dma_bytes; 69 pcm.params.direction = substream->stream; 70 pcm.params.sample_valid_bytes = params_width(params) >> 3; 71 pcm.params.buffer_fmt = SOF_IPC_BUFFER_INTERLEAVED; 72 pcm.params.rate = params_rate(params); 73 pcm.params.channels = params_channels(params); 74 pcm.params.host_period_bytes = params_period_bytes(params); 75 76 /* container size */ 77 ret = snd_pcm_format_physical_width(params_format(params)); 78 if (ret < 0) 79 return ret; 80 pcm.params.sample_container_bytes = ret >> 3; 81 82 /* format */ 83 switch (params_format(params)) { 84 case SNDRV_PCM_FORMAT_S16: 85 pcm.params.frame_fmt = SOF_IPC_FRAME_S16_LE; 86 break; 87 case SNDRV_PCM_FORMAT_S24: 88 pcm.params.frame_fmt = SOF_IPC_FRAME_S24_4LE; 89 break; 90 case SNDRV_PCM_FORMAT_S32: 91 pcm.params.frame_fmt = SOF_IPC_FRAME_S32_LE; 92 break; 93 case SNDRV_PCM_FORMAT_FLOAT: 94 pcm.params.frame_fmt = SOF_IPC_FRAME_FLOAT; 95 break; 96 default: 97 return -EINVAL; 98 } 99 100 /* Update the IPC message with information from the platform */ 101 pcm.params.stream_tag = platform_params->stream_tag; 102 103 if (platform_params->use_phy_address) 104 pcm.params.buffer.phy_addr = platform_params->phy_addr; 105 106 if (platform_params->no_ipc_position) { 107 /* For older ABIs set host_period_bytes to zero to inform 108 * FW we don't want position updates. Newer versions use 109 * no_stream_position for this purpose. 110 */ 111 if (v->abi_version < SOF_ABI_VER(3, 10, 0)) 112 pcm.params.host_period_bytes = 0; 113 else 114 pcm.params.no_stream_position = 1; 115 } 116 117 if (platform_params->cont_update_posn) 118 pcm.params.cont_update_posn = 1; 119 120 spcm_dbg(spcm, substream->stream, "stream_tag %d\n", 121 pcm.params.stream_tag); 122 123 /* send hw_params IPC to the DSP */ 124 ret = sof_ipc_tx_message(sdev->ipc, &pcm, sizeof(pcm), 125 &ipc_params_reply, sizeof(ipc_params_reply)); 126 if (ret < 0) { 127 spcm_err(spcm, substream->stream, 128 "STREAM_PCM_PARAMS ipc failed for stream_tag %d\n", 129 pcm.params.stream_tag); 130 return ret; 131 } 132 133 ret = snd_sof_set_stream_data_offset(sdev, &spcm->stream[substream->stream], 134 ipc_params_reply.posn_offset); 135 if (ret < 0) { 136 spcm_err(spcm, substream->stream, "invalid stream data offset\n"); 137 return ret; 138 } 139 140 return ret; 141 } 142 143 static int sof_ipc3_pcm_trigger(struct snd_soc_component *component, 144 struct snd_pcm_substream *substream, int cmd) 145 { 146 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); 147 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 148 struct sof_ipc_stream stream; 149 struct snd_sof_pcm *spcm; 150 151 spcm = snd_sof_find_spcm_dai(component, rtd); 152 if (!spcm) 153 return -EINVAL; 154 155 stream.hdr.size = sizeof(stream); 156 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG; 157 stream.comp_id = spcm->stream[substream->stream].comp_id; 158 159 switch (cmd) { 160 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 161 stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_PAUSE; 162 break; 163 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 164 stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_RELEASE; 165 break; 166 case SNDRV_PCM_TRIGGER_START: 167 stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_START; 168 break; 169 case SNDRV_PCM_TRIGGER_SUSPEND: 170 fallthrough; 171 case SNDRV_PCM_TRIGGER_STOP: 172 stream.hdr.cmd |= SOF_IPC_STREAM_TRIG_STOP; 173 break; 174 default: 175 spcm_err(spcm, substream->stream, "Unhandled trigger cmd %d\n", cmd); 176 return -EINVAL; 177 } 178 179 /* send IPC to the DSP */ 180 return sof_ipc_tx_message_no_reply(sdev->ipc, &stream, sizeof(stream)); 181 } 182 183 static void ssp_dai_config_pcm_params_match(struct snd_sof_dev *sdev, const char *link_name, 184 struct snd_pcm_hw_params *params) 185 { 186 struct sof_ipc_dai_config *config; 187 struct snd_sof_dai *dai; 188 int i; 189 190 /* 191 * Search for all matching DAIs as we can have both playback and capture DAI 192 * associated with the same link. 193 */ 194 list_for_each_entry(dai, &sdev->dai_list, list) { 195 if (!dai->name || strcmp(link_name, dai->name)) 196 continue; 197 for (i = 0; i < dai->number_configs; i++) { 198 struct sof_dai_private_data *private = dai->private; 199 200 config = &private->dai_config[i]; 201 if (config->ssp.fsync_rate == params_rate(params)) { 202 dev_dbg(sdev->dev, "DAI config %d matches pcm hw params\n", i); 203 dai->current_config = i; 204 break; 205 } 206 } 207 } 208 } 209 210 static int sof_ipc3_pcm_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, 211 struct snd_pcm_hw_params *params) 212 { 213 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, SOF_AUDIO_PCM_DRV_NAME); 214 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 215 struct snd_sof_dai *dai = snd_sof_find_dai(component, (char *)rtd->dai_link->name); 216 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 217 struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); 218 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(component); 219 struct sof_dai_private_data *private; 220 struct snd_soc_dpcm *dpcm; 221 222 if (!dai) { 223 dev_err(component->dev, "%s: No DAI found with name %s\n", __func__, 224 rtd->dai_link->name); 225 return -EINVAL; 226 } 227 228 private = dai->private; 229 if (!private) { 230 dev_err(component->dev, "%s: No private data found for DAI %s\n", __func__, 231 rtd->dai_link->name); 232 return -EINVAL; 233 } 234 235 /* read format from topology */ 236 snd_mask_none(fmt); 237 238 switch (private->comp_dai->config.frame_fmt) { 239 case SOF_IPC_FRAME_S16_LE: 240 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE); 241 break; 242 case SOF_IPC_FRAME_S24_4LE: 243 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE); 244 break; 245 case SOF_IPC_FRAME_S32_LE: 246 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE); 247 break; 248 default: 249 dev_err(component->dev, "No available DAI format!\n"); 250 return -EINVAL; 251 } 252 253 /* read rate and channels from topology */ 254 switch (private->dai_config->type) { 255 case SOF_DAI_INTEL_SSP: 256 /* search for config to pcm params match, if not found use default */ 257 ssp_dai_config_pcm_params_match(sdev, (char *)rtd->dai_link->name, params); 258 259 rate->min = private->dai_config[dai->current_config].ssp.fsync_rate; 260 rate->max = private->dai_config[dai->current_config].ssp.fsync_rate; 261 channels->min = private->dai_config[dai->current_config].ssp.tdm_slots; 262 channels->max = private->dai_config[dai->current_config].ssp.tdm_slots; 263 264 dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max); 265 dev_dbg(component->dev, "channels_min: %d channels_max: %d\n", 266 channels->min, channels->max); 267 268 break; 269 case SOF_DAI_INTEL_DMIC: 270 /* DMIC only supports 16 or 32 bit formats */ 271 if (private->comp_dai->config.frame_fmt == SOF_IPC_FRAME_S24_4LE) { 272 dev_err(component->dev, "Invalid fmt %d for DAI type %d\n", 273 private->comp_dai->config.frame_fmt, 274 private->dai_config->type); 275 } 276 break; 277 case SOF_DAI_INTEL_HDA: 278 /* 279 * HDAudio does not follow the default trigger 280 * sequence due to firmware implementation 281 */ 282 for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) { 283 struct snd_soc_pcm_runtime *fe = dpcm->fe; 284 285 fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] = 286 SND_SOC_DPCM_TRIGGER_POST; 287 } 288 break; 289 case SOF_DAI_INTEL_ALH: 290 /* 291 * Dai could run with different channel count compared with 292 * front end, so get dai channel count from topology 293 */ 294 channels->min = private->dai_config->alh.channels; 295 channels->max = private->dai_config->alh.channels; 296 break; 297 case SOF_DAI_IMX_ESAI: 298 rate->min = private->dai_config->esai.fsync_rate; 299 rate->max = private->dai_config->esai.fsync_rate; 300 channels->min = private->dai_config->esai.tdm_slots; 301 channels->max = private->dai_config->esai.tdm_slots; 302 303 dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max); 304 dev_dbg(component->dev, "channels_min: %d channels_max: %d\n", 305 channels->min, channels->max); 306 break; 307 case SOF_DAI_MEDIATEK_AFE: 308 rate->min = private->dai_config->afe.rate; 309 rate->max = private->dai_config->afe.rate; 310 channels->min = private->dai_config->afe.channels; 311 channels->max = private->dai_config->afe.channels; 312 313 snd_mask_none(fmt); 314 315 switch (private->dai_config->afe.format) { 316 case SOF_IPC_FRAME_S16_LE: 317 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S16_LE); 318 break; 319 case SOF_IPC_FRAME_S24_4LE: 320 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S24_LE); 321 break; 322 case SOF_IPC_FRAME_S32_LE: 323 snd_mask_set_format(fmt, SNDRV_PCM_FORMAT_S32_LE); 324 break; 325 default: 326 dev_err(component->dev, "Not available format!\n"); 327 return -EINVAL; 328 } 329 330 dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max); 331 dev_dbg(component->dev, "channels_min: %d channels_max: %d\n", 332 channels->min, channels->max); 333 break; 334 case SOF_DAI_IMX_SAI: 335 rate->min = private->dai_config->sai.fsync_rate; 336 rate->max = private->dai_config->sai.fsync_rate; 337 channels->min = private->dai_config->sai.tdm_slots; 338 channels->max = private->dai_config->sai.tdm_slots; 339 340 dev_dbg(component->dev, "rate_min: %d rate_max: %d\n", rate->min, rate->max); 341 dev_dbg(component->dev, "channels_min: %d channels_max: %d\n", 342 channels->min, channels->max); 343 break; 344 case SOF_DAI_AMD_BT: 345 rate->min = private->dai_config->acpbt.fsync_rate; 346 rate->max = private->dai_config->acpbt.fsync_rate; 347 channels->min = private->dai_config->acpbt.tdm_slots; 348 channels->max = private->dai_config->acpbt.tdm_slots; 349 350 dev_dbg(component->dev, 351 "AMD_BT rate_min: %d rate_max: %d\n", rate->min, rate->max); 352 dev_dbg(component->dev, "AMD_BT channels_min: %d channels_max: %d\n", 353 channels->min, channels->max); 354 break; 355 case SOF_DAI_AMD_SP: 356 case SOF_DAI_AMD_SP_VIRTUAL: 357 rate->min = private->dai_config->acpsp.fsync_rate; 358 rate->max = private->dai_config->acpsp.fsync_rate; 359 channels->min = private->dai_config->acpsp.tdm_slots; 360 channels->max = private->dai_config->acpsp.tdm_slots; 361 362 dev_dbg(component->dev, 363 "AMD_SP rate_min: %d rate_max: %d\n", rate->min, rate->max); 364 dev_dbg(component->dev, "AMD_SP channels_min: %d channels_max: %d\n", 365 channels->min, channels->max); 366 break; 367 case SOF_DAI_AMD_HS: 368 case SOF_DAI_AMD_HS_VIRTUAL: 369 rate->min = private->dai_config->acphs.fsync_rate; 370 rate->max = private->dai_config->acphs.fsync_rate; 371 channels->min = private->dai_config->acphs.tdm_slots; 372 channels->max = private->dai_config->acphs.tdm_slots; 373 374 dev_dbg(component->dev, 375 "AMD_HS channel_max: %d rate_max: %d\n", channels->max, rate->max); 376 break; 377 case SOF_DAI_AMD_DMIC: 378 rate->min = private->dai_config->acpdmic.pdm_rate; 379 rate->max = private->dai_config->acpdmic.pdm_rate; 380 channels->min = private->dai_config->acpdmic.pdm_ch; 381 channels->max = private->dai_config->acpdmic.pdm_ch; 382 383 dev_dbg(component->dev, 384 "AMD_DMIC rate_min: %d rate_max: %d\n", rate->min, rate->max); 385 dev_dbg(component->dev, "AMD_DMIC channels_min: %d channels_max: %d\n", 386 channels->min, channels->max); 387 break; 388 case SOF_DAI_IMX_MICFIL: 389 rate->min = private->dai_config->micfil.pdm_rate; 390 rate->max = private->dai_config->micfil.pdm_rate; 391 channels->min = private->dai_config->micfil.pdm_ch; 392 channels->max = private->dai_config->micfil.pdm_ch; 393 394 dev_dbg(component->dev, 395 "MICFIL PDM rate_min: %d rate_max: %d\n", rate->min, rate->max); 396 dev_dbg(component->dev, "MICFIL PDM channels_min: %d channels_max: %d\n", 397 channels->min, channels->max); 398 break; 399 case SOF_DAI_AMD_SDW: 400 /* change the default trigger sequence as per HW implementation */ 401 for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_PLAYBACK, dpcm) { 402 struct snd_soc_pcm_runtime *fe = dpcm->fe; 403 404 fe->dai_link->trigger[SNDRV_PCM_STREAM_PLAYBACK] = 405 SND_SOC_DPCM_TRIGGER_POST; 406 } 407 408 for_each_dpcm_fe(rtd, SNDRV_PCM_STREAM_CAPTURE, dpcm) { 409 struct snd_soc_pcm_runtime *fe = dpcm->fe; 410 411 fe->dai_link->trigger[SNDRV_PCM_STREAM_CAPTURE] = 412 SND_SOC_DPCM_TRIGGER_POST; 413 } 414 rate->min = private->dai_config->acp_sdw.rate; 415 rate->max = private->dai_config->acp_sdw.rate; 416 channels->min = private->dai_config->acp_sdw.channels; 417 channels->max = private->dai_config->acp_sdw.channels; 418 419 dev_dbg(component->dev, 420 "AMD_SDW rate_min: %d rate_max: %d\n", rate->min, rate->max); 421 dev_dbg(component->dev, "AMD_SDW channels_min: %d channels_max: %d\n", 422 channels->min, channels->max); 423 break; 424 default: 425 dev_err(component->dev, "Invalid DAI type %d\n", private->dai_config->type); 426 break; 427 } 428 429 return 0; 430 } 431 432 const struct sof_ipc_pcm_ops ipc3_pcm_ops = { 433 .hw_params = sof_ipc3_pcm_hw_params, 434 .hw_free = sof_ipc3_pcm_hw_free, 435 .trigger = sof_ipc3_pcm_trigger, 436 .dai_link_fixup = sof_ipc3_pcm_dai_link_fixup, 437 .reset_hw_params_during_stop = true, 438 .d0i3_supported_in_s0ix = true, 439 }; 440