1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Universal Flash Storage Host controller driver
4  * Copyright (C) 2011-2013 Samsung India Software Operations
5  *
6  * Authors:
7  *	Santosh Yaraganavi <santosh.sy@samsung.com>
8  *	Vinayak Holikatti <h.vinayak@samsung.com>
9  */
10 
11 #ifndef _UFS_H
12 #define _UFS_H
13 
14 #include <linux/bitops.h>
15 #include <linux/types.h>
16 #include <uapi/scsi/scsi_bsg_ufs.h>
17 #include <linux/time64.h>
18 
19 /*
20  * Using static_assert() is not allowed in UAPI header files. Hence the check
21  * in this header file of the size of struct utp_upiu_header.
22  */
23 static_assert(sizeof(struct utp_upiu_header) == 12);
24 
25 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
26 #define QUERY_DESC_MAX_SIZE       255
27 #define QUERY_DESC_MIN_SIZE       2
28 #define QUERY_DESC_HDR_SIZE       2
29 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
30 					(sizeof(struct utp_upiu_header)))
31 #define UFS_SENSE_SIZE	18
32 
33 /*
34  * UFS device may have standard LUs and LUN id could be from 0x00 to
35  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
36  * UFS device may also have the Well Known LUs (also referred as W-LU)
37  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
38  * the "Extended Addressing Format" which means the W-LUNs would be
39  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
40  * This means max. LUN number reported from UFS device could be 0xC17F.
41  */
42 #define UFS_UPIU_MAX_UNIT_NUM_ID	0x7F
43 #define UFS_MAX_LUNS		(SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
44 #define UFS_UPIU_WLUN_ID	(1 << 7)
45 
46 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
47 #define UFS_UPIU_MAX_WB_LUN_ID	8
48 
49 /*
50  * WriteBooster buffer lifetime has a limit setted by vendor.
51  * If it is over the limit, WriteBooster feature will be disabled.
52  */
53 #define UFS_WB_EXCEED_LIFETIME		0x0B
54 
55 /*
56  * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet
57  */
58 #define EHS_OFFSET_IN_RESPONSE 32
59 
60 /* Well known logical unit id in LUN field of UPIU */
61 enum {
62 	UFS_UPIU_REPORT_LUNS_WLUN	= 0x81,
63 	UFS_UPIU_UFS_DEVICE_WLUN	= 0xD0,
64 	UFS_UPIU_BOOT_WLUN		= 0xB0,
65 	UFS_UPIU_RPMB_WLUN		= 0xC4,
66 };
67 
68 /*
69  * UFS Protocol Information Unit related definitions
70  */
71 
72 /* Task management functions */
73 enum {
74 	UFS_ABORT_TASK		= 0x01,
75 	UFS_ABORT_TASK_SET	= 0x02,
76 	UFS_CLEAR_TASK_SET	= 0x04,
77 	UFS_LOGICAL_RESET	= 0x08,
78 	UFS_QUERY_TASK		= 0x80,
79 	UFS_QUERY_TASK_SET	= 0x81,
80 };
81 
82 /* UTP UPIU Transaction Codes Initiator to Target */
83 enum upiu_request_transaction {
84 	UPIU_TRANSACTION_NOP_OUT	= 0x00,
85 	UPIU_TRANSACTION_COMMAND	= 0x01,
86 	UPIU_TRANSACTION_DATA_OUT	= 0x02,
87 	UPIU_TRANSACTION_TASK_REQ	= 0x04,
88 	UPIU_TRANSACTION_QUERY_REQ	= 0x16,
89 };
90 
91 /* UTP UPIU Transaction Codes Target to Initiator */
92 enum upiu_response_transaction {
93 	UPIU_TRANSACTION_NOP_IN		= 0x20,
94 	UPIU_TRANSACTION_RESPONSE	= 0x21,
95 	UPIU_TRANSACTION_DATA_IN	= 0x22,
96 	UPIU_TRANSACTION_TASK_RSP	= 0x24,
97 	UPIU_TRANSACTION_READY_XFER	= 0x31,
98 	UPIU_TRANSACTION_QUERY_RSP	= 0x36,
99 	UPIU_TRANSACTION_REJECT_UPIU	= 0x3F,
100 };
101 
102 /* UPIU Read/Write flags. See also table "UPIU Flags" in the UFS standard. */
103 enum {
104 	UPIU_CMD_FLAGS_NONE	= 0x00,
105 	UPIU_CMD_FLAGS_CP	= 0x04,
106 	UPIU_CMD_FLAGS_WRITE	= 0x20,
107 	UPIU_CMD_FLAGS_READ	= 0x40,
108 };
109 
110 /* UPIU response flags */
111 enum {
112 	UPIU_RSP_FLAG_UNDERFLOW	= 0x20,
113 	UPIU_RSP_FLAG_OVERFLOW	= 0x40,
114 };
115 
116 /* UPIU Task Attributes */
117 enum {
118 	UPIU_TASK_ATTR_SIMPLE	= 0x00,
119 	UPIU_TASK_ATTR_ORDERED	= 0x01,
120 	UPIU_TASK_ATTR_HEADQ	= 0x02,
121 	UPIU_TASK_ATTR_ACA	= 0x03,
122 };
123 
124 /* UPIU Query request function */
125 enum {
126 	UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
127 	UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
128 };
129 
130 /* Flag idn for Query Requests*/
131 enum flag_idn {
132 	QUERY_FLAG_IDN_FDEVICEINIT			= 0x01,
133 	QUERY_FLAG_IDN_PERMANENT_WPE			= 0x02,
134 	QUERY_FLAG_IDN_PWR_ON_WPE			= 0x03,
135 	QUERY_FLAG_IDN_BKOPS_EN				= 0x04,
136 	QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE		= 0x05,
137 	QUERY_FLAG_IDN_PURGE_ENABLE			= 0x06,
138 	QUERY_FLAG_IDN_RESERVED2			= 0x07,
139 	QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL		= 0x08,
140 	QUERY_FLAG_IDN_BUSY_RTC				= 0x09,
141 	QUERY_FLAG_IDN_RESERVED3			= 0x0A,
142 	QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE	= 0x0B,
143 	QUERY_FLAG_IDN_WB_EN                            = 0x0E,
144 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
145 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
146 	QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
147 	QUERY_FLAG_IDN_HPB_EN				= 0x12,
148 };
149 
150 /* Attribute idn for Query requests */
151 enum attr_idn {
152 	QUERY_ATTR_IDN_BOOT_LU_EN		= 0x00,
153 	QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD	= 0x01,
154 	QUERY_ATTR_IDN_POWER_MODE		= 0x02,
155 	QUERY_ATTR_IDN_ACTIVE_ICC_LVL		= 0x03,
156 	QUERY_ATTR_IDN_OOO_DATA_EN		= 0x04,
157 	QUERY_ATTR_IDN_BKOPS_STATUS		= 0x05,
158 	QUERY_ATTR_IDN_PURGE_STATUS		= 0x06,
159 	QUERY_ATTR_IDN_MAX_DATA_IN		= 0x07,
160 	QUERY_ATTR_IDN_MAX_DATA_OUT		= 0x08,
161 	QUERY_ATTR_IDN_DYN_CAP_NEEDED		= 0x09,
162 	QUERY_ATTR_IDN_REF_CLK_FREQ		= 0x0A,
163 	QUERY_ATTR_IDN_CONF_DESC_LOCK		= 0x0B,
164 	QUERY_ATTR_IDN_MAX_NUM_OF_RTT		= 0x0C,
165 	QUERY_ATTR_IDN_EE_CONTROL		= 0x0D,
166 	QUERY_ATTR_IDN_EE_STATUS		= 0x0E,
167 	QUERY_ATTR_IDN_SECONDS_PASSED		= 0x0F,
168 	QUERY_ATTR_IDN_CNTX_CONF		= 0x10,
169 	QUERY_ATTR_IDN_CORR_PRG_BLK_NUM		= 0x11,
170 	QUERY_ATTR_IDN_RESERVED2		= 0x12,
171 	QUERY_ATTR_IDN_RESERVED3		= 0x13,
172 	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
173 	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
174 	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
175 	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
176 	QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
177 	QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
178 	QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
179 	QUERY_ATTR_IDN_WB_FLUSH_STATUS	        = 0x1C,
180 	QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
181 	QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
182 	QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
183 	QUERY_ATTR_IDN_TIMESTAMP		= 0x30,
184 	QUERY_ATTR_IDN_DEV_LVL_EXCEPTION_ID     = 0x34,
185 	QUERY_ATTR_IDN_WB_BUF_RESIZE_HINT	= 0x3C,
186 	QUERY_ATTR_IDN_WB_BUF_RESIZE_EN		= 0x3D,
187 	QUERY_ATTR_IDN_WB_BUF_RESIZE_STATUS	= 0x3E,
188 };
189 
190 /* Descriptor idn for Query requests */
191 enum desc_idn {
192 	QUERY_DESC_IDN_DEVICE		= 0x0,
193 	QUERY_DESC_IDN_CONFIGURATION	= 0x1,
194 	QUERY_DESC_IDN_UNIT		= 0x2,
195 	QUERY_DESC_IDN_RFU_0		= 0x3,
196 	QUERY_DESC_IDN_INTERCONNECT	= 0x4,
197 	QUERY_DESC_IDN_STRING		= 0x5,
198 	QUERY_DESC_IDN_RFU_1		= 0x6,
199 	QUERY_DESC_IDN_GEOMETRY		= 0x7,
200 	QUERY_DESC_IDN_POWER		= 0x8,
201 	QUERY_DESC_IDN_HEALTH           = 0x9,
202 	QUERY_DESC_IDN_MAX,
203 };
204 
205 enum desc_header_offset {
206 	QUERY_DESC_LENGTH_OFFSET	= 0x00,
207 	QUERY_DESC_DESC_TYPE_OFFSET	= 0x01,
208 };
209 
210 /* Unit descriptor parameters offsets in bytes*/
211 enum unit_desc_param {
212 	UNIT_DESC_PARAM_LEN			= 0x0,
213 	UNIT_DESC_PARAM_TYPE			= 0x1,
214 	UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
215 	UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
216 	UNIT_DESC_PARAM_BOOT_LUN_ID		= 0x4,
217 	UNIT_DESC_PARAM_LU_WR_PROTECT		= 0x5,
218 	UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
219 	UNIT_DESC_PARAM_PSA_SENSITIVE		= 0x7,
220 	UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
221 	UNIT_DESC_PARAM_DATA_RELIABILITY	= 0x9,
222 	UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
223 	UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
224 	UNIT_DESC_PARAM_ERASE_BLK_SIZE		= 0x13,
225 	UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
226 	UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
227 	UNIT_DESC_PARAM_CTX_CAPABILITIES	= 0x20,
228 	UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1	= 0x22,
229 	UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS	= 0x23,
230 	UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF	= 0x25,
231 	UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS	= 0x27,
232 	UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS	= 0x29,
233 };
234 
235 /* RPMB Unit descriptor parameters offsets in bytes*/
236 enum rpmb_unit_desc_param {
237 	RPMB_UNIT_DESC_PARAM_LEN		= 0x0,
238 	RPMB_UNIT_DESC_PARAM_TYPE		= 0x1,
239 	RPMB_UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
240 	RPMB_UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
241 	RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID	= 0x4,
242 	RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT	= 0x5,
243 	RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
244 	RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE	= 0x7,
245 	RPMB_UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
246 	RPMB_UNIT_DESC_PARAM_REGION_EN		= 0x9,
247 	RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
248 	RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
249 	RPMB_UNIT_DESC_PARAM_REGION0_SIZE	= 0x13,
250 	RPMB_UNIT_DESC_PARAM_REGION1_SIZE	= 0x14,
251 	RPMB_UNIT_DESC_PARAM_REGION2_SIZE	= 0x15,
252 	RPMB_UNIT_DESC_PARAM_REGION3_SIZE	= 0x16,
253 	RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
254 	RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
255 };
256 
257 /* Device descriptor parameters offsets in bytes*/
258 enum device_desc_param {
259 	DEVICE_DESC_PARAM_LEN			= 0x0,
260 	DEVICE_DESC_PARAM_TYPE			= 0x1,
261 	DEVICE_DESC_PARAM_DEVICE_TYPE		= 0x2,
262 	DEVICE_DESC_PARAM_DEVICE_CLASS		= 0x3,
263 	DEVICE_DESC_PARAM_DEVICE_SUB_CLASS	= 0x4,
264 	DEVICE_DESC_PARAM_PRTCL			= 0x5,
265 	DEVICE_DESC_PARAM_NUM_LU		= 0x6,
266 	DEVICE_DESC_PARAM_NUM_WLU		= 0x7,
267 	DEVICE_DESC_PARAM_BOOT_ENBL		= 0x8,
268 	DEVICE_DESC_PARAM_DESC_ACCSS_ENBL	= 0x9,
269 	DEVICE_DESC_PARAM_INIT_PWR_MODE		= 0xA,
270 	DEVICE_DESC_PARAM_HIGH_PR_LUN		= 0xB,
271 	DEVICE_DESC_PARAM_SEC_RMV_TYPE		= 0xC,
272 	DEVICE_DESC_PARAM_SEC_LU		= 0xD,
273 	DEVICE_DESC_PARAM_BKOP_TERM_LT		= 0xE,
274 	DEVICE_DESC_PARAM_ACTVE_ICC_LVL		= 0xF,
275 	DEVICE_DESC_PARAM_SPEC_VER		= 0x10,
276 	DEVICE_DESC_PARAM_MANF_DATE		= 0x12,
277 	DEVICE_DESC_PARAM_MANF_NAME		= 0x14,
278 	DEVICE_DESC_PARAM_PRDCT_NAME		= 0x15,
279 	DEVICE_DESC_PARAM_SN			= 0x16,
280 	DEVICE_DESC_PARAM_OEM_ID		= 0x17,
281 	DEVICE_DESC_PARAM_MANF_ID		= 0x18,
282 	DEVICE_DESC_PARAM_UD_OFFSET		= 0x1A,
283 	DEVICE_DESC_PARAM_UD_LEN		= 0x1B,
284 	DEVICE_DESC_PARAM_RTT_CAP		= 0x1C,
285 	DEVICE_DESC_PARAM_FRQ_RTC		= 0x1D,
286 	DEVICE_DESC_PARAM_UFS_FEAT		= 0x1F,
287 	DEVICE_DESC_PARAM_FFU_TMT		= 0x20,
288 	DEVICE_DESC_PARAM_Q_DPTH		= 0x21,
289 	DEVICE_DESC_PARAM_DEV_VER		= 0x22,
290 	DEVICE_DESC_PARAM_NUM_SEC_WPA		= 0x24,
291 	DEVICE_DESC_PARAM_PSA_MAX_DATA		= 0x25,
292 	DEVICE_DESC_PARAM_PSA_TMT		= 0x29,
293 	DEVICE_DESC_PARAM_PRDCT_REV		= 0x2A,
294 	DEVICE_DESC_PARAM_HPB_VER		= 0x40,
295 	DEVICE_DESC_PARAM_HPB_CONTROL		= 0x42,
296 	DEVICE_DESC_PARAM_EXT_WB_SUP		= 0x4D,
297 	DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP	= 0x4F,
298 	DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN	= 0x53,
299 	DEVICE_DESC_PARAM_WB_TYPE		= 0x54,
300 	DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
301 };
302 
303 /* Interconnect descriptor parameters offsets in bytes*/
304 enum interconnect_desc_param {
305 	INTERCONNECT_DESC_PARAM_LEN		= 0x0,
306 	INTERCONNECT_DESC_PARAM_TYPE		= 0x1,
307 	INTERCONNECT_DESC_PARAM_UNIPRO_VER	= 0x2,
308 	INTERCONNECT_DESC_PARAM_MPHY_VER	= 0x4,
309 };
310 
311 /* Geometry descriptor parameters offsets in bytes*/
312 enum geometry_desc_param {
313 	GEOMETRY_DESC_PARAM_LEN			= 0x0,
314 	GEOMETRY_DESC_PARAM_TYPE		= 0x1,
315 	GEOMETRY_DESC_PARAM_DEV_CAP		= 0x4,
316 	GEOMETRY_DESC_PARAM_MAX_NUM_LUN		= 0xC,
317 	GEOMETRY_DESC_PARAM_SEG_SIZE		= 0xD,
318 	GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE	= 0x11,
319 	GEOMETRY_DESC_PARAM_MIN_BLK_SIZE	= 0x12,
320 	GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE	= 0x13,
321 	GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE	= 0x14,
322 	GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE	= 0x15,
323 	GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE	= 0x16,
324 	GEOMETRY_DESC_PARAM_RPMB_RW_SIZE	= 0x17,
325 	GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC	= 0x18,
326 	GEOMETRY_DESC_PARAM_DATA_ORDER		= 0x19,
327 	GEOMETRY_DESC_PARAM_MAX_NUM_CTX		= 0x1A,
328 	GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE	= 0x1B,
329 	GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE	= 0x1C,
330 	GEOMETRY_DESC_PARAM_SEC_RM_TYPES	= 0x1D,
331 	GEOMETRY_DESC_PARAM_MEM_TYPES		= 0x1E,
332 	GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS	= 0x20,
333 	GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR	= 0x24,
334 	GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS	= 0x26,
335 	GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR	= 0x2A,
336 	GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS	= 0x2C,
337 	GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR	= 0x30,
338 	GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS	= 0x32,
339 	GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR	= 0x36,
340 	GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS	= 0x38,
341 	GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR	= 0x3C,
342 	GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS	= 0x3E,
343 	GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR	= 0x42,
344 	GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE	= 0x44,
345 	GEOMETRY_DESC_PARAM_HPB_REGION_SIZE	= 0x48,
346 	GEOMETRY_DESC_PARAM_HPB_NUMBER_LU	= 0x49,
347 	GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE	= 0x4A,
348 	GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS	= 0x4B,
349 	GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS	= 0x4F,
350 	GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS	= 0x53,
351 	GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ	= 0x54,
352 	GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE	= 0x55,
353 	GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE	= 0x56,
354 };
355 
356 /* Health descriptor parameters offsets in bytes*/
357 enum health_desc_param {
358 	HEALTH_DESC_PARAM_LEN			= 0x0,
359 	HEALTH_DESC_PARAM_TYPE			= 0x1,
360 	HEALTH_DESC_PARAM_EOL_INFO		= 0x2,
361 	HEALTH_DESC_PARAM_LIFE_TIME_EST_A	= 0x3,
362 	HEALTH_DESC_PARAM_LIFE_TIME_EST_B	= 0x4,
363 };
364 
365 /* WriteBooster buffer mode */
366 enum {
367 	WB_BUF_MODE_LU_DEDICATED	= 0x0,
368 	WB_BUF_MODE_SHARED		= 0x1,
369 };
370 
371 /*
372  * Logical Unit Write Protect
373  * 00h: LU not write protected
374  * 01h: LU write protected when fPowerOnWPEn =1
375  * 02h: LU permanently write protected when fPermanentWPEn =1
376  */
377 enum ufs_lu_wp_type {
378 	UFS_LU_NO_WP		= 0x00,
379 	UFS_LU_POWER_ON_WP	= 0x01,
380 	UFS_LU_PERM_WP		= 0x02,
381 };
382 
383 /* bActiveICCLevel parameter current units */
384 enum {
385 	UFSHCD_NANO_AMP		= 0,
386 	UFSHCD_MICRO_AMP	= 1,
387 	UFSHCD_MILI_AMP		= 2,
388 	UFSHCD_AMP		= 3,
389 };
390 
391 /* Possible values for wExtendedWriteBoosterSupport */
392 enum {
393 	UFS_DEV_WB_BUF_RESIZE	= BIT(0),
394 };
395 
396 /* Possible values for dExtendedUFSFeaturesSupport */
397 enum {
398 	UFS_DEV_HIGH_TEMP_NOTIF		= BIT(4),
399 	UFS_DEV_LOW_TEMP_NOTIF		= BIT(5),
400 	UFS_DEV_EXT_TEMP_NOTIF		= BIT(6),
401 	UFS_DEV_HPB_SUPPORT		= BIT(7),
402 	UFS_DEV_WRITE_BOOSTER_SUP	= BIT(8),
403 	UFS_DEV_LVL_EXCEPTION_SUP       = BIT(12),
404 };
405 #define UFS_DEV_HPB_SUPPORT_VERSION		0x310
406 
407 #define POWER_DESC_MAX_ACTV_ICC_LVLS		16
408 
409 /* Attribute  bActiveICCLevel parameter bit masks definitions */
410 #define ATTR_ICC_LVL_UNIT_OFFSET	14
411 #define ATTR_ICC_LVL_UNIT_MASK		(0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
412 #define ATTR_ICC_LVL_VALUE_MASK		0x3FF
413 
414 /* Power descriptor parameters offsets in bytes */
415 enum power_desc_param_offset {
416 	PWR_DESC_LEN			= 0x0,
417 	PWR_DESC_TYPE			= 0x1,
418 	PWR_DESC_ACTIVE_LVLS_VCC_0	= 0x2,
419 	PWR_DESC_ACTIVE_LVLS_VCCQ_0	= 0x22,
420 	PWR_DESC_ACTIVE_LVLS_VCCQ2_0	= 0x42,
421 };
422 
423 /* Exception event mask values */
424 enum {
425 	MASK_EE_STATUS			= 0xFFFF,
426 	MASK_EE_DYNCAP_EVENT		= BIT(0),
427 	MASK_EE_SYSPOOL_EVENT		= BIT(1),
428 	MASK_EE_URGENT_BKOPS		= BIT(2),
429 	MASK_EE_TOO_HIGH_TEMP		= BIT(3),
430 	MASK_EE_TOO_LOW_TEMP		= BIT(4),
431 	MASK_EE_WRITEBOOSTER_EVENT	= BIT(5),
432 	MASK_EE_PERFORMANCE_THROTTLING	= BIT(6),
433 	MASK_EE_DEV_LVL_EXCEPTION       = BIT(7),
434 	MASK_EE_HEALTH_CRITICAL		= BIT(9),
435 };
436 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
437 
438 /* Background operation status */
439 enum bkops_status {
440 	BKOPS_STATUS_NO_OP               = 0x0,
441 	BKOPS_STATUS_NON_CRITICAL        = 0x1,
442 	BKOPS_STATUS_PERF_IMPACT         = 0x2,
443 	BKOPS_STATUS_CRITICAL            = 0x3,
444 	BKOPS_STATUS_MAX		 = BKOPS_STATUS_CRITICAL,
445 };
446 
447 /* UTP QUERY Transaction Specific Fields OpCode */
448 enum query_opcode {
449 	UPIU_QUERY_OPCODE_NOP		= 0x0,
450 	UPIU_QUERY_OPCODE_READ_DESC	= 0x1,
451 	UPIU_QUERY_OPCODE_WRITE_DESC	= 0x2,
452 	UPIU_QUERY_OPCODE_READ_ATTR	= 0x3,
453 	UPIU_QUERY_OPCODE_WRITE_ATTR	= 0x4,
454 	UPIU_QUERY_OPCODE_READ_FLAG	= 0x5,
455 	UPIU_QUERY_OPCODE_SET_FLAG	= 0x6,
456 	UPIU_QUERY_OPCODE_CLEAR_FLAG	= 0x7,
457 	UPIU_QUERY_OPCODE_TOGGLE_FLAG	= 0x8,
458 };
459 
460 /* bRefClkFreq attribute values */
461 enum ufs_ref_clk_freq {
462 	REF_CLK_FREQ_19_2_MHZ	= 0,
463 	REF_CLK_FREQ_26_MHZ	= 1,
464 	REF_CLK_FREQ_38_4_MHZ	= 2,
465 	REF_CLK_FREQ_52_MHZ	= 3,
466 	REF_CLK_FREQ_INVAL	= -1,
467 };
468 
469 /* bWriteBoosterBufferResizeEn attribute */
470 enum wb_resize_en {
471 	WB_RESIZE_EN_IDLE	= 0,
472 	WB_RESIZE_EN_DECREASE	= 1,
473 	WB_RESIZE_EN_INCREASE	= 2,
474 };
475 
476 /* bWriteBoosterBufferResizeHint attribute */
477 enum wb_resize_hint {
478 	WB_RESIZE_HINT_KEEP	= 0,
479 	WB_RESIZE_HINT_DECREASE	= 1,
480 	WB_RESIZE_HINT_INCREASE	= 2,
481 };
482 
483 /* bWriteBoosterBufferResizeStatus attribute */
484 enum wb_resize_status {
485 	WB_RESIZE_STATUS_IDLE	= 0,
486 	WB_RESIZE_STATUS_IN_PROGRESS	= 1,
487 	WB_RESIZE_STATUS_COMPLETE_SUCCESS	= 2,
488 	WB_RESIZE_STATUS_GENERAL_FAILURE	= 3,
489 };
490 
491 /* Query response result code */
492 enum {
493 	QUERY_RESULT_SUCCESS                    = 0x00,
494 	QUERY_RESULT_NOT_READABLE               = 0xF6,
495 	QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
496 	QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
497 	QUERY_RESULT_INVALID_LENGTH             = 0xF9,
498 	QUERY_RESULT_INVALID_VALUE              = 0xFA,
499 	QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
500 	QUERY_RESULT_INVALID_INDEX              = 0xFC,
501 	QUERY_RESULT_INVALID_IDN                = 0xFD,
502 	QUERY_RESULT_INVALID_OPCODE             = 0xFE,
503 	QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
504 };
505 
506 /* UTP Transfer Request Command Type (CT) */
507 enum {
508 	UPIU_COMMAND_SET_TYPE_SCSI	= 0x0,
509 	UPIU_COMMAND_SET_TYPE_UFS	= 0x1,
510 	UPIU_COMMAND_SET_TYPE_QUERY	= 0x2,
511 };
512 
513 /* Offset of the response code in the UPIU header */
514 #define UPIU_RSP_CODE_OFFSET		8
515 
516 enum {
517 	MASK_TM_SERVICE_RESP		= 0xFF,
518 };
519 
520 /* Task management service response */
521 enum {
522 	UPIU_TASK_MANAGEMENT_FUNC_COMPL		= 0x00,
523 	UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
524 	UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED	= 0x08,
525 	UPIU_TASK_MANAGEMENT_FUNC_FAILED	= 0x05,
526 	UPIU_INCORRECT_LOGICAL_UNIT_NO		= 0x09,
527 };
528 
529 /* UFS device power modes */
530 enum ufs_dev_pwr_mode {
531 	UFS_ACTIVE_PWR_MODE	= 1,
532 	UFS_SLEEP_PWR_MODE	= 2,
533 	UFS_POWERDOWN_PWR_MODE	= 3,
534 	UFS_DEEPSLEEP_PWR_MODE	= 4,
535 };
536 
537 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
538 
539 /**
540  * struct utp_cmd_rsp - Response UPIU structure
541  * @residual_transfer_count: Residual transfer count DW-3
542  * @reserved: Reserved double words DW-4 to DW-7
543  * @sense_data_len: Sense data length DW-8 U16
544  * @sense_data: Sense data field DW-8 to DW-12
545  */
546 struct utp_cmd_rsp {
547 	__be32 residual_transfer_count;
548 	__be32 reserved[4];
549 	__be16 sense_data_len;
550 	u8 sense_data[UFS_SENSE_SIZE];
551 };
552 
553 /**
554  * struct utp_upiu_rsp - general upiu response structure
555  * @header: UPIU header structure DW-0 to DW-2
556  * @sr: fields structure for scsi command DW-3 to DW-12
557  * @qr: fields structure for query request DW-3 to DW-7
558  */
559 struct utp_upiu_rsp {
560 	struct utp_upiu_header header;
561 	union {
562 		struct utp_cmd_rsp sr;
563 		struct utp_upiu_query qr;
564 	};
565 };
566 
567 /*
568  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
569  * and link is in Hibern8 state.
570  */
571 #define UFS_VREG_LPM_LOAD_UA	1000 /* uA */
572 
573 struct ufs_vreg {
574 	struct regulator *reg;
575 	const char *name;
576 	bool always_on;
577 	bool enabled;
578 	int max_uA;
579 };
580 
581 struct ufs_vreg_info {
582 	struct ufs_vreg *vcc;
583 	struct ufs_vreg *vccq;
584 	struct ufs_vreg *vccq2;
585 	struct ufs_vreg *vdd_hba;
586 };
587 
588 /* UFS device descriptor wPeriodicRTCUpdate bit9 defines RTC time baseline */
589 #define UFS_RTC_TIME_BASELINE BIT(9)
590 
591 enum ufs_rtc_time {
592 	UFS_RTC_RELATIVE,
593 	UFS_RTC_ABSOLUTE
594 };
595 
596 struct ufs_dev_info {
597 	bool	f_power_on_wp_en;
598 	/* Keeps information if any of the LU is power on write protected */
599 	bool	is_lu_power_on_wp;
600 	/* Maximum number of general LU supported by the UFS device */
601 	u8	max_lu_supported;
602 	u16	wmanufacturerid;
603 	/*UFS device Product Name */
604 	u8	*model;
605 	u16	wspecversion;
606 	u32	clk_gating_wait_us;
607 	/* Stores the depth of queue in UFS device */
608 	u8	bqueuedepth;
609 
610 	/* UFS WB related flags */
611 	bool    wb_enabled;
612 	bool    wb_buf_flush_enabled;
613 	u8	wb_dedicated_lu;
614 	u8      wb_buffer_type;
615 	u16	ext_wb_sup;
616 
617 	bool	b_rpm_dev_flush_capable;
618 	u8	b_presrv_uspc_en;
619 
620 	bool    b_advanced_rpmb_en;
621 
622 	/* UFS RTC */
623 	enum ufs_rtc_time rtc_type;
624 	time64_t rtc_time_baseline;
625 	u32 rtc_update_period;
626 
627 	u8 rtt_cap; /* bDeviceRTTCap */
628 };
629 
630 /*
631  * This enum is used in string mapping in ufs_trace.h.
632  */
633 enum ufs_trace_str_t {
634 	UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
635 	UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
636 	UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
637 };
638 
639 /*
640  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
641  * used in ufs_trace.h for UFS command trace.
642  */
643 enum ufs_trace_tsf_t {
644 	UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
645 };
646 
647 #endif /* End of Header */
648