1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright (c) 2021, Microsoft Corporation. */ 3 4 #ifndef _HW_CHANNEL_H 5 #define _HW_CHANNEL_H 6 7 #define DEFAULT_LOG2_THROTTLING_FOR_ERROR_EQ 4 8 9 #define HW_CHANNEL_MAX_REQUEST_SIZE 0x1000 10 #define HW_CHANNEL_MAX_RESPONSE_SIZE 0x1000 11 12 #define HW_CHANNEL_VF_BOOTSTRAP_QUEUE_DEPTH 1 13 14 #define HWC_INIT_DATA_CQID 1 15 #define HWC_INIT_DATA_RQID 2 16 #define HWC_INIT_DATA_SQID 3 17 #define HWC_INIT_DATA_QUEUE_DEPTH 4 18 #define HWC_INIT_DATA_MAX_REQUEST 5 19 #define HWC_INIT_DATA_MAX_RESPONSE 6 20 #define HWC_INIT_DATA_MAX_NUM_CQS 7 21 #define HWC_INIT_DATA_PDID 8 22 #define HWC_INIT_DATA_GPA_MKEY 9 23 #define HWC_INIT_DATA_PF_DEST_RQ_ID 10 24 #define HWC_INIT_DATA_PF_DEST_CQ_ID 11 25 26 #define HWC_DATA_CFG_HWC_TIMEOUT 1 27 28 #define HW_CHANNEL_WAIT_RESOURCE_TIMEOUT_MS 30000 29 30 /* Structures labeled with "HW DATA" are exchanged with the hardware. All of 31 * them are naturally aligned and hence don't need __packed. 32 */ 33 34 union hwc_init_eq_id_db { 35 u32 as_uint32; 36 37 struct { 38 u32 eq_id : 16; 39 u32 doorbell : 16; 40 }; 41 }; /* HW DATA */ 42 43 union hwc_init_type_data { 44 u32 as_uint32; 45 46 struct { 47 u32 value : 24; 48 u32 type : 8; 49 }; 50 }; /* HW DATA */ 51 52 union hwc_init_soc_service_type { 53 u32 as_uint32; 54 55 struct { 56 u32 value : 28; 57 u32 type : 4; 58 }; 59 }; /* HW DATA */ 60 61 struct hwc_rx_oob { 62 u32 type : 6; 63 u32 eom : 1; 64 u32 som : 1; 65 u32 vendor_err : 8; 66 u32 reserved1 : 16; 67 68 u32 src_virt_wq : 24; 69 u32 src_vfid : 8; 70 71 u32 reserved2; 72 73 union { 74 u32 wqe_addr_low; 75 u32 wqe_offset; 76 }; 77 78 u32 wqe_addr_high; 79 80 u32 client_data_unit : 14; 81 u32 reserved3 : 18; 82 83 u32 tx_oob_data_size; 84 85 u32 chunk_offset : 21; 86 u32 reserved4 : 11; 87 }; /* HW DATA */ 88 89 struct hwc_tx_oob { 90 u32 reserved1; 91 92 u32 reserved2; 93 94 u32 vrq_id : 24; 95 u32 dest_vfid : 8; 96 97 u32 vrcq_id : 24; 98 u32 reserved3 : 8; 99 100 u32 vscq_id : 24; 101 u32 loopback : 1; 102 u32 lso_override: 1; 103 u32 dest_pf : 1; 104 u32 reserved4 : 5; 105 106 u32 vsq_id : 24; 107 u32 reserved5 : 8; 108 }; /* HW DATA */ 109 110 struct hwc_work_request { 111 void *buf_va; 112 void *buf_sge_addr; 113 u32 buf_len; 114 u32 msg_size; 115 116 struct gdma_wqe_request wqe_req; 117 struct hwc_tx_oob tx_oob; 118 119 struct gdma_sge sge; 120 }; 121 122 /* hwc_dma_buf represents the array of in-flight WQEs. 123 * mem_info as know as the GDMA mapped memory is partitioned and used by 124 * in-flight WQEs. 125 * The number of WQEs is determined by the number of in-flight messages. 126 */ 127 struct hwc_dma_buf { 128 struct gdma_mem_info mem_info; 129 130 u32 gpa_mkey; 131 132 u32 num_reqs; 133 struct hwc_work_request reqs[] __counted_by(num_reqs); 134 }; 135 136 typedef void hwc_rx_event_handler_t(void *ctx, u32 gdma_rxq_id, 137 const struct hwc_rx_oob *rx_oob); 138 139 typedef void hwc_tx_event_handler_t(void *ctx, u32 gdma_txq_id, 140 const struct hwc_rx_oob *rx_oob); 141 142 struct hwc_cq { 143 struct hw_channel_context *hwc; 144 145 struct gdma_queue *gdma_cq; 146 struct gdma_queue *gdma_eq; 147 struct gdma_comp *comp_buf; 148 u16 queue_depth; 149 150 hwc_rx_event_handler_t *rx_event_handler; 151 void *rx_event_ctx; 152 153 hwc_tx_event_handler_t *tx_event_handler; 154 void *tx_event_ctx; 155 }; 156 157 struct hwc_wq { 158 struct hw_channel_context *hwc; 159 160 struct gdma_queue *gdma_wq; 161 struct hwc_dma_buf *msg_buf; 162 u16 queue_depth; 163 164 struct hwc_cq *hwc_cq; 165 }; 166 167 struct hwc_caller_ctx { 168 struct completion comp_event; 169 void *output_buf; 170 u32 output_buflen; 171 172 u32 error; /* Linux error code */ 173 u32 status_code; 174 }; 175 176 struct hw_channel_context { 177 struct gdma_dev *gdma_dev; 178 struct device *dev; 179 180 u16 num_inflight_msg; 181 u32 max_req_msg_size; 182 183 u16 hwc_init_q_depth_max; 184 u32 hwc_init_max_req_msg_size; 185 u32 hwc_init_max_resp_msg_size; 186 187 struct completion hwc_init_eqe_comp; 188 189 struct hwc_wq *rxq; 190 struct hwc_wq *txq; 191 struct hwc_cq *cq; 192 193 struct semaphore sema; 194 struct gdma_resource inflight_msg_res; 195 196 u32 pf_dest_vrq_id; 197 u32 pf_dest_vrcq_id; 198 u32 hwc_timeout; 199 200 struct hwc_caller_ctx *caller_ctx; 201 }; 202 203 int mana_hwc_create_channel(struct gdma_context *gc); 204 void mana_hwc_destroy_channel(struct gdma_context *gc); 205 206 int mana_hwc_send_request(struct hw_channel_context *hwc, u32 req_len, 207 const void *req, u32 resp_len, void *resp); 208 209 #endif /* _HW_CHANNEL_H */ 210