1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2 3 #ifndef _DT_BINDINGS_MEDIATEK_MT6373_AUXADC_H 4 #define _DT_BINDINGS_MEDIATEK_MT6373_AUXADC_H 5 6 /* ADC Channel Index */ 7 #define MT6373_AUXADC_CHIP_TEMP 0 8 #define MT6373_AUXADC_VCORE_TEMP 1 9 #define MT6373_AUXADC_VPROC_TEMP 2 10 #define MT6373_AUXADC_VGPU_TEMP 3 11 #define MT6373_AUXADC_VIN1 4 12 #define MT6373_AUXADC_VIN2 5 13 #define MT6373_AUXADC_VIN3 6 14 #define MT6373_AUXADC_VIN4 7 15 #define MT6373_AUXADC_VIN5 8 16 #define MT6373_AUXADC_VIN6 9 17 #define MT6373_AUXADC_VIN7 10 18 19 #endif 20