1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Cadence CDNSP DRD Driver. 4 * 5 * Copyright (C) 2020 Cadence. 6 * 7 * Author: Pawel Laszczak <pawell@cadence.com> 8 * 9 * Code based on Linux XHCI driver. 10 * Origin: Copyright (C) 2008 Intel Corp 11 */ 12 13 /* 14 * Ring initialization rules: 15 * 1. Each segment is initialized to zero, except for link TRBs. 16 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or 17 * Consumer Cycle State (CCS), depending on ring function. 18 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment. 19 * 20 * Ring behavior rules: 21 * 1. A ring is empty if enqueue == dequeue. This means there will always be at 22 * least one free TRB in the ring. This is useful if you want to turn that 23 * into a link TRB and expand the ring. 24 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a 25 * link TRB, then load the pointer with the address in the link TRB. If the 26 * link TRB had its toggle bit set, you may need to update the ring cycle 27 * state (see cycle bit rules). You may have to do this multiple times 28 * until you reach a non-link TRB. 29 * 3. A ring is full if enqueue++ (for the definition of increment above) 30 * equals the dequeue pointer. 31 * 32 * Cycle bit rules: 33 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit 34 * in a link TRB, it must toggle the ring cycle state. 35 * 2. When a producer increments an enqueue pointer and encounters a toggle bit 36 * in a link TRB, it must toggle the ring cycle state. 37 * 38 * Producer rules: 39 * 1. Check if ring is full before you enqueue. 40 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing. 41 * Update enqueue pointer between each write (which may update the ring 42 * cycle state). 43 * 3. Notify consumer. If SW is producer, it rings the doorbell for command 44 * and endpoint rings. If controller is the producer for the event ring, 45 * and it generates an interrupt according to interrupt modulation rules. 46 * 47 * Consumer rules: 48 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state, 49 * the TRB is owned by the consumer. 50 * 2. Update dequeue pointer (which may update the ring cycle state) and 51 * continue processing TRBs until you reach a TRB which is not owned by you. 52 * 3. Notify the producer. SW is the consumer for the event ring, and it 53 * updates event ring dequeue pointer. Controller is the consumer for the 54 * command and endpoint rings; it generates events on the event ring 55 * for these. 56 */ 57 58 #include <linux/scatterlist.h> 59 #include <linux/dma-mapping.h> 60 #include <linux/delay.h> 61 #include <linux/slab.h> 62 #include <linux/irq.h> 63 64 #include "cdnsp-trace.h" 65 #include "cdnsp-gadget.h" 66 67 /* 68 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA 69 * address of the TRB. 70 */ 71 dma_addr_t cdnsp_trb_virt_to_dma(struct cdnsp_segment *seg, 72 union cdnsp_trb *trb) 73 { 74 unsigned long segment_offset = trb - seg->trbs; 75 76 if (trb < seg->trbs || segment_offset >= TRBS_PER_SEGMENT) 77 return 0; 78 79 return seg->dma + (segment_offset * sizeof(*trb)); 80 } 81 82 static bool cdnsp_trb_is_noop(union cdnsp_trb *trb) 83 { 84 return TRB_TYPE_NOOP_LE32(trb->generic.field[3]); 85 } 86 87 static bool cdnsp_trb_is_link(union cdnsp_trb *trb) 88 { 89 return TRB_TYPE_LINK_LE32(trb->link.control); 90 } 91 92 bool cdnsp_last_trb_on_seg(struct cdnsp_segment *seg, union cdnsp_trb *trb) 93 { 94 return trb == &seg->trbs[TRBS_PER_SEGMENT - 1]; 95 } 96 97 bool cdnsp_last_trb_on_ring(struct cdnsp_ring *ring, 98 struct cdnsp_segment *seg, 99 union cdnsp_trb *trb) 100 { 101 return cdnsp_last_trb_on_seg(seg, trb) && (seg->next == ring->first_seg); 102 } 103 104 static bool cdnsp_link_trb_toggles_cycle(union cdnsp_trb *trb) 105 { 106 return le32_to_cpu(trb->link.control) & LINK_TOGGLE; 107 } 108 109 static void cdnsp_trb_to_noop(union cdnsp_trb *trb, u32 noop_type) 110 { 111 if (cdnsp_trb_is_link(trb)) { 112 /* Unchain chained link TRBs. */ 113 trb->link.control &= cpu_to_le32(~TRB_CHAIN); 114 } else { 115 trb->generic.field[0] = 0; 116 trb->generic.field[1] = 0; 117 trb->generic.field[2] = 0; 118 /* Preserve only the cycle bit of this TRB. */ 119 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE); 120 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type)); 121 } 122 } 123 124 /* 125 * Updates trb to point to the next TRB in the ring, and updates seg if the next 126 * TRB is in a new segment. This does not skip over link TRBs, and it does not 127 * effect the ring dequeue or enqueue pointers. 128 */ 129 static void cdnsp_next_trb(struct cdnsp_device *pdev, 130 struct cdnsp_ring *ring, 131 struct cdnsp_segment **seg, 132 union cdnsp_trb **trb) 133 { 134 if (cdnsp_trb_is_link(*trb)) { 135 *seg = (*seg)->next; 136 *trb = ((*seg)->trbs); 137 } else { 138 (*trb)++; 139 } 140 } 141 142 /* 143 * See Cycle bit rules. SW is the consumer for the event ring only. 144 * Don't make a ring full of link TRBs. That would be dumb and this would loop. 145 */ 146 void cdnsp_inc_deq(struct cdnsp_device *pdev, struct cdnsp_ring *ring) 147 { 148 /* event ring doesn't have link trbs, check for last trb. */ 149 if (ring->type == TYPE_EVENT) { 150 if (!cdnsp_last_trb_on_seg(ring->deq_seg, ring->dequeue)) { 151 ring->dequeue++; 152 goto out; 153 } 154 155 if (cdnsp_last_trb_on_ring(ring, ring->deq_seg, ring->dequeue)) 156 ring->cycle_state ^= 1; 157 158 ring->deq_seg = ring->deq_seg->next; 159 ring->dequeue = ring->deq_seg->trbs; 160 goto out; 161 } 162 163 /* All other rings have link trbs. */ 164 if (!cdnsp_trb_is_link(ring->dequeue)) { 165 ring->dequeue++; 166 ring->num_trbs_free++; 167 } 168 while (cdnsp_trb_is_link(ring->dequeue)) { 169 ring->deq_seg = ring->deq_seg->next; 170 ring->dequeue = ring->deq_seg->trbs; 171 } 172 out: 173 trace_cdnsp_inc_deq(ring); 174 } 175 176 /* 177 * See Cycle bit rules. SW is the consumer for the event ring only. 178 * Don't make a ring full of link TRBs. That would be dumb and this would loop. 179 * 180 * If we've just enqueued a TRB that is in the middle of a TD (meaning the 181 * chain bit is set), then set the chain bit in all the following link TRBs. 182 * If we've enqueued the last TRB in a TD, make sure the following link TRBs 183 * have their chain bit cleared (so that each Link TRB is a separate TD). 184 * 185 * @more_trbs_coming: Will you enqueue more TRBs before ringing the doorbell. 186 */ 187 static void cdnsp_inc_enq(struct cdnsp_device *pdev, 188 struct cdnsp_ring *ring, 189 bool more_trbs_coming) 190 { 191 union cdnsp_trb *next; 192 u32 chain; 193 194 chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN; 195 196 /* If this is not event ring, there is one less usable TRB. */ 197 if (!cdnsp_trb_is_link(ring->enqueue)) 198 ring->num_trbs_free--; 199 next = ++(ring->enqueue); 200 201 /* Update the dequeue pointer further if that was a link TRB */ 202 while (cdnsp_trb_is_link(next)) { 203 /* 204 * If the caller doesn't plan on enqueuing more TDs before 205 * ringing the doorbell, then we don't want to give the link TRB 206 * to the hardware just yet. We'll give the link TRB back in 207 * cdnsp_prepare_ring() just before we enqueue the TD at the 208 * top of the ring. 209 */ 210 if (!chain && !more_trbs_coming) 211 break; 212 213 next->link.control &= cpu_to_le32(~TRB_CHAIN); 214 next->link.control |= cpu_to_le32(chain); 215 216 /* Give this link TRB to the hardware */ 217 wmb(); 218 next->link.control ^= cpu_to_le32(TRB_CYCLE); 219 220 /* Toggle the cycle bit after the last ring segment. */ 221 if (cdnsp_link_trb_toggles_cycle(next)) 222 ring->cycle_state ^= 1; 223 224 ring->enq_seg = ring->enq_seg->next; 225 ring->enqueue = ring->enq_seg->trbs; 226 next = ring->enqueue; 227 } 228 229 trace_cdnsp_inc_enq(ring); 230 } 231 232 /* 233 * Check to see if there's room to enqueue num_trbs on the ring and make sure 234 * enqueue pointer will not advance into dequeue segment. 235 */ 236 static bool cdnsp_room_on_ring(struct cdnsp_device *pdev, 237 struct cdnsp_ring *ring, 238 unsigned int num_trbs) 239 { 240 int num_trbs_in_deq_seg; 241 242 if (ring->num_trbs_free < num_trbs) 243 return false; 244 245 if (ring->type != TYPE_COMMAND && ring->type != TYPE_EVENT) { 246 num_trbs_in_deq_seg = ring->dequeue - ring->deq_seg->trbs; 247 248 if (ring->num_trbs_free < num_trbs + num_trbs_in_deq_seg) 249 return false; 250 } 251 252 return true; 253 } 254 255 /* 256 * Workaround for L1: controller has issue with resuming from L1 after 257 * setting doorbell for endpoint during L1 state. This function forces 258 * resume signal in such case. 259 */ 260 static void cdnsp_force_l0_go(struct cdnsp_device *pdev) 261 { 262 if (pdev->active_port == &pdev->usb2_port && pdev->gadget.lpm_capable) 263 cdnsp_set_link_state(pdev, &pdev->active_port->regs->portsc, XDEV_U0); 264 } 265 266 /* Ring the doorbell after placing a command on the ring. */ 267 void cdnsp_ring_cmd_db(struct cdnsp_device *pdev) 268 { 269 writel(DB_VALUE_CMD, &pdev->dba->cmd_db); 270 } 271 272 /* 273 * Ring the doorbell after placing a transfer on the ring. 274 * Returns true if doorbell was set, otherwise false. 275 */ 276 static bool cdnsp_ring_ep_doorbell(struct cdnsp_device *pdev, 277 struct cdnsp_ep *pep, 278 unsigned int stream_id) 279 { 280 __le32 __iomem *reg_addr = &pdev->dba->ep_db; 281 unsigned int ep_state = pep->ep_state; 282 unsigned int db_value; 283 284 /* 285 * Don't ring the doorbell for this endpoint if endpoint is halted or 286 * disabled. 287 */ 288 if (ep_state & EP_HALTED || !(ep_state & EP_ENABLED)) 289 return false; 290 291 /* For stream capable endpoints driver can ring doorbell only twice. */ 292 if (pep->ep_state & EP_HAS_STREAMS) { 293 if (pep->stream_info.drbls_count >= 2) 294 return false; 295 296 pep->stream_info.drbls_count++; 297 } 298 299 pep->ep_state &= ~EP_STOPPED; 300 301 if (pep->idx == 0 && pdev->ep0_stage == CDNSP_DATA_STAGE && 302 !pdev->ep0_expect_in) 303 db_value = DB_VALUE_EP0_OUT(pep->idx, stream_id); 304 else 305 db_value = DB_VALUE(pep->idx, stream_id); 306 307 trace_cdnsp_tr_drbl(pep, stream_id); 308 309 writel(db_value, reg_addr); 310 311 if (pdev->rtl_revision < RTL_REVISION_NEW_LPM) 312 cdnsp_force_l0_go(pdev); 313 314 /* Doorbell was set. */ 315 return true; 316 } 317 318 /* 319 * Get the right ring for the given pep and stream_id. 320 * If the endpoint supports streams, boundary check the USB request's stream ID. 321 * If the endpoint doesn't support streams, return the singular endpoint ring. 322 */ 323 static struct cdnsp_ring *cdnsp_get_transfer_ring(struct cdnsp_device *pdev, 324 struct cdnsp_ep *pep, 325 unsigned int stream_id) 326 { 327 if (!(pep->ep_state & EP_HAS_STREAMS)) 328 return pep->ring; 329 330 if (stream_id == 0 || stream_id >= pep->stream_info.num_streams) { 331 dev_err(pdev->dev, "ERR: %s ring doesn't exist for SID: %d.\n", 332 pep->name, stream_id); 333 return NULL; 334 } 335 336 return pep->stream_info.stream_rings[stream_id]; 337 } 338 339 static struct cdnsp_ring * 340 cdnsp_request_to_transfer_ring(struct cdnsp_device *pdev, 341 struct cdnsp_request *preq) 342 { 343 return cdnsp_get_transfer_ring(pdev, preq->pep, 344 preq->request.stream_id); 345 } 346 347 /* Ring the doorbell for any rings with pending requests. */ 348 void cdnsp_ring_doorbell_for_active_rings(struct cdnsp_device *pdev, 349 struct cdnsp_ep *pep) 350 { 351 struct cdnsp_stream_info *stream_info; 352 unsigned int stream_id; 353 int ret; 354 355 if (pep->ep_state & EP_DIS_IN_RROGRESS) 356 return; 357 358 /* A ring has pending Request if its TD list is not empty. */ 359 if (!(pep->ep_state & EP_HAS_STREAMS) && pep->number) { 360 if (pep->ring && !list_empty(&pep->ring->td_list)) 361 cdnsp_ring_ep_doorbell(pdev, pep, 0); 362 return; 363 } 364 365 stream_info = &pep->stream_info; 366 367 for (stream_id = 1; stream_id < stream_info->num_streams; stream_id++) { 368 struct cdnsp_td *td, *td_temp; 369 struct cdnsp_ring *ep_ring; 370 371 if (stream_info->drbls_count >= 2) 372 return; 373 374 ep_ring = cdnsp_get_transfer_ring(pdev, pep, stream_id); 375 if (!ep_ring) 376 continue; 377 378 if (!ep_ring->stream_active || ep_ring->stream_rejected) 379 continue; 380 381 list_for_each_entry_safe(td, td_temp, &ep_ring->td_list, 382 td_list) { 383 if (td->drbl) 384 continue; 385 386 ret = cdnsp_ring_ep_doorbell(pdev, pep, stream_id); 387 if (ret) 388 td->drbl = 1; 389 } 390 } 391 } 392 393 /* 394 * Get the hw dequeue pointer controller stopped on, either directly from the 395 * endpoint context, or if streams are in use from the stream context. 396 * The returned hw_dequeue contains the lowest four bits with cycle state 397 * and possible stream context type. 398 */ 399 static u64 cdnsp_get_hw_deq(struct cdnsp_device *pdev, 400 unsigned int ep_index, 401 unsigned int stream_id) 402 { 403 struct cdnsp_stream_ctx *st_ctx; 404 struct cdnsp_ep *pep; 405 406 pep = &pdev->eps[ep_index]; 407 408 if (pep->ep_state & EP_HAS_STREAMS) { 409 st_ctx = &pep->stream_info.stream_ctx_array[stream_id]; 410 return le64_to_cpu(st_ctx->stream_ring); 411 } 412 413 return le64_to_cpu(pep->out_ctx->deq); 414 } 415 416 /* 417 * Move the controller endpoint ring dequeue pointer past cur_td. 418 * Record the new state of the controller endpoint ring dequeue segment, 419 * dequeue pointer, and new consumer cycle state in state. 420 * Update internal representation of the ring's dequeue pointer. 421 * 422 * We do this in three jumps: 423 * - First we update our new ring state to be the same as when the 424 * controller stopped. 425 * - Then we traverse the ring to find the segment that contains 426 * the last TRB in the TD. We toggle the controller new cycle state 427 * when we pass any link TRBs with the toggle cycle bit set. 428 * - Finally we move the dequeue state one TRB further, toggling the cycle bit 429 * if we've moved it past a link TRB with the toggle cycle bit set. 430 */ 431 static void cdnsp_find_new_dequeue_state(struct cdnsp_device *pdev, 432 struct cdnsp_ep *pep, 433 unsigned int stream_id, 434 struct cdnsp_td *cur_td, 435 struct cdnsp_dequeue_state *state) 436 { 437 bool td_last_trb_found = false; 438 struct cdnsp_segment *new_seg; 439 struct cdnsp_ring *ep_ring; 440 union cdnsp_trb *new_deq; 441 bool cycle_found = false; 442 u64 hw_dequeue; 443 444 ep_ring = cdnsp_get_transfer_ring(pdev, pep, stream_id); 445 if (!ep_ring) 446 return; 447 448 /* 449 * Dig out the cycle state saved by the controller during the 450 * stop endpoint command. 451 */ 452 hw_dequeue = cdnsp_get_hw_deq(pdev, pep->idx, stream_id); 453 new_seg = ep_ring->deq_seg; 454 new_deq = ep_ring->dequeue; 455 state->new_cycle_state = hw_dequeue & 0x1; 456 state->stream_id = stream_id; 457 458 /* 459 * We want to find the pointer, segment and cycle state of the new trb 460 * (the one after current TD's last_trb). We know the cycle state at 461 * hw_dequeue, so walk the ring until both hw_dequeue and last_trb are 462 * found. 463 */ 464 do { 465 if (!cycle_found && cdnsp_trb_virt_to_dma(new_seg, new_deq) 466 == (dma_addr_t)(hw_dequeue & ~0xf)) { 467 cycle_found = true; 468 469 if (td_last_trb_found) 470 break; 471 } 472 473 if (new_deq == cur_td->last_trb) 474 td_last_trb_found = true; 475 476 if (cycle_found && cdnsp_trb_is_link(new_deq) && 477 cdnsp_link_trb_toggles_cycle(new_deq)) 478 state->new_cycle_state ^= 0x1; 479 480 cdnsp_next_trb(pdev, ep_ring, &new_seg, &new_deq); 481 482 /* Search wrapped around, bail out. */ 483 if (new_deq == pep->ring->dequeue) { 484 dev_err(pdev->dev, 485 "Error: Failed finding new dequeue state\n"); 486 state->new_deq_seg = NULL; 487 state->new_deq_ptr = NULL; 488 return; 489 } 490 491 } while (!cycle_found || !td_last_trb_found); 492 493 state->new_deq_seg = new_seg; 494 state->new_deq_ptr = new_deq; 495 496 trace_cdnsp_new_deq_state(state); 497 } 498 499 /* 500 * flip_cycle means flip the cycle bit of all but the first and last TRB. 501 * (The last TRB actually points to the ring enqueue pointer, which is not part 502 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring. 503 */ 504 static void cdnsp_td_to_noop(struct cdnsp_device *pdev, 505 struct cdnsp_ring *ep_ring, 506 struct cdnsp_td *td, 507 bool flip_cycle) 508 { 509 struct cdnsp_segment *seg = td->start_seg; 510 union cdnsp_trb *trb = td->first_trb; 511 512 while (1) { 513 cdnsp_trb_to_noop(trb, TRB_TR_NOOP); 514 515 /* flip cycle if asked to */ 516 if (flip_cycle && trb != td->first_trb && trb != td->last_trb) 517 trb->generic.field[3] ^= cpu_to_le32(TRB_CYCLE); 518 519 if (trb == td->last_trb) 520 break; 521 522 cdnsp_next_trb(pdev, ep_ring, &seg, &trb); 523 } 524 } 525 526 /* 527 * This TD is defined by the TRBs starting at start_trb in start_seg and ending 528 * at end_trb, which may be in another segment. If the suspect DMA address is a 529 * TRB in this TD, this function returns that TRB's segment. Otherwise it 530 * returns 0. 531 */ 532 static struct cdnsp_segment *cdnsp_trb_in_td(struct cdnsp_device *pdev, 533 struct cdnsp_segment *start_seg, 534 union cdnsp_trb *start_trb, 535 union cdnsp_trb *end_trb, 536 dma_addr_t suspect_dma) 537 { 538 struct cdnsp_segment *cur_seg; 539 union cdnsp_trb *temp_trb; 540 dma_addr_t end_seg_dma; 541 dma_addr_t end_trb_dma; 542 dma_addr_t start_dma; 543 544 start_dma = cdnsp_trb_virt_to_dma(start_seg, start_trb); 545 cur_seg = start_seg; 546 547 do { 548 if (start_dma == 0) 549 return NULL; 550 551 temp_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1]; 552 /* We may get an event for a Link TRB in the middle of a TD */ 553 end_seg_dma = cdnsp_trb_virt_to_dma(cur_seg, temp_trb); 554 /* If the end TRB isn't in this segment, this is set to 0 */ 555 end_trb_dma = cdnsp_trb_virt_to_dma(cur_seg, end_trb); 556 557 trace_cdnsp_looking_trb_in_td(suspect_dma, start_dma, 558 end_trb_dma, cur_seg->dma, 559 end_seg_dma); 560 561 if (end_trb_dma > 0) { 562 /* 563 * The end TRB is in this segment, so suspect should 564 * be here 565 */ 566 if (start_dma <= end_trb_dma) { 567 if (suspect_dma >= start_dma && 568 suspect_dma <= end_trb_dma) { 569 return cur_seg; 570 } 571 } else { 572 /* 573 * Case for one segment with a 574 * TD wrapped around to the top 575 */ 576 if ((suspect_dma >= start_dma && 577 suspect_dma <= end_seg_dma) || 578 (suspect_dma >= cur_seg->dma && 579 suspect_dma <= end_trb_dma)) { 580 return cur_seg; 581 } 582 } 583 584 return NULL; 585 } 586 587 /* Might still be somewhere in this segment */ 588 if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma) 589 return cur_seg; 590 591 cur_seg = cur_seg->next; 592 start_dma = cdnsp_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 593 } while (cur_seg != start_seg); 594 595 return NULL; 596 } 597 598 static void cdnsp_unmap_td_bounce_buffer(struct cdnsp_device *pdev, 599 struct cdnsp_ring *ring, 600 struct cdnsp_td *td) 601 { 602 struct cdnsp_segment *seg = td->bounce_seg; 603 struct cdnsp_request *preq; 604 size_t len; 605 606 if (!seg) 607 return; 608 609 preq = td->preq; 610 611 trace_cdnsp_bounce_unmap(td->preq, seg->bounce_len, seg->bounce_offs, 612 seg->bounce_dma, 0); 613 614 if (!preq->direction) { 615 dma_unmap_single(pdev->dev, seg->bounce_dma, 616 ring->bounce_buf_len, DMA_TO_DEVICE); 617 return; 618 } 619 620 dma_unmap_single(pdev->dev, seg->bounce_dma, ring->bounce_buf_len, 621 DMA_FROM_DEVICE); 622 623 /* For in transfers we need to copy the data from bounce to sg */ 624 len = sg_pcopy_from_buffer(preq->request.sg, preq->request.num_sgs, 625 seg->bounce_buf, seg->bounce_len, 626 seg->bounce_offs); 627 if (len != seg->bounce_len) 628 dev_warn(pdev->dev, "WARN Wrong bounce buffer read length: %zu != %d\n", 629 len, seg->bounce_len); 630 631 seg->bounce_len = 0; 632 seg->bounce_offs = 0; 633 } 634 635 static int cdnsp_cmd_set_deq(struct cdnsp_device *pdev, 636 struct cdnsp_ep *pep, 637 struct cdnsp_dequeue_state *deq_state) 638 { 639 struct cdnsp_ring *ep_ring; 640 int ret; 641 642 if (!deq_state->new_deq_ptr || !deq_state->new_deq_seg) { 643 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 644 return 0; 645 } 646 647 cdnsp_queue_new_dequeue_state(pdev, pep, deq_state); 648 cdnsp_ring_cmd_db(pdev); 649 ret = cdnsp_wait_for_cmd_compl(pdev); 650 651 trace_cdnsp_handle_cmd_set_deq(cdnsp_get_slot_ctx(&pdev->out_ctx)); 652 trace_cdnsp_handle_cmd_set_deq_ep(pep->out_ctx); 653 654 /* 655 * Update the ring's dequeue segment and dequeue pointer 656 * to reflect the new position. 657 */ 658 ep_ring = cdnsp_get_transfer_ring(pdev, pep, deq_state->stream_id); 659 660 if (cdnsp_trb_is_link(ep_ring->dequeue)) { 661 ep_ring->deq_seg = ep_ring->deq_seg->next; 662 ep_ring->dequeue = ep_ring->deq_seg->trbs; 663 } 664 665 while (ep_ring->dequeue != deq_state->new_deq_ptr) { 666 ep_ring->num_trbs_free++; 667 ep_ring->dequeue++; 668 669 if (cdnsp_trb_is_link(ep_ring->dequeue)) { 670 if (ep_ring->dequeue == deq_state->new_deq_ptr) 671 break; 672 673 ep_ring->deq_seg = ep_ring->deq_seg->next; 674 ep_ring->dequeue = ep_ring->deq_seg->trbs; 675 } 676 } 677 678 /* 679 * Probably there was TIMEOUT during handling Set Dequeue Pointer 680 * command. It's critical error and controller will be stopped. 681 */ 682 if (ret) 683 return -ESHUTDOWN; 684 685 /* Restart any rings with pending requests */ 686 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 687 688 return 0; 689 } 690 691 int cdnsp_remove_request(struct cdnsp_device *pdev, 692 struct cdnsp_request *preq, 693 struct cdnsp_ep *pep) 694 { 695 struct cdnsp_dequeue_state deq_state; 696 struct cdnsp_td *cur_td = NULL; 697 struct cdnsp_ring *ep_ring; 698 struct cdnsp_segment *seg; 699 int status = -ECONNRESET; 700 int ret = 0; 701 u64 hw_deq; 702 703 memset(&deq_state, 0, sizeof(deq_state)); 704 705 trace_cdnsp_remove_request(pep->out_ctx); 706 trace_cdnsp_remove_request_td(preq); 707 708 cur_td = &preq->td; 709 ep_ring = cdnsp_request_to_transfer_ring(pdev, preq); 710 711 /* 712 * If we stopped on the TD we need to cancel, then we have to 713 * move the controller endpoint ring dequeue pointer past 714 * this TD. 715 */ 716 hw_deq = cdnsp_get_hw_deq(pdev, pep->idx, preq->request.stream_id); 717 hw_deq &= ~0xf; 718 719 seg = cdnsp_trb_in_td(pdev, cur_td->start_seg, cur_td->first_trb, 720 cur_td->last_trb, hw_deq); 721 722 if (seg && (pep->ep_state & EP_ENABLED) && 723 !(pep->ep_state & EP_DIS_IN_RROGRESS)) 724 cdnsp_find_new_dequeue_state(pdev, pep, preq->request.stream_id, 725 cur_td, &deq_state); 726 else 727 cdnsp_td_to_noop(pdev, ep_ring, cur_td, false); 728 729 /* 730 * The event handler won't see a completion for this TD anymore, 731 * so remove it from the endpoint ring's TD list. 732 */ 733 list_del_init(&cur_td->td_list); 734 ep_ring->num_tds--; 735 pep->stream_info.td_count--; 736 737 /* 738 * During disconnecting all endpoint will be disabled so we don't 739 * have to worry about updating dequeue pointer. 740 */ 741 if (pdev->cdnsp_state & CDNSP_STATE_DISCONNECT_PENDING || 742 pep->ep_state & EP_DIS_IN_RROGRESS) { 743 status = -ESHUTDOWN; 744 ret = cdnsp_cmd_set_deq(pdev, pep, &deq_state); 745 } 746 747 cdnsp_unmap_td_bounce_buffer(pdev, ep_ring, cur_td); 748 cdnsp_gadget_giveback(pep, cur_td->preq, status); 749 750 return ret; 751 } 752 753 static int cdnsp_update_port_id(struct cdnsp_device *pdev, u32 port_id) 754 { 755 struct cdnsp_port *port = pdev->active_port; 756 u8 old_port = 0; 757 758 if (port && port->port_num == port_id) 759 return 0; 760 761 if (port) 762 old_port = port->port_num; 763 764 if (port_id == pdev->usb2_port.port_num) { 765 port = &pdev->usb2_port; 766 } else if (port_id == pdev->usb3_port.port_num) { 767 port = &pdev->usb3_port; 768 } else { 769 dev_err(pdev->dev, "Port event with invalid port ID %d\n", 770 port_id); 771 return -EINVAL; 772 } 773 774 if (port_id != old_port) { 775 cdnsp_disable_slot(pdev); 776 pdev->active_port = port; 777 cdnsp_enable_slot(pdev); 778 } 779 780 if (port_id == pdev->usb2_port.port_num) 781 cdnsp_set_usb2_hardware_lpm(pdev, NULL, 1); 782 else 783 writel(PORT_U1_TIMEOUT(1) | PORT_U2_TIMEOUT(1), 784 &pdev->usb3_port.regs->portpmsc); 785 786 return 0; 787 } 788 789 static void cdnsp_handle_port_status(struct cdnsp_device *pdev, 790 union cdnsp_trb *event) 791 { 792 struct cdnsp_port_regs __iomem *port_regs; 793 u32 portsc, cmd_regs; 794 bool port2 = false; 795 u32 link_state; 796 u32 port_id; 797 798 /* Port status change events always have a successful completion code */ 799 if (GET_COMP_CODE(le32_to_cpu(event->generic.field[2])) != COMP_SUCCESS) 800 dev_err(pdev->dev, "ERR: incorrect PSC event\n"); 801 802 port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0])); 803 804 if (cdnsp_update_port_id(pdev, port_id)) 805 goto cleanup; 806 807 port_regs = pdev->active_port->regs; 808 809 if (port_id == pdev->usb2_port.port_num) 810 port2 = true; 811 812 new_event: 813 portsc = readl(&port_regs->portsc); 814 writel(cdnsp_port_state_to_neutral(portsc) | 815 (portsc & PORT_CHANGE_BITS), &port_regs->portsc); 816 817 trace_cdnsp_handle_port_status(pdev->active_port->port_num, portsc); 818 819 pdev->gadget.speed = cdnsp_port_speed(portsc); 820 link_state = portsc & PORT_PLS_MASK; 821 822 /* Port Link State change detected. */ 823 if ((portsc & PORT_PLC)) { 824 if (!(pdev->cdnsp_state & CDNSP_WAKEUP_PENDING) && 825 link_state == XDEV_RESUME) { 826 cmd_regs = readl(&pdev->op_regs->command); 827 if (!(cmd_regs & CMD_R_S)) 828 goto cleanup; 829 830 if (DEV_SUPERSPEED_ANY(portsc)) { 831 cdnsp_set_link_state(pdev, &port_regs->portsc, 832 XDEV_U0); 833 834 cdnsp_resume_gadget(pdev); 835 } 836 } 837 838 if ((pdev->cdnsp_state & CDNSP_WAKEUP_PENDING) && 839 link_state == XDEV_U0) { 840 pdev->cdnsp_state &= ~CDNSP_WAKEUP_PENDING; 841 842 cdnsp_force_header_wakeup(pdev, 1); 843 cdnsp_ring_cmd_db(pdev); 844 cdnsp_wait_for_cmd_compl(pdev); 845 } 846 847 if (link_state == XDEV_U0 && pdev->link_state == XDEV_U3 && 848 !DEV_SUPERSPEED_ANY(portsc)) 849 cdnsp_resume_gadget(pdev); 850 851 if (link_state == XDEV_U3 && pdev->link_state != XDEV_U3) 852 cdnsp_suspend_gadget(pdev); 853 854 pdev->link_state = link_state; 855 } 856 857 if (portsc & PORT_CSC) { 858 /* Detach device. */ 859 if (pdev->gadget.connected && !(portsc & PORT_CONNECT)) 860 cdnsp_disconnect_gadget(pdev); 861 862 /* Attach device. */ 863 if (portsc & PORT_CONNECT) { 864 if (!port2) 865 cdnsp_irq_reset(pdev); 866 867 usb_gadget_set_state(&pdev->gadget, USB_STATE_ATTACHED); 868 } 869 } 870 871 /* Port reset. */ 872 if ((portsc & (PORT_RC | PORT_WRC)) && (portsc & PORT_CONNECT)) { 873 cdnsp_irq_reset(pdev); 874 pdev->u1_allowed = 0; 875 pdev->u2_allowed = 0; 876 pdev->may_wakeup = 0; 877 } 878 879 if (portsc & PORT_CEC) 880 dev_err(pdev->dev, "Port Over Current detected\n"); 881 882 if (portsc & PORT_CEC) 883 dev_err(pdev->dev, "Port Configure Error detected\n"); 884 885 if (readl(&port_regs->portsc) & PORT_CHANGE_BITS) 886 goto new_event; 887 888 cleanup: 889 cdnsp_inc_deq(pdev, pdev->event_ring); 890 } 891 892 static void cdnsp_td_cleanup(struct cdnsp_device *pdev, 893 struct cdnsp_td *td, 894 struct cdnsp_ring *ep_ring, 895 int *status) 896 { 897 struct cdnsp_request *preq = td->preq; 898 899 /* if a bounce buffer was used to align this td then unmap it */ 900 cdnsp_unmap_td_bounce_buffer(pdev, ep_ring, td); 901 902 /* 903 * If the controller said we transferred more data than the buffer 904 * length, Play it safe and say we didn't transfer anything. 905 */ 906 if (preq->request.actual > preq->request.length) { 907 preq->request.actual = 0; 908 *status = 0; 909 } 910 911 list_del_init(&td->td_list); 912 ep_ring->num_tds--; 913 preq->pep->stream_info.td_count--; 914 915 cdnsp_gadget_giveback(preq->pep, preq, *status); 916 } 917 918 static void cdnsp_finish_td(struct cdnsp_device *pdev, 919 struct cdnsp_td *td, 920 struct cdnsp_transfer_event *event, 921 struct cdnsp_ep *ep, 922 int *status) 923 { 924 struct cdnsp_ring *ep_ring; 925 u32 trb_comp_code; 926 927 ep_ring = cdnsp_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 928 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 929 930 if (trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 931 trb_comp_code == COMP_STOPPED || 932 trb_comp_code == COMP_STOPPED_SHORT_PACKET) { 933 /* 934 * The Endpoint Stop Command completion will take care of any 935 * stopped TDs. A stopped TD may be restarted, so don't update 936 * the ring dequeue pointer or take this TD off any lists yet. 937 */ 938 return; 939 } 940 941 /* Update ring dequeue pointer */ 942 while (ep_ring->dequeue != td->last_trb) 943 cdnsp_inc_deq(pdev, ep_ring); 944 945 cdnsp_inc_deq(pdev, ep_ring); 946 947 cdnsp_td_cleanup(pdev, td, ep_ring, status); 948 } 949 950 /* sum trb lengths from ring dequeue up to stop_trb, _excluding_ stop_trb */ 951 static int cdnsp_sum_trb_lengths(struct cdnsp_device *pdev, 952 struct cdnsp_ring *ring, 953 union cdnsp_trb *stop_trb) 954 { 955 struct cdnsp_segment *seg = ring->deq_seg; 956 union cdnsp_trb *trb = ring->dequeue; 957 u32 sum; 958 959 for (sum = 0; trb != stop_trb; cdnsp_next_trb(pdev, ring, &seg, &trb)) { 960 if (!cdnsp_trb_is_noop(trb) && !cdnsp_trb_is_link(trb)) 961 sum += TRB_LEN(le32_to_cpu(trb->generic.field[2])); 962 } 963 return sum; 964 } 965 966 static int cdnsp_giveback_first_trb(struct cdnsp_device *pdev, 967 struct cdnsp_ep *pep, 968 unsigned int stream_id, 969 int start_cycle, 970 struct cdnsp_generic_trb *start_trb) 971 { 972 /* 973 * Pass all the TRBs to the hardware at once and make sure this write 974 * isn't reordered. 975 */ 976 wmb(); 977 978 if (start_cycle) 979 start_trb->field[3] |= cpu_to_le32(start_cycle); 980 else 981 start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE); 982 983 if ((pep->ep_state & EP_HAS_STREAMS) && 984 !pep->stream_info.first_prime_det) { 985 trace_cdnsp_wait_for_prime(pep, stream_id); 986 return 0; 987 } 988 989 return cdnsp_ring_ep_doorbell(pdev, pep, stream_id); 990 } 991 992 /* 993 * Process control tds, update USB request status and actual_length. 994 */ 995 static void cdnsp_process_ctrl_td(struct cdnsp_device *pdev, 996 struct cdnsp_td *td, 997 union cdnsp_trb *event_trb, 998 struct cdnsp_transfer_event *event, 999 struct cdnsp_ep *pep, 1000 int *status) 1001 { 1002 struct cdnsp_ring *ep_ring; 1003 u32 remaining; 1004 u32 trb_type; 1005 1006 trb_type = TRB_FIELD_TO_TYPE(le32_to_cpu(event_trb->generic.field[3])); 1007 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1008 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1009 1010 /* 1011 * if on data stage then update the actual_length of the USB 1012 * request and flag it as set, so it won't be overwritten in the event 1013 * for the last TRB. 1014 */ 1015 if (trb_type == TRB_DATA) { 1016 td->request_length_set = true; 1017 td->preq->request.actual = td->preq->request.length - remaining; 1018 } 1019 1020 /* at status stage */ 1021 if (!td->request_length_set) 1022 td->preq->request.actual = td->preq->request.length; 1023 1024 if (pdev->ep0_stage == CDNSP_DATA_STAGE && pep->number == 0 && 1025 pdev->three_stage_setup) { 1026 td = list_entry(ep_ring->td_list.next, struct cdnsp_td, 1027 td_list); 1028 pdev->ep0_stage = CDNSP_STATUS_STAGE; 1029 1030 cdnsp_giveback_first_trb(pdev, pep, 0, ep_ring->cycle_state, 1031 &td->last_trb->generic); 1032 return; 1033 } 1034 1035 *status = 0; 1036 1037 cdnsp_finish_td(pdev, td, event, pep, status); 1038 } 1039 1040 /* 1041 * Process isochronous tds, update usb request status and actual_length. 1042 */ 1043 static void cdnsp_process_isoc_td(struct cdnsp_device *pdev, 1044 struct cdnsp_td *td, 1045 union cdnsp_trb *ep_trb, 1046 struct cdnsp_transfer_event *event, 1047 struct cdnsp_ep *pep, 1048 int status) 1049 { 1050 struct cdnsp_request *preq = td->preq; 1051 u32 remaining, requested, ep_trb_len; 1052 bool sum_trbs_for_length = false; 1053 struct cdnsp_ring *ep_ring; 1054 u32 trb_comp_code; 1055 u32 td_length; 1056 1057 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1058 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1059 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1060 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2])); 1061 1062 requested = preq->request.length; 1063 1064 /* handle completion code */ 1065 switch (trb_comp_code) { 1066 case COMP_SUCCESS: 1067 preq->request.status = 0; 1068 break; 1069 case COMP_SHORT_PACKET: 1070 preq->request.status = 0; 1071 sum_trbs_for_length = true; 1072 break; 1073 case COMP_ISOCH_BUFFER_OVERRUN: 1074 case COMP_BABBLE_DETECTED_ERROR: 1075 preq->request.status = -EOVERFLOW; 1076 break; 1077 case COMP_STOPPED: 1078 sum_trbs_for_length = true; 1079 break; 1080 case COMP_STOPPED_SHORT_PACKET: 1081 /* field normally containing residue now contains transferred */ 1082 preq->request.status = 0; 1083 requested = remaining; 1084 break; 1085 case COMP_STOPPED_LENGTH_INVALID: 1086 requested = 0; 1087 remaining = 0; 1088 break; 1089 default: 1090 sum_trbs_for_length = true; 1091 preq->request.status = -1; 1092 break; 1093 } 1094 1095 if (sum_trbs_for_length) { 1096 td_length = cdnsp_sum_trb_lengths(pdev, ep_ring, ep_trb); 1097 td_length += ep_trb_len - remaining; 1098 } else { 1099 td_length = requested; 1100 } 1101 1102 td->preq->request.actual += td_length; 1103 1104 cdnsp_finish_td(pdev, td, event, pep, &status); 1105 } 1106 1107 static void cdnsp_skip_isoc_td(struct cdnsp_device *pdev, 1108 struct cdnsp_td *td, 1109 struct cdnsp_transfer_event *event, 1110 struct cdnsp_ep *pep, 1111 int status) 1112 { 1113 struct cdnsp_ring *ep_ring; 1114 1115 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1116 td->preq->request.status = -EXDEV; 1117 td->preq->request.actual = 0; 1118 1119 /* Update ring dequeue pointer */ 1120 while (ep_ring->dequeue != td->last_trb) 1121 cdnsp_inc_deq(pdev, ep_ring); 1122 1123 cdnsp_inc_deq(pdev, ep_ring); 1124 1125 cdnsp_td_cleanup(pdev, td, ep_ring, &status); 1126 } 1127 1128 /* 1129 * Process bulk and interrupt tds, update usb request status and actual_length. 1130 */ 1131 static void cdnsp_process_bulk_intr_td(struct cdnsp_device *pdev, 1132 struct cdnsp_td *td, 1133 union cdnsp_trb *ep_trb, 1134 struct cdnsp_transfer_event *event, 1135 struct cdnsp_ep *ep, 1136 int *status) 1137 { 1138 u32 remaining, requested, ep_trb_len; 1139 struct cdnsp_ring *ep_ring; 1140 u32 trb_comp_code; 1141 1142 ep_ring = cdnsp_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); 1143 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1144 remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1145 ep_trb_len = TRB_LEN(le32_to_cpu(ep_trb->generic.field[2])); 1146 requested = td->preq->request.length; 1147 1148 switch (trb_comp_code) { 1149 case COMP_SUCCESS: 1150 case COMP_SHORT_PACKET: 1151 *status = 0; 1152 break; 1153 case COMP_STOPPED_SHORT_PACKET: 1154 td->preq->request.actual = remaining; 1155 goto finish_td; 1156 case COMP_STOPPED_LENGTH_INVALID: 1157 /* Stopped on ep trb with invalid length, exclude it. */ 1158 ep_trb_len = 0; 1159 remaining = 0; 1160 break; 1161 } 1162 1163 if (ep_trb == td->last_trb) 1164 ep_trb_len = requested - remaining; 1165 else 1166 ep_trb_len = cdnsp_sum_trb_lengths(pdev, ep_ring, ep_trb) + 1167 ep_trb_len - remaining; 1168 td->preq->request.actual = ep_trb_len; 1169 1170 finish_td: 1171 ep->stream_info.drbls_count--; 1172 1173 cdnsp_finish_td(pdev, td, event, ep, status); 1174 } 1175 1176 static void cdnsp_handle_tx_nrdy(struct cdnsp_device *pdev, 1177 struct cdnsp_transfer_event *event) 1178 { 1179 struct cdnsp_generic_trb *generic; 1180 struct cdnsp_ring *ep_ring; 1181 struct cdnsp_ep *pep; 1182 int cur_stream; 1183 int ep_index; 1184 int host_sid; 1185 int dev_sid; 1186 1187 generic = (struct cdnsp_generic_trb *)event; 1188 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; 1189 dev_sid = TRB_TO_DEV_STREAM(le32_to_cpu(generic->field[0])); 1190 host_sid = TRB_TO_HOST_STREAM(le32_to_cpu(generic->field[2])); 1191 1192 pep = &pdev->eps[ep_index]; 1193 1194 if (!(pep->ep_state & EP_HAS_STREAMS)) 1195 return; 1196 1197 if (host_sid == STREAM_PRIME_ACK) { 1198 pep->stream_info.first_prime_det = 1; 1199 for (cur_stream = 1; cur_stream < pep->stream_info.num_streams; 1200 cur_stream++) { 1201 ep_ring = pep->stream_info.stream_rings[cur_stream]; 1202 ep_ring->stream_active = 1; 1203 ep_ring->stream_rejected = 0; 1204 } 1205 } 1206 1207 if (host_sid == STREAM_REJECTED) { 1208 struct cdnsp_td *td, *td_temp; 1209 1210 pep->stream_info.drbls_count--; 1211 ep_ring = pep->stream_info.stream_rings[dev_sid]; 1212 ep_ring->stream_active = 0; 1213 ep_ring->stream_rejected = 1; 1214 1215 list_for_each_entry_safe(td, td_temp, &ep_ring->td_list, 1216 td_list) { 1217 td->drbl = 0; 1218 } 1219 } 1220 1221 cdnsp_ring_doorbell_for_active_rings(pdev, pep); 1222 } 1223 1224 /* 1225 * If this function returns an error condition, it means it got a Transfer 1226 * event with a corrupted TRB DMA address or endpoint is disabled. 1227 */ 1228 static int cdnsp_handle_tx_event(struct cdnsp_device *pdev, 1229 struct cdnsp_transfer_event *event) 1230 { 1231 const struct usb_endpoint_descriptor *desc; 1232 bool handling_skipped_tds = false; 1233 struct cdnsp_segment *ep_seg; 1234 struct cdnsp_ring *ep_ring; 1235 int status = -EINPROGRESS; 1236 union cdnsp_trb *ep_trb; 1237 dma_addr_t ep_trb_dma; 1238 struct cdnsp_ep *pep; 1239 struct cdnsp_td *td; 1240 u32 trb_comp_code; 1241 int invalidate; 1242 int ep_index; 1243 1244 invalidate = le32_to_cpu(event->flags) & TRB_EVENT_INVALIDATE; 1245 ep_index = TRB_TO_EP_ID(le32_to_cpu(event->flags)) - 1; 1246 trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); 1247 ep_trb_dma = le64_to_cpu(event->buffer); 1248 1249 pep = &pdev->eps[ep_index]; 1250 ep_ring = cdnsp_dma_to_transfer_ring(pep, le64_to_cpu(event->buffer)); 1251 1252 /* 1253 * If device is disconnect then all requests will be dequeued 1254 * by upper layers as part of disconnect sequence. 1255 * We don't want handle such event to avoid racing. 1256 */ 1257 if (invalidate || !pdev->gadget.connected) 1258 goto cleanup; 1259 1260 if (GET_EP_CTX_STATE(pep->out_ctx) == EP_STATE_DISABLED) { 1261 trace_cdnsp_ep_disabled(pep->out_ctx); 1262 goto err_out; 1263 } 1264 1265 /* Some transfer events don't always point to a trb*/ 1266 if (!ep_ring) { 1267 switch (trb_comp_code) { 1268 case COMP_INVALID_STREAM_TYPE_ERROR: 1269 case COMP_INVALID_STREAM_ID_ERROR: 1270 case COMP_RING_UNDERRUN: 1271 case COMP_RING_OVERRUN: 1272 goto cleanup; 1273 default: 1274 dev_err(pdev->dev, "ERROR: %s event for unknown ring\n", 1275 pep->name); 1276 goto err_out; 1277 } 1278 } 1279 1280 /* Look for some error cases that need special treatment. */ 1281 switch (trb_comp_code) { 1282 case COMP_BABBLE_DETECTED_ERROR: 1283 status = -EOVERFLOW; 1284 break; 1285 case COMP_RING_UNDERRUN: 1286 case COMP_RING_OVERRUN: 1287 /* 1288 * When the Isoch ring is empty, the controller will generate 1289 * a Ring Overrun Event for IN Isoch endpoint or Ring 1290 * Underrun Event for OUT Isoch endpoint. 1291 */ 1292 goto cleanup; 1293 case COMP_MISSED_SERVICE_ERROR: 1294 /* 1295 * When encounter missed service error, one or more isoc tds 1296 * may be missed by controller. 1297 * Set skip flag of the ep_ring; Complete the missed tds as 1298 * short transfer when process the ep_ring next time. 1299 */ 1300 pep->skip = true; 1301 break; 1302 } 1303 1304 do { 1305 /* 1306 * This TRB should be in the TD at the head of this ring's TD 1307 * list. 1308 */ 1309 if (list_empty(&ep_ring->td_list)) { 1310 /* 1311 * Don't print warnings if it's due to a stopped 1312 * endpoint generating an extra completion event, or 1313 * a event for the last TRB of a short TD we already 1314 * got a short event for. 1315 * The short TD is already removed from the TD list. 1316 */ 1317 if (!(trb_comp_code == COMP_STOPPED || 1318 trb_comp_code == COMP_STOPPED_LENGTH_INVALID || 1319 ep_ring->last_td_was_short)) 1320 trace_cdnsp_trb_without_td(ep_ring, 1321 (struct cdnsp_generic_trb *)event); 1322 1323 if (pep->skip) { 1324 pep->skip = false; 1325 trace_cdnsp_ep_list_empty_with_skip(pep, 0); 1326 } 1327 1328 goto cleanup; 1329 } 1330 1331 td = list_entry(ep_ring->td_list.next, struct cdnsp_td, 1332 td_list); 1333 1334 /* Is this a TRB in the currently executing TD? */ 1335 ep_seg = cdnsp_trb_in_td(pdev, ep_ring->deq_seg, 1336 ep_ring->dequeue, td->last_trb, 1337 ep_trb_dma); 1338 1339 desc = td->preq->pep->endpoint.desc; 1340 1341 if (ep_seg) { 1342 ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) 1343 / sizeof(*ep_trb)]; 1344 1345 trace_cdnsp_handle_transfer(ep_ring, 1346 (struct cdnsp_generic_trb *)ep_trb); 1347 1348 if (pep->skip && usb_endpoint_xfer_isoc(desc) && 1349 td->last_trb != ep_trb) 1350 return -EAGAIN; 1351 } 1352 1353 /* 1354 * Skip the Force Stopped Event. The event_trb(ep_trb_dma) 1355 * of FSE is not in the current TD pointed by ep_ring->dequeue 1356 * because that the hardware dequeue pointer still at the 1357 * previous TRB of the current TD. The previous TRB maybe a 1358 * Link TD or the last TRB of the previous TD. The command 1359 * completion handle will take care the rest. 1360 */ 1361 if (!ep_seg && (trb_comp_code == COMP_STOPPED || 1362 trb_comp_code == COMP_STOPPED_LENGTH_INVALID)) { 1363 pep->skip = false; 1364 goto cleanup; 1365 } 1366 1367 if (!ep_seg) { 1368 if (!pep->skip || !usb_endpoint_xfer_isoc(desc)) { 1369 /* Something is busted, give up! */ 1370 dev_err(pdev->dev, 1371 "ERROR Transfer event TRB DMA ptr not " 1372 "part of current TD ep_index %d " 1373 "comp_code %u\n", ep_index, 1374 trb_comp_code); 1375 return -EINVAL; 1376 } 1377 1378 cdnsp_skip_isoc_td(pdev, td, event, pep, status); 1379 goto cleanup; 1380 } 1381 1382 if (trb_comp_code == COMP_SHORT_PACKET) 1383 ep_ring->last_td_was_short = true; 1384 else 1385 ep_ring->last_td_was_short = false; 1386 1387 if (pep->skip) { 1388 pep->skip = false; 1389 cdnsp_skip_isoc_td(pdev, td, event, pep, status); 1390 goto cleanup; 1391 } 1392 1393 if (cdnsp_trb_is_noop(ep_trb)) 1394 goto cleanup; 1395 1396 if (usb_endpoint_xfer_control(desc)) 1397 cdnsp_process_ctrl_td(pdev, td, ep_trb, event, pep, 1398 &status); 1399 else if (usb_endpoint_xfer_isoc(desc)) 1400 cdnsp_process_isoc_td(pdev, td, ep_trb, event, pep, 1401 status); 1402 else 1403 cdnsp_process_bulk_intr_td(pdev, td, ep_trb, event, pep, 1404 &status); 1405 cleanup: 1406 handling_skipped_tds = pep->skip; 1407 1408 /* 1409 * Do not update event ring dequeue pointer if we're in a loop 1410 * processing missed tds. 1411 */ 1412 if (!handling_skipped_tds) 1413 cdnsp_inc_deq(pdev, pdev->event_ring); 1414 1415 /* 1416 * If ep->skip is set, it means there are missed tds on the 1417 * endpoint ring need to take care of. 1418 * Process them as short transfer until reach the td pointed by 1419 * the event. 1420 */ 1421 } while (handling_skipped_tds); 1422 return 0; 1423 1424 err_out: 1425 dev_err(pdev->dev, "@%016llx %08x %08x %08x %08x\n", 1426 (unsigned long long) 1427 cdnsp_trb_virt_to_dma(pdev->event_ring->deq_seg, 1428 pdev->event_ring->dequeue), 1429 lower_32_bits(le64_to_cpu(event->buffer)), 1430 upper_32_bits(le64_to_cpu(event->buffer)), 1431 le32_to_cpu(event->transfer_len), 1432 le32_to_cpu(event->flags)); 1433 return -EINVAL; 1434 } 1435 1436 /* 1437 * This function handles all events on the event ring. 1438 * Returns true for "possibly more events to process" (caller should call 1439 * again), otherwise false if done. 1440 */ 1441 static bool cdnsp_handle_event(struct cdnsp_device *pdev) 1442 { 1443 unsigned int comp_code; 1444 union cdnsp_trb *event; 1445 bool update_ptrs = true; 1446 u32 cycle_bit; 1447 int ret = 0; 1448 u32 flags; 1449 1450 event = pdev->event_ring->dequeue; 1451 flags = le32_to_cpu(event->event_cmd.flags); 1452 cycle_bit = (flags & TRB_CYCLE); 1453 1454 /* Does the controller or driver own the TRB? */ 1455 if (cycle_bit != pdev->event_ring->cycle_state) 1456 return false; 1457 1458 trace_cdnsp_handle_event(pdev->event_ring, &event->generic); 1459 1460 /* 1461 * Barrier between reading the TRB_CYCLE (valid) flag above and any 1462 * reads of the event's flags/data below. 1463 */ 1464 rmb(); 1465 1466 switch (flags & TRB_TYPE_BITMASK) { 1467 case TRB_TYPE(TRB_COMPLETION): 1468 /* 1469 * Command can't be handled in interrupt context so just 1470 * increment command ring dequeue pointer. 1471 */ 1472 cdnsp_inc_deq(pdev, pdev->cmd_ring); 1473 break; 1474 case TRB_TYPE(TRB_PORT_STATUS): 1475 cdnsp_handle_port_status(pdev, event); 1476 update_ptrs = false; 1477 break; 1478 case TRB_TYPE(TRB_TRANSFER): 1479 ret = cdnsp_handle_tx_event(pdev, &event->trans_event); 1480 if (ret >= 0) 1481 update_ptrs = false; 1482 break; 1483 case TRB_TYPE(TRB_SETUP): 1484 pdev->ep0_stage = CDNSP_SETUP_STAGE; 1485 pdev->setup_id = TRB_SETUPID_TO_TYPE(flags); 1486 pdev->setup_speed = TRB_SETUP_SPEEDID(flags); 1487 pdev->setup = *((struct usb_ctrlrequest *) 1488 &event->trans_event.buffer); 1489 1490 cdnsp_setup_analyze(pdev); 1491 break; 1492 case TRB_TYPE(TRB_ENDPOINT_NRDY): 1493 cdnsp_handle_tx_nrdy(pdev, &event->trans_event); 1494 break; 1495 case TRB_TYPE(TRB_HC_EVENT): { 1496 comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2])); 1497 1498 switch (comp_code) { 1499 case COMP_EVENT_RING_FULL_ERROR: 1500 dev_err(pdev->dev, "Event Ring Full\n"); 1501 break; 1502 default: 1503 dev_err(pdev->dev, "Controller error code 0x%02x\n", 1504 comp_code); 1505 } 1506 1507 break; 1508 } 1509 case TRB_TYPE(TRB_MFINDEX_WRAP): 1510 case TRB_TYPE(TRB_DRB_OVERFLOW): 1511 break; 1512 default: 1513 dev_warn(pdev->dev, "ERROR unknown event type %ld\n", 1514 TRB_FIELD_TO_TYPE(flags)); 1515 } 1516 1517 if (update_ptrs) 1518 /* Update SW event ring dequeue pointer. */ 1519 cdnsp_inc_deq(pdev, pdev->event_ring); 1520 1521 /* 1522 * Caller will call us again to check if there are more items 1523 * on the event ring. 1524 */ 1525 return true; 1526 } 1527 1528 irqreturn_t cdnsp_thread_irq_handler(int irq, void *data) 1529 { 1530 struct cdnsp_device *pdev = (struct cdnsp_device *)data; 1531 union cdnsp_trb *event_ring_deq; 1532 unsigned long flags; 1533 int counter = 0; 1534 1535 local_bh_disable(); 1536 spin_lock_irqsave(&pdev->lock, flags); 1537 1538 if (pdev->cdnsp_state & (CDNSP_STATE_HALTED | CDNSP_STATE_DYING)) { 1539 /* 1540 * While removing or stopping driver there may still be deferred 1541 * not handled interrupt which should not be treated as error. 1542 * Driver should simply ignore it. 1543 */ 1544 if (pdev->gadget_driver) 1545 cdnsp_died(pdev); 1546 1547 spin_unlock_irqrestore(&pdev->lock, flags); 1548 local_bh_enable(); 1549 return IRQ_HANDLED; 1550 } 1551 1552 event_ring_deq = pdev->event_ring->dequeue; 1553 1554 while (cdnsp_handle_event(pdev)) { 1555 if (++counter >= TRBS_PER_EV_DEQ_UPDATE) { 1556 cdnsp_update_erst_dequeue(pdev, event_ring_deq, 0); 1557 event_ring_deq = pdev->event_ring->dequeue; 1558 counter = 0; 1559 } 1560 } 1561 1562 cdnsp_update_erst_dequeue(pdev, event_ring_deq, 1); 1563 1564 spin_unlock_irqrestore(&pdev->lock, flags); 1565 local_bh_enable(); 1566 1567 return IRQ_HANDLED; 1568 } 1569 1570 irqreturn_t cdnsp_irq_handler(int irq, void *priv) 1571 { 1572 struct cdnsp_device *pdev = (struct cdnsp_device *)priv; 1573 u32 irq_pending; 1574 u32 status; 1575 1576 status = readl(&pdev->op_regs->status); 1577 1578 if (status == ~(u32)0) { 1579 cdnsp_died(pdev); 1580 return IRQ_HANDLED; 1581 } 1582 1583 if (!(status & STS_EINT)) 1584 return IRQ_NONE; 1585 1586 writel(status | STS_EINT, &pdev->op_regs->status); 1587 irq_pending = readl(&pdev->ir_set->irq_pending); 1588 irq_pending |= IMAN_IP; 1589 writel(irq_pending, &pdev->ir_set->irq_pending); 1590 1591 if (status & STS_FATAL) { 1592 cdnsp_died(pdev); 1593 return IRQ_HANDLED; 1594 } 1595 1596 return IRQ_WAKE_THREAD; 1597 } 1598 1599 /* 1600 * Generic function for queuing a TRB on a ring. 1601 * The caller must have checked to make sure there's room on the ring. 1602 * 1603 * @more_trbs_coming: Will you enqueue more TRBs before setting doorbell? 1604 */ 1605 static void cdnsp_queue_trb(struct cdnsp_device *pdev, struct cdnsp_ring *ring, 1606 bool more_trbs_coming, u32 field1, u32 field2, 1607 u32 field3, u32 field4) 1608 { 1609 struct cdnsp_generic_trb *trb; 1610 1611 trb = &ring->enqueue->generic; 1612 1613 trb->field[0] = cpu_to_le32(field1); 1614 trb->field[1] = cpu_to_le32(field2); 1615 trb->field[2] = cpu_to_le32(field3); 1616 trb->field[3] = cpu_to_le32(field4); 1617 1618 trace_cdnsp_queue_trb(ring, trb); 1619 cdnsp_inc_enq(pdev, ring, more_trbs_coming); 1620 } 1621 1622 /* 1623 * Does various checks on the endpoint ring, and makes it ready to 1624 * queue num_trbs. 1625 */ 1626 static int cdnsp_prepare_ring(struct cdnsp_device *pdev, 1627 struct cdnsp_ring *ep_ring, 1628 u32 ep_state, unsigned 1629 int num_trbs, 1630 gfp_t mem_flags) 1631 { 1632 unsigned int num_trbs_needed; 1633 1634 /* Make sure the endpoint has been added to controller schedule. */ 1635 switch (ep_state) { 1636 case EP_STATE_STOPPED: 1637 case EP_STATE_RUNNING: 1638 case EP_STATE_HALTED: 1639 break; 1640 default: 1641 dev_err(pdev->dev, "ERROR: incorrect endpoint state\n"); 1642 return -EINVAL; 1643 } 1644 1645 while (1) { 1646 if (cdnsp_room_on_ring(pdev, ep_ring, num_trbs)) 1647 break; 1648 1649 trace_cdnsp_no_room_on_ring("try ring expansion"); 1650 1651 num_trbs_needed = num_trbs - ep_ring->num_trbs_free; 1652 if (cdnsp_ring_expansion(pdev, ep_ring, num_trbs_needed, 1653 mem_flags)) { 1654 dev_err(pdev->dev, "Ring expansion failed\n"); 1655 return -ENOMEM; 1656 } 1657 } 1658 1659 while (cdnsp_trb_is_link(ep_ring->enqueue)) { 1660 ep_ring->enqueue->link.control |= cpu_to_le32(TRB_CHAIN); 1661 /* The cycle bit must be set as the last operation. */ 1662 wmb(); 1663 ep_ring->enqueue->link.control ^= cpu_to_le32(TRB_CYCLE); 1664 1665 /* Toggle the cycle bit after the last ring segment. */ 1666 if (cdnsp_link_trb_toggles_cycle(ep_ring->enqueue)) 1667 ep_ring->cycle_state ^= 1; 1668 ep_ring->enq_seg = ep_ring->enq_seg->next; 1669 ep_ring->enqueue = ep_ring->enq_seg->trbs; 1670 } 1671 return 0; 1672 } 1673 1674 static int cdnsp_prepare_transfer(struct cdnsp_device *pdev, 1675 struct cdnsp_request *preq, 1676 unsigned int num_trbs) 1677 { 1678 struct cdnsp_ring *ep_ring; 1679 int ret; 1680 1681 ep_ring = cdnsp_get_transfer_ring(pdev, preq->pep, 1682 preq->request.stream_id); 1683 if (!ep_ring) 1684 return -EINVAL; 1685 1686 ret = cdnsp_prepare_ring(pdev, ep_ring, 1687 GET_EP_CTX_STATE(preq->pep->out_ctx), 1688 num_trbs, GFP_ATOMIC); 1689 if (ret) 1690 return ret; 1691 1692 INIT_LIST_HEAD(&preq->td.td_list); 1693 preq->td.preq = preq; 1694 1695 /* Add this TD to the tail of the endpoint ring's TD list. */ 1696 list_add_tail(&preq->td.td_list, &ep_ring->td_list); 1697 ep_ring->num_tds++; 1698 preq->pep->stream_info.td_count++; 1699 1700 preq->td.start_seg = ep_ring->enq_seg; 1701 preq->td.first_trb = ep_ring->enqueue; 1702 1703 return 0; 1704 } 1705 1706 static unsigned int cdnsp_count_trbs(u64 addr, u64 len) 1707 { 1708 unsigned int num_trbs; 1709 1710 num_trbs = DIV_ROUND_UP(len + (addr & (TRB_MAX_BUFF_SIZE - 1)), 1711 TRB_MAX_BUFF_SIZE); 1712 if (num_trbs == 0) 1713 num_trbs++; 1714 1715 return num_trbs; 1716 } 1717 1718 static unsigned int count_trbs_needed(struct cdnsp_request *preq) 1719 { 1720 return cdnsp_count_trbs(preq->request.dma, preq->request.length); 1721 } 1722 1723 static unsigned int count_sg_trbs_needed(struct cdnsp_request *preq) 1724 { 1725 unsigned int i, len, full_len, num_trbs = 0; 1726 struct scatterlist *sg; 1727 1728 full_len = preq->request.length; 1729 1730 for_each_sg(preq->request.sg, sg, preq->request.num_sgs, i) { 1731 len = sg_dma_len(sg); 1732 num_trbs += cdnsp_count_trbs(sg_dma_address(sg), len); 1733 len = min(len, full_len); 1734 full_len -= len; 1735 if (full_len == 0) 1736 break; 1737 } 1738 1739 return num_trbs; 1740 } 1741 1742 static void cdnsp_check_trb_math(struct cdnsp_request *preq, int running_total) 1743 { 1744 if (running_total != preq->request.length) 1745 dev_err(preq->pep->pdev->dev, 1746 "%s - Miscalculated tx length, " 1747 "queued %#x, asked for %#x (%d)\n", 1748 preq->pep->name, running_total, 1749 preq->request.length, preq->request.actual); 1750 } 1751 1752 /* 1753 * TD size is the number of max packet sized packets remaining in the TD 1754 * (*not* including this TRB). 1755 * 1756 * Total TD packet count = total_packet_count = 1757 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize) 1758 * 1759 * Packets transferred up to and including this TRB = packets_transferred = 1760 * rounddown(total bytes transferred including this TRB / wMaxPacketSize) 1761 * 1762 * TD size = total_packet_count - packets_transferred 1763 * 1764 * It must fit in bits 21:17, so it can't be bigger than 31. 1765 * This is taken care of in the TRB_TD_SIZE() macro 1766 * 1767 * The last TRB in a TD must have the TD size set to zero. 1768 */ 1769 static u32 cdnsp_td_remainder(struct cdnsp_device *pdev, 1770 int transferred, 1771 int trb_buff_len, 1772 unsigned int td_total_len, 1773 struct cdnsp_request *preq, 1774 bool more_trbs_coming, 1775 bool zlp) 1776 { 1777 u32 maxp, total_packet_count; 1778 1779 /* Before ZLP driver needs set TD_SIZE = 1. */ 1780 if (zlp) 1781 return 1; 1782 1783 /* One TRB with a zero-length data packet. */ 1784 if (!more_trbs_coming || (transferred == 0 && trb_buff_len == 0) || 1785 trb_buff_len == td_total_len) 1786 return 0; 1787 1788 maxp = usb_endpoint_maxp(preq->pep->endpoint.desc); 1789 total_packet_count = DIV_ROUND_UP(td_total_len, maxp); 1790 1791 /* Queuing functions don't count the current TRB into transferred. */ 1792 return (total_packet_count - ((transferred + trb_buff_len) / maxp)); 1793 } 1794 1795 static int cdnsp_align_td(struct cdnsp_device *pdev, 1796 struct cdnsp_request *preq, u32 enqd_len, 1797 u32 *trb_buff_len, struct cdnsp_segment *seg) 1798 { 1799 struct device *dev = pdev->dev; 1800 unsigned int unalign; 1801 unsigned int max_pkt; 1802 u32 new_buff_len; 1803 1804 max_pkt = usb_endpoint_maxp(preq->pep->endpoint.desc); 1805 unalign = (enqd_len + *trb_buff_len) % max_pkt; 1806 1807 /* We got lucky, last normal TRB data on segment is packet aligned. */ 1808 if (unalign == 0) 1809 return 0; 1810 1811 /* Is the last nornal TRB alignable by splitting it. */ 1812 if (*trb_buff_len > unalign) { 1813 *trb_buff_len -= unalign; 1814 trace_cdnsp_bounce_align_td_split(preq, *trb_buff_len, 1815 enqd_len, 0, unalign); 1816 return 0; 1817 } 1818 1819 /* 1820 * We want enqd_len + trb_buff_len to sum up to a number aligned to 1821 * number which is divisible by the endpoint's wMaxPacketSize. IOW: 1822 * (size of currently enqueued TRBs + remainder) % wMaxPacketSize == 0. 1823 */ 1824 new_buff_len = max_pkt - (enqd_len % max_pkt); 1825 1826 if (new_buff_len > (preq->request.length - enqd_len)) 1827 new_buff_len = (preq->request.length - enqd_len); 1828 1829 /* Create a max max_pkt sized bounce buffer pointed to by last trb. */ 1830 if (preq->direction) { 1831 sg_pcopy_to_buffer(preq->request.sg, 1832 preq->request.num_mapped_sgs, 1833 seg->bounce_buf, new_buff_len, enqd_len); 1834 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf, 1835 max_pkt, DMA_TO_DEVICE); 1836 } else { 1837 seg->bounce_dma = dma_map_single(dev, seg->bounce_buf, 1838 max_pkt, DMA_FROM_DEVICE); 1839 } 1840 1841 if (dma_mapping_error(dev, seg->bounce_dma)) { 1842 /* Try without aligning.*/ 1843 dev_warn(pdev->dev, 1844 "Failed mapping bounce buffer, not aligning\n"); 1845 return 0; 1846 } 1847 1848 *trb_buff_len = new_buff_len; 1849 seg->bounce_len = new_buff_len; 1850 seg->bounce_offs = enqd_len; 1851 1852 trace_cdnsp_bounce_map(preq, new_buff_len, enqd_len, seg->bounce_dma, 1853 unalign); 1854 1855 /* 1856 * Bounce buffer successful aligned and seg->bounce_dma will be used 1857 * in transfer TRB as new transfer buffer address. 1858 */ 1859 return 1; 1860 } 1861 1862 int cdnsp_queue_bulk_tx(struct cdnsp_device *pdev, struct cdnsp_request *preq) 1863 { 1864 unsigned int enqd_len, block_len, trb_buff_len, full_len; 1865 unsigned int start_cycle, num_sgs = 0; 1866 struct cdnsp_generic_trb *start_trb; 1867 u32 field, length_field, remainder; 1868 struct scatterlist *sg = NULL; 1869 bool more_trbs_coming = true; 1870 bool need_zero_pkt = false; 1871 bool zero_len_trb = false; 1872 struct cdnsp_ring *ring; 1873 bool first_trb = true; 1874 unsigned int num_trbs; 1875 struct cdnsp_ep *pep; 1876 u64 addr, send_addr; 1877 int sent_len, ret; 1878 1879 ring = cdnsp_request_to_transfer_ring(pdev, preq); 1880 if (!ring) 1881 return -EINVAL; 1882 1883 full_len = preq->request.length; 1884 1885 if (preq->request.num_sgs) { 1886 num_sgs = preq->request.num_sgs; 1887 sg = preq->request.sg; 1888 addr = (u64)sg_dma_address(sg); 1889 block_len = sg_dma_len(sg); 1890 num_trbs = count_sg_trbs_needed(preq); 1891 } else { 1892 num_trbs = count_trbs_needed(preq); 1893 addr = (u64)preq->request.dma; 1894 block_len = full_len; 1895 } 1896 1897 pep = preq->pep; 1898 1899 /* Deal with request.zero - need one more td/trb. */ 1900 if (preq->request.zero && preq->request.length && 1901 IS_ALIGNED(full_len, usb_endpoint_maxp(pep->endpoint.desc))) { 1902 need_zero_pkt = true; 1903 num_trbs++; 1904 } 1905 1906 ret = cdnsp_prepare_transfer(pdev, preq, num_trbs); 1907 if (ret) 1908 return ret; 1909 1910 /* 1911 * workaround 1: STOP EP command on LINK TRB with TC bit set to 1 1912 * causes that internal cycle bit can have incorrect state after 1913 * command complete. In consequence empty transfer ring can be 1914 * incorrectly detected when EP is resumed. 1915 * NOP TRB before LINK TRB avoid such scenario. STOP EP command is 1916 * then on NOP TRB and internal cycle bit is not changed and have 1917 * correct value. 1918 */ 1919 if (pep->wa1_nop_trb) { 1920 field = le32_to_cpu(pep->wa1_nop_trb->trans_event.flags); 1921 field ^= TRB_CYCLE; 1922 1923 pep->wa1_nop_trb->trans_event.flags = cpu_to_le32(field); 1924 pep->wa1_nop_trb = NULL; 1925 } 1926 1927 /* 1928 * Don't give the first TRB to the hardware (by toggling the cycle bit) 1929 * until we've finished creating all the other TRBs. The ring's cycle 1930 * state may change as we enqueue the other TRBs, so save it too. 1931 */ 1932 start_trb = &ring->enqueue->generic; 1933 start_cycle = ring->cycle_state; 1934 send_addr = addr; 1935 1936 /* Queue the TRBs, even if they are zero-length */ 1937 for (enqd_len = 0; zero_len_trb || first_trb || enqd_len < full_len; 1938 enqd_len += trb_buff_len) { 1939 field = TRB_TYPE(TRB_NORMAL); 1940 1941 /* TRB buffer should not cross 64KB boundaries */ 1942 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr); 1943 trb_buff_len = min(trb_buff_len, block_len); 1944 if (enqd_len + trb_buff_len > full_len) 1945 trb_buff_len = full_len - enqd_len; 1946 1947 /* Don't change the cycle bit of the first TRB until later */ 1948 if (first_trb) { 1949 first_trb = false; 1950 if (start_cycle == 0) 1951 field |= TRB_CYCLE; 1952 } else { 1953 field |= ring->cycle_state; 1954 } 1955 1956 /* 1957 * Chain all the TRBs together; clear the chain bit in the last 1958 * TRB to indicate it's the last TRB in the chain. 1959 */ 1960 if (enqd_len + trb_buff_len < full_len || need_zero_pkt) { 1961 field |= TRB_CHAIN; 1962 if (cdnsp_trb_is_link(ring->enqueue + 1)) { 1963 if (cdnsp_align_td(pdev, preq, enqd_len, 1964 &trb_buff_len, 1965 ring->enq_seg)) { 1966 send_addr = ring->enq_seg->bounce_dma; 1967 /* Assuming TD won't span 2 segs */ 1968 preq->td.bounce_seg = ring->enq_seg; 1969 } 1970 } 1971 } 1972 1973 if (enqd_len + trb_buff_len >= full_len) { 1974 if (need_zero_pkt && !zero_len_trb) { 1975 zero_len_trb = true; 1976 } else { 1977 zero_len_trb = false; 1978 field &= ~TRB_CHAIN; 1979 field |= TRB_IOC; 1980 more_trbs_coming = false; 1981 need_zero_pkt = false; 1982 preq->td.last_trb = ring->enqueue; 1983 } 1984 } 1985 1986 /* Only set interrupt on short packet for OUT endpoints. */ 1987 if (!preq->direction) 1988 field |= TRB_ISP; 1989 1990 /* Set the TRB length, TD size, and interrupter fields. */ 1991 remainder = cdnsp_td_remainder(pdev, enqd_len, trb_buff_len, 1992 full_len, preq, 1993 more_trbs_coming, 1994 zero_len_trb); 1995 1996 length_field = TRB_LEN(trb_buff_len) | TRB_TD_SIZE(remainder) | 1997 TRB_INTR_TARGET(0); 1998 1999 cdnsp_queue_trb(pdev, ring, more_trbs_coming, 2000 lower_32_bits(send_addr), 2001 upper_32_bits(send_addr), 2002 length_field, 2003 field); 2004 2005 addr += trb_buff_len; 2006 sent_len = trb_buff_len; 2007 while (sg && sent_len >= block_len) { 2008 /* New sg entry */ 2009 --num_sgs; 2010 sent_len -= block_len; 2011 if (num_sgs != 0) { 2012 sg = sg_next(sg); 2013 block_len = sg_dma_len(sg); 2014 addr = (u64)sg_dma_address(sg); 2015 addr += sent_len; 2016 } 2017 } 2018 block_len -= sent_len; 2019 send_addr = addr; 2020 } 2021 2022 if (cdnsp_trb_is_link(ring->enqueue + 1)) { 2023 field = TRB_TYPE(TRB_TR_NOOP) | TRB_IOC; 2024 if (!ring->cycle_state) 2025 field |= TRB_CYCLE; 2026 2027 pep->wa1_nop_trb = ring->enqueue; 2028 2029 cdnsp_queue_trb(pdev, ring, 0, 0x0, 0x0, 2030 TRB_INTR_TARGET(0), field); 2031 } 2032 2033 cdnsp_check_trb_math(preq, enqd_len); 2034 ret = cdnsp_giveback_first_trb(pdev, pep, preq->request.stream_id, 2035 start_cycle, start_trb); 2036 2037 if (ret) 2038 preq->td.drbl = 1; 2039 2040 return 0; 2041 } 2042 2043 int cdnsp_queue_ctrl_tx(struct cdnsp_device *pdev, struct cdnsp_request *preq) 2044 { 2045 u32 field, length_field, zlp = 0; 2046 struct cdnsp_ep *pep = preq->pep; 2047 struct cdnsp_ring *ep_ring; 2048 int num_trbs; 2049 u32 maxp; 2050 int ret; 2051 2052 ep_ring = cdnsp_request_to_transfer_ring(pdev, preq); 2053 if (!ep_ring) 2054 return -EINVAL; 2055 2056 /* 1 TRB for data, 1 for status */ 2057 num_trbs = (pdev->three_stage_setup) ? 2 : 1; 2058 2059 maxp = usb_endpoint_maxp(pep->endpoint.desc); 2060 2061 if (preq->request.zero && preq->request.length && 2062 (preq->request.length % maxp == 0)) { 2063 num_trbs++; 2064 zlp = 1; 2065 } 2066 2067 ret = cdnsp_prepare_transfer(pdev, preq, num_trbs); 2068 if (ret) 2069 return ret; 2070 2071 /* If there's data, queue data TRBs */ 2072 if (preq->request.length > 0) { 2073 field = TRB_TYPE(TRB_DATA); 2074 2075 if (zlp) 2076 field |= TRB_CHAIN; 2077 else 2078 field |= TRB_IOC | (pdev->ep0_expect_in ? 0 : TRB_ISP); 2079 2080 if (pdev->ep0_expect_in) 2081 field |= TRB_DIR_IN; 2082 2083 length_field = TRB_LEN(preq->request.length) | 2084 TRB_TD_SIZE(zlp) | TRB_INTR_TARGET(0); 2085 2086 cdnsp_queue_trb(pdev, ep_ring, true, 2087 lower_32_bits(preq->request.dma), 2088 upper_32_bits(preq->request.dma), length_field, 2089 field | ep_ring->cycle_state | 2090 TRB_SETUPID(pdev->setup_id) | 2091 pdev->setup_speed); 2092 2093 if (zlp) { 2094 field = TRB_TYPE(TRB_NORMAL) | TRB_IOC; 2095 2096 if (!pdev->ep0_expect_in) 2097 field = TRB_ISP; 2098 2099 cdnsp_queue_trb(pdev, ep_ring, true, 2100 lower_32_bits(preq->request.dma), 2101 upper_32_bits(preq->request.dma), 0, 2102 field | ep_ring->cycle_state | 2103 TRB_SETUPID(pdev->setup_id) | 2104 pdev->setup_speed); 2105 } 2106 2107 pdev->ep0_stage = CDNSP_DATA_STAGE; 2108 } 2109 2110 /* Save the DMA address of the last TRB in the TD. */ 2111 preq->td.last_trb = ep_ring->enqueue; 2112 2113 /* Queue status TRB. */ 2114 if (preq->request.length == 0) 2115 field = ep_ring->cycle_state; 2116 else 2117 field = (ep_ring->cycle_state ^ 1); 2118 2119 if (preq->request.length > 0 && pdev->ep0_expect_in) 2120 field |= TRB_DIR_IN; 2121 2122 if (pep->ep_state & EP0_HALTED_STATUS) { 2123 pep->ep_state &= ~EP0_HALTED_STATUS; 2124 field |= TRB_SETUPSTAT(TRB_SETUPSTAT_STALL); 2125 } else { 2126 field |= TRB_SETUPSTAT(TRB_SETUPSTAT_ACK); 2127 } 2128 2129 cdnsp_queue_trb(pdev, ep_ring, false, 0, 0, TRB_INTR_TARGET(0), 2130 field | TRB_IOC | TRB_SETUPID(pdev->setup_id) | 2131 TRB_TYPE(TRB_STATUS) | pdev->setup_speed); 2132 2133 cdnsp_ring_ep_doorbell(pdev, pep, preq->request.stream_id); 2134 2135 return 0; 2136 } 2137 2138 int cdnsp_cmd_stop_ep(struct cdnsp_device *pdev, struct cdnsp_ep *pep) 2139 { 2140 u32 ep_state = GET_EP_CTX_STATE(pep->out_ctx); 2141 int ret = 0; 2142 2143 if (ep_state == EP_STATE_STOPPED || ep_state == EP_STATE_DISABLED || 2144 ep_state == EP_STATE_HALTED) { 2145 trace_cdnsp_ep_stopped_or_disabled(pep->out_ctx); 2146 goto ep_stopped; 2147 } 2148 2149 cdnsp_queue_stop_endpoint(pdev, pep->idx); 2150 cdnsp_ring_cmd_db(pdev); 2151 ret = cdnsp_wait_for_cmd_compl(pdev); 2152 2153 trace_cdnsp_handle_cmd_stop_ep(pep->out_ctx); 2154 2155 ep_stopped: 2156 pep->ep_state |= EP_STOPPED; 2157 return ret; 2158 } 2159 2160 /* 2161 * The transfer burst count field of the isochronous TRB defines the number of 2162 * bursts that are required to move all packets in this TD. Only SuperSpeed 2163 * devices can burst up to bMaxBurst number of packets per service interval. 2164 * This field is zero based, meaning a value of zero in the field means one 2165 * burst. Basically, for everything but SuperSpeed devices, this field will be 2166 * zero. 2167 */ 2168 static unsigned int cdnsp_get_burst_count(struct cdnsp_device *pdev, 2169 struct cdnsp_request *preq, 2170 unsigned int total_packet_count) 2171 { 2172 unsigned int max_burst; 2173 2174 if (pdev->gadget.speed < USB_SPEED_SUPER) 2175 return 0; 2176 2177 max_burst = preq->pep->endpoint.comp_desc->bMaxBurst; 2178 return DIV_ROUND_UP(total_packet_count, max_burst + 1) - 1; 2179 } 2180 2181 /* 2182 * Returns the number of packets in the last "burst" of packets. This field is 2183 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so 2184 * the last burst packet count is equal to the total number of packets in the 2185 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst 2186 * must contain (bMaxBurst + 1) number of packets, but the last burst can 2187 * contain 1 to (bMaxBurst + 1) packets. 2188 */ 2189 static unsigned int 2190 cdnsp_get_last_burst_packet_count(struct cdnsp_device *pdev, 2191 struct cdnsp_request *preq, 2192 unsigned int total_packet_count) 2193 { 2194 unsigned int max_burst; 2195 unsigned int residue; 2196 2197 if (pdev->gadget.speed >= USB_SPEED_SUPER) { 2198 /* bMaxBurst is zero based: 0 means 1 packet per burst. */ 2199 max_burst = preq->pep->endpoint.comp_desc->bMaxBurst; 2200 residue = total_packet_count % (max_burst + 1); 2201 2202 /* 2203 * If residue is zero, the last burst contains (max_burst + 1) 2204 * number of packets, but the TLBPC field is zero-based. 2205 */ 2206 if (residue == 0) 2207 return max_burst; 2208 2209 return residue - 1; 2210 } 2211 if (total_packet_count == 0) 2212 return 0; 2213 2214 return total_packet_count - 1; 2215 } 2216 2217 /* Queue function isoc transfer */ 2218 int cdnsp_queue_isoc_tx(struct cdnsp_device *pdev, 2219 struct cdnsp_request *preq) 2220 { 2221 unsigned int trb_buff_len, td_len, td_remain_len, block_len; 2222 unsigned int burst_count, last_burst_pkt; 2223 unsigned int total_pkt_count, max_pkt; 2224 struct cdnsp_generic_trb *start_trb; 2225 struct scatterlist *sg = NULL; 2226 bool more_trbs_coming = true; 2227 struct cdnsp_ring *ep_ring; 2228 unsigned int num_sgs = 0; 2229 int running_total = 0; 2230 u32 field, length_field; 2231 u64 addr, send_addr; 2232 int start_cycle; 2233 int trbs_per_td; 2234 int i, sent_len, ret; 2235 2236 ep_ring = preq->pep->ring; 2237 2238 td_len = preq->request.length; 2239 2240 if (preq->request.num_sgs) { 2241 num_sgs = preq->request.num_sgs; 2242 sg = preq->request.sg; 2243 addr = (u64)sg_dma_address(sg); 2244 block_len = sg_dma_len(sg); 2245 trbs_per_td = count_sg_trbs_needed(preq); 2246 } else { 2247 addr = (u64)preq->request.dma; 2248 block_len = td_len; 2249 trbs_per_td = count_trbs_needed(preq); 2250 } 2251 2252 ret = cdnsp_prepare_transfer(pdev, preq, trbs_per_td); 2253 if (ret) 2254 return ret; 2255 2256 start_trb = &ep_ring->enqueue->generic; 2257 start_cycle = ep_ring->cycle_state; 2258 td_remain_len = td_len; 2259 send_addr = addr; 2260 2261 max_pkt = usb_endpoint_maxp(preq->pep->endpoint.desc); 2262 total_pkt_count = DIV_ROUND_UP(td_len, max_pkt); 2263 2264 /* A zero-length transfer still involves at least one packet. */ 2265 if (total_pkt_count == 0) 2266 total_pkt_count++; 2267 2268 burst_count = cdnsp_get_burst_count(pdev, preq, total_pkt_count); 2269 last_burst_pkt = cdnsp_get_last_burst_packet_count(pdev, preq, 2270 total_pkt_count); 2271 2272 /* 2273 * Set isoc specific data for the first TRB in a TD. 2274 * Prevent HW from getting the TRBs by keeping the cycle state 2275 * inverted in the first TDs isoc TRB. 2276 */ 2277 field = TRB_TYPE(TRB_ISOC) | TRB_TLBPC(last_burst_pkt) | 2278 TRB_SIA | TRB_TBC(burst_count); 2279 2280 if (!start_cycle) 2281 field |= TRB_CYCLE; 2282 2283 /* Fill the rest of the TRB fields, and remaining normal TRBs. */ 2284 for (i = 0; i < trbs_per_td; i++) { 2285 u32 remainder; 2286 2287 /* Calculate TRB length. */ 2288 trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr); 2289 trb_buff_len = min(trb_buff_len, block_len); 2290 if (trb_buff_len > td_remain_len) 2291 trb_buff_len = td_remain_len; 2292 2293 /* Set the TRB length, TD size, & interrupter fields. */ 2294 remainder = cdnsp_td_remainder(pdev, running_total, 2295 trb_buff_len, td_len, preq, 2296 more_trbs_coming, 0); 2297 2298 length_field = TRB_LEN(trb_buff_len) | TRB_TD_SIZE(remainder) | 2299 TRB_INTR_TARGET(0); 2300 2301 /* Only first TRB is isoc, overwrite otherwise. */ 2302 if (i) { 2303 field = TRB_TYPE(TRB_NORMAL) | ep_ring->cycle_state; 2304 length_field |= TRB_TD_SIZE(remainder); 2305 } else { 2306 length_field |= TRB_TD_SIZE_TBC(burst_count); 2307 } 2308 2309 /* Only set interrupt on short packet for OUT EPs. */ 2310 if (usb_endpoint_dir_out(preq->pep->endpoint.desc)) 2311 field |= TRB_ISP; 2312 2313 /* Set the chain bit for all except the last TRB. */ 2314 if (i < trbs_per_td - 1) { 2315 more_trbs_coming = true; 2316 field |= TRB_CHAIN; 2317 } else { 2318 more_trbs_coming = false; 2319 preq->td.last_trb = ep_ring->enqueue; 2320 field |= TRB_IOC; 2321 } 2322 2323 cdnsp_queue_trb(pdev, ep_ring, more_trbs_coming, 2324 lower_32_bits(send_addr), upper_32_bits(send_addr), 2325 length_field, field); 2326 2327 running_total += trb_buff_len; 2328 addr += trb_buff_len; 2329 td_remain_len -= trb_buff_len; 2330 2331 sent_len = trb_buff_len; 2332 while (sg && sent_len >= block_len) { 2333 /* New sg entry */ 2334 --num_sgs; 2335 sent_len -= block_len; 2336 if (num_sgs != 0) { 2337 sg = sg_next(sg); 2338 block_len = sg_dma_len(sg); 2339 addr = (u64)sg_dma_address(sg); 2340 addr += sent_len; 2341 } 2342 } 2343 block_len -= sent_len; 2344 send_addr = addr; 2345 } 2346 2347 /* Check TD length */ 2348 if (running_total != td_len) { 2349 dev_err(pdev->dev, "ISOC TD length unmatch\n"); 2350 ret = -EINVAL; 2351 goto cleanup; 2352 } 2353 2354 cdnsp_giveback_first_trb(pdev, preq->pep, preq->request.stream_id, 2355 start_cycle, start_trb); 2356 2357 return 0; 2358 2359 cleanup: 2360 /* Clean up a partially enqueued isoc transfer. */ 2361 list_del_init(&preq->td.td_list); 2362 ep_ring->num_tds--; 2363 2364 /* 2365 * Use the first TD as a temporary variable to turn the TDs we've 2366 * queued into No-ops with a software-owned cycle bit. 2367 * That way the hardware won't accidentally start executing bogus TDs 2368 * when we partially overwrite them. 2369 * td->first_trb and td->start_seg are already set. 2370 */ 2371 preq->td.last_trb = ep_ring->enqueue; 2372 /* Every TRB except the first & last will have its cycle bit flipped. */ 2373 cdnsp_td_to_noop(pdev, ep_ring, &preq->td, true); 2374 2375 /* Reset the ring enqueue back to the first TRB and its cycle bit. */ 2376 ep_ring->enqueue = preq->td.first_trb; 2377 ep_ring->enq_seg = preq->td.start_seg; 2378 ep_ring->cycle_state = start_cycle; 2379 return ret; 2380 } 2381 2382 /**** Command Ring Operations ****/ 2383 /* 2384 * Generic function for queuing a command TRB on the command ring. 2385 * Driver queue only one command to ring in the moment. 2386 */ 2387 static void cdnsp_queue_command(struct cdnsp_device *pdev, 2388 u32 field1, 2389 u32 field2, 2390 u32 field3, 2391 u32 field4) 2392 { 2393 cdnsp_prepare_ring(pdev, pdev->cmd_ring, EP_STATE_RUNNING, 1, 2394 GFP_ATOMIC); 2395 2396 pdev->cmd.command_trb = pdev->cmd_ring->enqueue; 2397 2398 cdnsp_queue_trb(pdev, pdev->cmd_ring, false, field1, field2, 2399 field3, field4 | pdev->cmd_ring->cycle_state); 2400 } 2401 2402 /* Queue a slot enable or disable request on the command ring */ 2403 void cdnsp_queue_slot_control(struct cdnsp_device *pdev, u32 trb_type) 2404 { 2405 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(trb_type) | 2406 SLOT_ID_FOR_TRB(pdev->slot_id)); 2407 } 2408 2409 /* Queue an address device command TRB */ 2410 void cdnsp_queue_address_device(struct cdnsp_device *pdev, 2411 dma_addr_t in_ctx_ptr, 2412 enum cdnsp_setup_dev setup) 2413 { 2414 cdnsp_queue_command(pdev, lower_32_bits(in_ctx_ptr), 2415 upper_32_bits(in_ctx_ptr), 0, 2416 TRB_TYPE(TRB_ADDR_DEV) | 2417 SLOT_ID_FOR_TRB(pdev->slot_id) | 2418 (setup == SETUP_CONTEXT_ONLY ? TRB_BSR : 0)); 2419 } 2420 2421 /* Queue a reset device command TRB */ 2422 void cdnsp_queue_reset_device(struct cdnsp_device *pdev) 2423 { 2424 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_RESET_DEV) | 2425 SLOT_ID_FOR_TRB(pdev->slot_id)); 2426 } 2427 2428 /* Queue a configure endpoint command TRB */ 2429 void cdnsp_queue_configure_endpoint(struct cdnsp_device *pdev, 2430 dma_addr_t in_ctx_ptr) 2431 { 2432 cdnsp_queue_command(pdev, lower_32_bits(in_ctx_ptr), 2433 upper_32_bits(in_ctx_ptr), 0, 2434 TRB_TYPE(TRB_CONFIG_EP) | 2435 SLOT_ID_FOR_TRB(pdev->slot_id)); 2436 } 2437 2438 /* 2439 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop 2440 * activity on an endpoint that is about to be suspended. 2441 */ 2442 void cdnsp_queue_stop_endpoint(struct cdnsp_device *pdev, unsigned int ep_index) 2443 { 2444 cdnsp_queue_command(pdev, 0, 0, 0, SLOT_ID_FOR_TRB(pdev->slot_id) | 2445 EP_ID_FOR_TRB(ep_index) | TRB_TYPE(TRB_STOP_RING)); 2446 } 2447 2448 /* Set Transfer Ring Dequeue Pointer command. */ 2449 void cdnsp_queue_new_dequeue_state(struct cdnsp_device *pdev, 2450 struct cdnsp_ep *pep, 2451 struct cdnsp_dequeue_state *deq_state) 2452 { 2453 u32 trb_stream_id = STREAM_ID_FOR_TRB(deq_state->stream_id); 2454 u32 trb_slot_id = SLOT_ID_FOR_TRB(pdev->slot_id); 2455 u32 type = TRB_TYPE(TRB_SET_DEQ); 2456 u32 trb_sct = 0; 2457 dma_addr_t addr; 2458 2459 addr = cdnsp_trb_virt_to_dma(deq_state->new_deq_seg, 2460 deq_state->new_deq_ptr); 2461 2462 if (deq_state->stream_id) 2463 trb_sct = SCT_FOR_TRB(SCT_PRI_TR); 2464 2465 cdnsp_queue_command(pdev, lower_32_bits(addr) | trb_sct | 2466 deq_state->new_cycle_state, upper_32_bits(addr), 2467 trb_stream_id, trb_slot_id | 2468 EP_ID_FOR_TRB(pep->idx) | type); 2469 } 2470 2471 void cdnsp_queue_reset_ep(struct cdnsp_device *pdev, unsigned int ep_index) 2472 { 2473 return cdnsp_queue_command(pdev, 0, 0, 0, 2474 SLOT_ID_FOR_TRB(pdev->slot_id) | 2475 EP_ID_FOR_TRB(ep_index) | 2476 TRB_TYPE(TRB_RESET_EP)); 2477 } 2478 2479 /* 2480 * Queue a halt endpoint request on the command ring. 2481 */ 2482 void cdnsp_queue_halt_endpoint(struct cdnsp_device *pdev, unsigned int ep_index) 2483 { 2484 cdnsp_queue_command(pdev, 0, 0, 0, TRB_TYPE(TRB_HALT_ENDPOINT) | 2485 SLOT_ID_FOR_TRB(pdev->slot_id) | 2486 EP_ID_FOR_TRB(ep_index)); 2487 } 2488 2489 void cdnsp_force_header_wakeup(struct cdnsp_device *pdev, int intf_num) 2490 { 2491 u32 lo, mid; 2492 2493 lo = TRB_FH_TO_PACKET_TYPE(TRB_FH_TR_PACKET) | 2494 TRB_FH_TO_DEVICE_ADDRESS(pdev->device_address); 2495 mid = TRB_FH_TR_PACKET_DEV_NOT | 2496 TRB_FH_TO_NOT_TYPE(TRB_FH_TR_PACKET_FUNCTION_WAKE) | 2497 TRB_FH_TO_INTERFACE(intf_num); 2498 2499 cdnsp_queue_command(pdev, lo, mid, 0, 2500 TRB_TYPE(TRB_FORCE_HEADER) | SET_PORT_ID(2)); 2501 } 2502