1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Driver for 8250/16550-type serial ports 4 * 5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. 6 * 7 * Copyright (C) 2001 Russell King. 8 */ 9 10 #include <linux/bits.h> 11 #include <linux/serial_8250.h> 12 #include <linux/serial_core.h> 13 #include <linux/dmaengine.h> 14 15 #include "../serial_mctrl_gpio.h" 16 17 struct uart_8250_dma { 18 int (*tx_dma)(struct uart_8250_port *p); 19 int (*rx_dma)(struct uart_8250_port *p); 20 void (*prepare_tx_dma)(struct uart_8250_port *p); 21 void (*prepare_rx_dma)(struct uart_8250_port *p); 22 23 /* Filter function */ 24 dma_filter_fn fn; 25 /* Parameter to the filter function */ 26 void *rx_param; 27 void *tx_param; 28 29 struct dma_slave_config rxconf; 30 struct dma_slave_config txconf; 31 32 struct dma_chan *rxchan; 33 struct dma_chan *txchan; 34 35 /* Device address base for DMA operations */ 36 phys_addr_t rx_dma_addr; 37 phys_addr_t tx_dma_addr; 38 39 /* DMA address of the buffer in memory */ 40 dma_addr_t rx_addr; 41 dma_addr_t tx_addr; 42 43 dma_cookie_t rx_cookie; 44 dma_cookie_t tx_cookie; 45 46 void *rx_buf; 47 48 size_t rx_size; 49 size_t tx_size; 50 51 unsigned char tx_running; 52 unsigned char tx_err; 53 unsigned char rx_running; 54 }; 55 56 struct old_serial_port { 57 unsigned int uart; 58 unsigned int baud_base; 59 unsigned int port; 60 unsigned int irq; 61 upf_t flags; 62 unsigned char io_type; 63 unsigned char __iomem *iomem_base; 64 unsigned short iomem_reg_shift; 65 }; 66 67 struct serial8250_config { 68 const char *name; 69 unsigned short fifo_size; 70 unsigned short tx_loadsz; 71 unsigned char fcr; 72 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE]; 73 unsigned int flags; 74 }; 75 76 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */ 77 #define UART_CAP_EFR BIT(9) /* UART has EFR */ 78 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */ 79 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */ 80 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */ 81 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */ 82 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */ 83 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */ 84 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */ 85 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks: 86 * STOP PARITY EPAR SPAR WLEN5 WLEN6 87 */ 88 #define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */ 89 90 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */ 91 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */ 92 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */ 93 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */ 94 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */ 95 96 /* Module parameters */ 97 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS 98 99 extern unsigned int nr_uarts; 100 101 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ 102 #define SERIAL8250_SHARE_IRQS 1 103 #else 104 #define SERIAL8250_SHARE_IRQS 0 105 #endif 106 107 extern unsigned int share_irqs; 108 extern unsigned int skip_txen_test; 109 110 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ 111 { \ 112 .iobase = _base, \ 113 .irq = _irq, \ 114 .uartclk = 1843200, \ 115 .iotype = UPIO_PORT, \ 116 .flags = UPF_BOOT_AUTOCONF | (_flags), \ 117 } 118 119 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) 120 121 extern struct uart_driver serial8250_reg; 122 void serial8250_register_ports(struct uart_driver *drv, struct device *dev); 123 124 /* Legacy ISA bus related APIs */ 125 typedef void (*serial8250_isa_config_fn)(int, struct uart_port *, u32 *); 126 extern serial8250_isa_config_fn serial8250_isa_config; 127 128 void serial8250_isa_init_ports(void); 129 130 extern struct platform_device *serial8250_isa_devs; 131 132 extern const struct uart_ops *univ8250_port_base_ops; 133 extern struct uart_ops univ8250_port_ops; 134 135 static inline int serial_in(struct uart_8250_port *up, int offset) 136 { 137 return up->port.serial_in(&up->port, offset); 138 } 139 140 static inline void serial_out(struct uart_8250_port *up, int offset, int value) 141 { 142 up->port.serial_out(&up->port, offset, value); 143 } 144 145 /** 146 * serial_lsr_in - Read LSR register and preserve flags across reads 147 * @up: uart 8250 port 148 * 149 * Read LSR register and handle saving non-preserved flags across reads. 150 * The flags that are not preserved across reads are stored into 151 * up->lsr_saved_flags. 152 * 153 * Returns LSR value or'ed with the preserved flags (if any). 154 */ 155 static inline u16 serial_lsr_in(struct uart_8250_port *up) 156 { 157 u16 lsr = up->lsr_saved_flags; 158 159 lsr |= serial_in(up, UART_LSR); 160 up->lsr_saved_flags = lsr & up->lsr_save_mask; 161 162 return lsr; 163 } 164 165 /* 166 * For the 16C950 167 */ 168 static void serial_icr_write(struct uart_8250_port *up, int offset, int value) 169 { 170 serial_out(up, UART_SCR, offset); 171 serial_out(up, UART_ICR, value); 172 } 173 174 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up, 175 int offset) 176 { 177 unsigned int value; 178 179 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); 180 serial_out(up, UART_SCR, offset); 181 value = serial_in(up, UART_ICR); 182 serial_icr_write(up, UART_ACR, up->acr); 183 184 return value; 185 } 186 187 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p); 188 189 static inline u32 serial_dl_read(struct uart_8250_port *up) 190 { 191 return up->dl_read(up); 192 } 193 194 static inline void serial_dl_write(struct uart_8250_port *up, u32 value) 195 { 196 up->dl_write(up, value); 197 } 198 199 static inline bool serial8250_set_THRI(struct uart_8250_port *up) 200 { 201 /* Port locked to synchronize UART_IER access against the console. */ 202 lockdep_assert_held_once(&up->port.lock); 203 204 if (up->ier & UART_IER_THRI) 205 return false; 206 up->ier |= UART_IER_THRI; 207 serial_out(up, UART_IER, up->ier); 208 return true; 209 } 210 211 static inline bool serial8250_clear_THRI(struct uart_8250_port *up) 212 { 213 /* Port locked to synchronize UART_IER access against the console. */ 214 lockdep_assert_held_once(&up->port.lock); 215 216 if (!(up->ier & UART_IER_THRI)) 217 return false; 218 up->ier &= ~UART_IER_THRI; 219 serial_out(up, UART_IER, up->ier); 220 return true; 221 } 222 223 struct uart_8250_port *serial8250_setup_port(int index); 224 struct uart_8250_port *serial8250_get_port(int line); 225 226 int serial8250_em485_config(struct uart_port *port, struct ktermios *termios, 227 struct serial_rs485 *rs485); 228 void serial8250_em485_start_tx(struct uart_8250_port *p, bool toggle_ier); 229 void serial8250_em485_stop_tx(struct uart_8250_port *p, bool toggle_ier); 230 void serial8250_em485_destroy(struct uart_8250_port *p); 231 extern struct serial_rs485 serial8250_em485_supported; 232 233 /* MCR <-> TIOCM conversion */ 234 static inline int serial8250_TIOCM_to_MCR(int tiocm) 235 { 236 int mcr = 0; 237 238 if (tiocm & TIOCM_RTS) 239 mcr |= UART_MCR_RTS; 240 if (tiocm & TIOCM_DTR) 241 mcr |= UART_MCR_DTR; 242 if (tiocm & TIOCM_OUT1) 243 mcr |= UART_MCR_OUT1; 244 if (tiocm & TIOCM_OUT2) 245 mcr |= UART_MCR_OUT2; 246 if (tiocm & TIOCM_LOOP) 247 mcr |= UART_MCR_LOOP; 248 249 return mcr; 250 } 251 252 static inline int serial8250_MCR_to_TIOCM(int mcr) 253 { 254 int tiocm = 0; 255 256 if (mcr & UART_MCR_RTS) 257 tiocm |= TIOCM_RTS; 258 if (mcr & UART_MCR_DTR) 259 tiocm |= TIOCM_DTR; 260 if (mcr & UART_MCR_OUT1) 261 tiocm |= TIOCM_OUT1; 262 if (mcr & UART_MCR_OUT2) 263 tiocm |= TIOCM_OUT2; 264 if (mcr & UART_MCR_LOOP) 265 tiocm |= TIOCM_LOOP; 266 267 return tiocm; 268 } 269 270 /* MSR <-> TIOCM conversion */ 271 static inline int serial8250_MSR_to_TIOCM(int msr) 272 { 273 int tiocm = 0; 274 275 if (msr & UART_MSR_DCD) 276 tiocm |= TIOCM_CAR; 277 if (msr & UART_MSR_RI) 278 tiocm |= TIOCM_RNG; 279 if (msr & UART_MSR_DSR) 280 tiocm |= TIOCM_DSR; 281 if (msr & UART_MSR_CTS) 282 tiocm |= TIOCM_CTS; 283 284 return tiocm; 285 } 286 287 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value) 288 { 289 serial_out(up, UART_MCR, value); 290 291 if (up->gpios) 292 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value)); 293 } 294 295 static inline int serial8250_in_MCR(struct uart_8250_port *up) 296 { 297 int mctrl; 298 299 mctrl = serial_in(up, UART_MCR); 300 301 if (up->gpios) { 302 unsigned int mctrl_gpio = 0; 303 304 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio); 305 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio); 306 } 307 308 return mctrl; 309 } 310 311 #ifdef CONFIG_SERIAL_8250_PNP 312 int serial8250_pnp_init(void); 313 void serial8250_pnp_exit(void); 314 #else 315 static inline int serial8250_pnp_init(void) { return 0; } 316 static inline void serial8250_pnp_exit(void) { } 317 #endif 318 319 #ifdef CONFIG_SERIAL_8250_RSA 320 void univ8250_rsa_support(struct uart_ops *ops); 321 #else 322 static inline void univ8250_rsa_support(struct uart_ops *ops) { } 323 #endif 324 325 #ifdef CONFIG_SERIAL_8250_FINTEK 326 int fintek_8250_probe(struct uart_8250_port *uart); 327 #else 328 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; } 329 #endif 330 331 #ifdef CONFIG_ARCH_OMAP1 332 #include <linux/soc/ti/omap1-soc.h> 333 static inline int is_omap1_8250(struct uart_8250_port *pt) 334 { 335 int res; 336 337 switch (pt->port.mapbase) { 338 case OMAP1_UART1_BASE: 339 case OMAP1_UART2_BASE: 340 case OMAP1_UART3_BASE: 341 res = 1; 342 break; 343 default: 344 res = 0; 345 break; 346 } 347 348 return res; 349 } 350 351 static inline int is_omap1510_8250(struct uart_8250_port *pt) 352 { 353 if (!cpu_is_omap1510()) 354 return 0; 355 356 return is_omap1_8250(pt); 357 } 358 #else 359 static inline int is_omap1_8250(struct uart_8250_port *pt) 360 { 361 return 0; 362 } 363 static inline int is_omap1510_8250(struct uart_8250_port *pt) 364 { 365 return 0; 366 } 367 #endif 368 369 #ifdef CONFIG_SERIAL_8250_DMA 370 extern int serial8250_tx_dma(struct uart_8250_port *); 371 extern void serial8250_tx_dma_flush(struct uart_8250_port *); 372 extern int serial8250_rx_dma(struct uart_8250_port *); 373 extern void serial8250_rx_dma_flush(struct uart_8250_port *); 374 extern int serial8250_request_dma(struct uart_8250_port *); 375 extern void serial8250_release_dma(struct uart_8250_port *); 376 377 static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) 378 { 379 struct uart_8250_dma *dma = p->dma; 380 381 if (dma->prepare_tx_dma) 382 dma->prepare_tx_dma(p); 383 } 384 385 static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) 386 { 387 struct uart_8250_dma *dma = p->dma; 388 389 if (dma->prepare_rx_dma) 390 dma->prepare_rx_dma(p); 391 } 392 393 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) 394 { 395 struct uart_8250_dma *dma = p->dma; 396 397 return dma && dma->tx_running; 398 } 399 #else 400 static inline int serial8250_tx_dma(struct uart_8250_port *p) 401 { 402 return -1; 403 } 404 static inline void serial8250_tx_dma_flush(struct uart_8250_port *p) { } 405 static inline int serial8250_rx_dma(struct uart_8250_port *p) 406 { 407 return -1; 408 } 409 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { } 410 static inline int serial8250_request_dma(struct uart_8250_port *p) 411 { 412 return -1; 413 } 414 static inline void serial8250_release_dma(struct uart_8250_port *p) { } 415 416 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p) 417 { 418 return false; 419 } 420 #endif 421 422 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) 423 { 424 unsigned char status; 425 426 status = serial_in(up, 0x04); /* EXCR2 */ 427 #define PRESL(x) ((x) & 0x30) 428 if (PRESL(status) == 0x10) { 429 /* already in high speed mode */ 430 return 0; 431 } else { 432 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */ 433 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */ 434 serial_out(up, 0x04, status); 435 } 436 return 1; 437 } 438 439 static inline int serial_index(struct uart_port *port) 440 { 441 return port->minor - 64; 442 } 443