1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7 #ifndef _HISI_SAS_H_ 8 #define _HISI_SAS_H_ 9 10 #include <linux/acpi.h> 11 #include <linux/blk-mq.h> 12 #include <linux/clk.h> 13 #include <linux/debugfs.h> 14 #include <linux/dmapool.h> 15 #include <linux/iopoll.h> 16 #include <linux/irq.h> 17 #include <linux/lcm.h> 18 #include <linux/libata.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of_address.h> 22 #include <linux/pci.h> 23 #include <linux/platform_device.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/property.h> 26 #include <linux/regmap.h> 27 #include <linux/timer.h> 28 #include <scsi/sas_ata.h> 29 #include <scsi/libsas.h> 30 31 #define HISI_SAS_MAX_PHYS 9 32 #define HISI_SAS_MAX_QUEUES 32 33 #define HISI_SAS_QUEUE_SLOTS 4096 34 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 35 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 36 #define HISI_SAS_RESETTING_BIT 0 37 #define HISI_SAS_REJECT_CMD_BIT 1 38 #define HISI_SAS_PM_BIT 2 39 #define HISI_SAS_HW_FAULT_BIT 3 40 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 41 #define HISI_SAS_RESERVED_IPTT 96 42 #define HISI_SAS_UNRESERVED_IPTT \ 43 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 44 45 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 46 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 47 #define HISI_SAS_FIFO_DATA_DW_SIZE 32 48 49 #define HISI_SAS_REG_MEM_SIZE 4 50 #define HISI_SAS_MAX_CDB_LEN 16 51 #define HISI_SAS_BLK_QUEUE_DEPTH 64 52 53 #define BYTE_TO_DW 4 54 #define BYTE_TO_DDW 8 55 56 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 57 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 58 59 #define hisi_sas_status_buf_addr(buf) \ 60 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 61 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 62 #define hisi_sas_status_buf_addr_dma(slot) \ 63 hisi_sas_status_buf_addr((slot)->buf_dma) 64 65 #define hisi_sas_cmd_hdr_addr(buf) \ 66 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 67 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 68 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 69 70 #define hisi_sas_sge_addr(buf) \ 71 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 72 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 73 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 74 75 #define hisi_sas_sge_dif_addr(buf) \ 76 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 77 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 78 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 79 80 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 81 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 82 #define HISI_SAS_MAX_STP_RESP_SZ 28 83 84 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 85 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 86 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 87 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 88 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 89 90 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 91 SHOST_DIF_TYPE2_PROTECTION | \ 92 SHOST_DIF_TYPE3_PROTECTION) 93 94 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 95 SHOST_DIX_TYPE2_PROTECTION | \ 96 SHOST_DIX_TYPE3_PROTECTION) 97 98 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 99 100 #define HISI_SAS_WAIT_PHYUP_TIMEOUT (30 * HZ) 101 #define HISI_SAS_CLEAR_ITCT_TIMEOUT (20 * HZ) 102 #define HISI_SAS_DELAY_FOR_PHY_DISABLE 100 103 #define NAME_BUF_SIZE 256 104 105 struct hisi_hba; 106 107 enum { 108 PORT_TYPE_SAS = (1U << 1), 109 PORT_TYPE_SATA = (1U << 0), 110 }; 111 112 enum dev_status { 113 HISI_SAS_DEV_INIT, 114 HISI_SAS_DEV_NORMAL, 115 HISI_SAS_DEV_NCQ_ERR, 116 }; 117 118 enum { 119 HISI_SAS_INT_ABT_CMD = 0, 120 HISI_SAS_INT_ABT_DEV = 1, 121 }; 122 123 enum hisi_sas_dev_type { 124 HISI_SAS_DEV_TYPE_STP = 0, 125 HISI_SAS_DEV_TYPE_SSP, 126 HISI_SAS_DEV_TYPE_SATA, 127 }; 128 129 struct hisi_sas_hw_error { 130 u32 irq_msk; 131 u32 msk; 132 int shift; 133 const char *msg; 134 int reg; 135 const struct hisi_sas_hw_error *sub; 136 }; 137 138 struct hisi_sas_rst { 139 struct hisi_hba *hisi_hba; 140 struct completion *completion; 141 struct work_struct work; 142 bool done; 143 }; 144 145 #define HISI_SAS_RST_WORK_INIT(r, c) \ 146 { .hisi_hba = hisi_hba, \ 147 .completion = &c, \ 148 .work = __WORK_INITIALIZER(r.work, \ 149 hisi_sas_sync_rst_work_handler), \ 150 .done = false, \ 151 } 152 153 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 154 DECLARE_COMPLETION_ONSTACK(c); \ 155 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 156 157 enum hisi_sas_bit_err_type { 158 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 159 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 160 }; 161 162 enum hisi_sas_phy_event { 163 HISI_PHYE_PHY_UP = 0U, 164 HISI_PHYE_LINK_RESET, 165 HISI_PHYE_PHY_UP_PM, 166 HISI_PHYES_NUM, 167 }; 168 169 struct hisi_sas_debugfs_fifo { 170 u32 signal_sel; 171 u32 dump_msk; 172 u32 dump_mode; 173 u32 trigger; 174 u32 trigger_msk; 175 u32 trigger_mode; 176 u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE]; 177 }; 178 179 #define FRAME_RCVD_BUF 32 180 #define SAS_PHY_RESV_SIZE 2 181 struct hisi_sas_phy { 182 struct work_struct works[HISI_PHYES_NUM]; 183 struct hisi_hba *hisi_hba; 184 struct hisi_sas_port *port; 185 struct asd_sas_phy sas_phy; 186 struct sas_identify identify; 187 struct completion *reset_completion; 188 struct timer_list timer; 189 spinlock_t lock; 190 u64 port_id; /* from hw */ 191 u64 frame_rcvd_size; 192 u8 frame_rcvd[FRAME_RCVD_BUF]; 193 u8 phy_attached; 194 u8 in_reset; 195 u8 reserved[SAS_PHY_RESV_SIZE]; 196 u32 phy_type; 197 u32 code_violation_err_count; 198 enum sas_linkrate minimum_linkrate; 199 enum sas_linkrate maximum_linkrate; 200 int enable; 201 int wait_phyup_cnt; 202 atomic_t down_cnt; 203 204 /* Trace FIFO */ 205 struct hisi_sas_debugfs_fifo fifo; 206 }; 207 208 struct hisi_sas_port { 209 struct asd_sas_port sas_port; 210 u8 port_attached; 211 u8 id; /* from hw */ 212 }; 213 214 struct hisi_sas_cq { 215 struct hisi_hba *hisi_hba; 216 const struct cpumask *irq_mask; 217 int rd_point; 218 int id; 219 int irq_no; 220 spinlock_t poll_lock; 221 }; 222 223 struct hisi_sas_dq { 224 struct hisi_hba *hisi_hba; 225 struct list_head list; 226 spinlock_t lock; 227 int wr_point; 228 int id; 229 }; 230 231 struct hisi_sas_device { 232 struct hisi_hba *hisi_hba; 233 struct domain_device *sas_device; 234 struct completion *completion; 235 struct hisi_sas_dq *dq; 236 struct list_head list; 237 enum sas_device_type dev_type; 238 enum dev_status dev_status; 239 int device_id; 240 int sata_idx; 241 spinlock_t lock; /* For protecting slots */ 242 }; 243 244 struct hisi_sas_slot { 245 struct list_head entry; 246 struct list_head delivery; 247 struct sas_task *task; 248 struct hisi_sas_port *port; 249 u64 n_elem; 250 u64 n_elem_dif; 251 int dlvry_queue; 252 int dlvry_queue_slot; 253 int cmplt_queue; 254 int cmplt_queue_slot; 255 int abort; 256 int ready; 257 int device_id; 258 void *cmd_hdr; 259 dma_addr_t cmd_hdr_dma; 260 struct timer_list internal_abort_timer; 261 bool is_internal; 262 struct sas_tmf_task *tmf; 263 /* Do not reorder/change members after here */ 264 void *buf; 265 dma_addr_t buf_dma; 266 u16 idx; 267 }; 268 269 struct hisi_sas_iost_itct_cache { 270 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 271 }; 272 273 enum hisi_sas_debugfs_reg_array_member { 274 DEBUGFS_GLOBAL = 0, 275 DEBUGFS_AXI, 276 DEBUGFS_RAS, 277 DEBUGFS_REGS_NUM 278 }; 279 280 enum hisi_sas_debugfs_cache_type { 281 HISI_SAS_ITCT_CACHE, 282 HISI_SAS_IOST_CACHE, 283 }; 284 285 enum hisi_sas_debugfs_bist_ffe_cfg { 286 FFE_SAS_1_5_GBPS, 287 FFE_SAS_3_0_GBPS, 288 FFE_SAS_6_0_GBPS, 289 FFE_SAS_12_0_GBPS, 290 FFE_RESV, 291 FFE_SATA_1_5_GBPS, 292 FFE_SATA_3_0_GBPS, 293 FFE_SATA_6_0_GBPS, 294 FFE_CFG_MAX 295 }; 296 297 enum hisi_sas_debugfs_bist_fixed_code { 298 FIXED_CODE, 299 FIXED_CODE_1, 300 FIXED_CODE_MAX 301 }; 302 303 enum { 304 HISI_SAS_BIST_CODE_MODE_PRBS7, 305 HISI_SAS_BIST_CODE_MODE_PRBS23, 306 HISI_SAS_BIST_CODE_MODE_PRBS31, 307 HISI_SAS_BIST_CODE_MODE_JTPAT, 308 HISI_SAS_BIST_CODE_MODE_CJTPAT, 309 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 310 HISI_SAS_BIST_CODE_MODE_TRAIN, 311 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 312 HISI_SAS_BIST_CODE_MODE_HFTP, 313 HISI_SAS_BIST_CODE_MODE_MFTP, 314 HISI_SAS_BIST_CODE_MODE_LFTP, 315 HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 316 }; 317 318 struct hisi_sas_hw { 319 int (*hw_init)(struct hisi_hba *hisi_hba); 320 int (*fw_info_check)(struct hisi_hba *hisi_hba); 321 int (*interrupt_preinit)(struct hisi_hba *hisi_hba); 322 void (*setup_itct)(struct hisi_hba *hisi_hba, 323 struct hisi_sas_device *device); 324 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 325 struct domain_device *device); 326 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 327 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 328 void (*start_delivery)(struct hisi_sas_dq *dq); 329 void (*prep_ssp)(struct hisi_hba *hisi_hba, 330 struct hisi_sas_slot *slot); 331 void (*prep_smp)(struct hisi_hba *hisi_hba, 332 struct hisi_sas_slot *slot); 333 void (*prep_stp)(struct hisi_hba *hisi_hba, 334 struct hisi_sas_slot *slot); 335 void (*prep_abort)(struct hisi_hba *hisi_hba, 336 struct hisi_sas_slot *slot); 337 void (*phys_init)(struct hisi_hba *hisi_hba); 338 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 339 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 340 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 341 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 342 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 343 struct sas_phy_linkrates *linkrates); 344 enum sas_linkrate (*phy_get_max_linkrate)(void); 345 int (*clear_itct)(struct hisi_hba *hisi_hba, 346 struct hisi_sas_device *dev); 347 void (*free_device)(struct hisi_sas_device *sas_dev); 348 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 349 void (*dereg_device)(struct hisi_hba *hisi_hba, 350 struct domain_device *device); 351 int (*soft_reset)(struct hisi_hba *hisi_hba); 352 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 353 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 354 u8 reg_index, u8 reg_count, u8 *write_data); 355 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 356 int delay_ms, int timeout_ms); 357 int (*debugfs_snapshot_regs)(struct hisi_hba *hisi_hba); 358 int complete_hdr_size; 359 const struct scsi_host_template *sht; 360 }; 361 362 #define HISI_SAS_MAX_DEBUGFS_DUMP 50 363 #define HISI_SAS_DEFAULT_DEBUGFS_DUMP 1 364 365 struct hisi_sas_debugfs_cq { 366 struct hisi_sas_cq *cq; 367 void *complete_hdr; 368 }; 369 370 struct hisi_sas_debugfs_dq { 371 struct hisi_sas_dq *dq; 372 struct hisi_sas_cmd_hdr *hdr; 373 }; 374 375 struct hisi_sas_debugfs_regs { 376 struct hisi_hba *hisi_hba; 377 u32 *data; 378 }; 379 380 struct hisi_sas_debugfs_port { 381 struct hisi_sas_phy *phy; 382 u32 *data; 383 }; 384 385 struct hisi_sas_debugfs_iost { 386 struct hisi_sas_iost *iost; 387 }; 388 389 struct hisi_sas_debugfs_itct { 390 struct hisi_sas_itct *itct; 391 }; 392 393 struct hisi_sas_debugfs_iost_cache { 394 struct hisi_sas_iost_itct_cache *cache; 395 }; 396 397 struct hisi_sas_debugfs_itct_cache { 398 struct hisi_sas_iost_itct_cache *cache; 399 }; 400 401 struct hisi_hba { 402 /* This must be the first element, used by SHOST_TO_SAS_HA */ 403 struct sas_ha_struct *p; 404 405 struct platform_device *platform_dev; 406 struct pci_dev *pci_dev; 407 struct device *dev; 408 409 int prot_mask; 410 411 void __iomem *regs; 412 void __iomem *sgpio_regs; 413 struct regmap *ctrl; 414 u32 ctrl_reset_reg; 415 u32 ctrl_reset_sts_reg; 416 u32 ctrl_clock_ena_reg; 417 u32 refclk_frequency_mhz; 418 u8 sas_addr[SAS_ADDR_SIZE]; 419 420 int *irq_map; /* v2 hw */ 421 422 int n_phy; 423 spinlock_t lock; 424 struct semaphore sem; 425 426 struct timer_list timer; 427 struct workqueue_struct *wq; 428 429 int slot_index_count; 430 int last_slot_index; 431 int last_dev_id; 432 unsigned long *slot_index_tags; 433 unsigned long reject_stp_links_msk; 434 435 /* SCSI/SAS glue */ 436 struct sas_ha_struct sha; 437 struct Scsi_Host *shost; 438 439 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 440 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 441 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 442 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 443 444 int queue_count; 445 446 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 447 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 448 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 449 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 450 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 451 struct hisi_sas_initial_fis *initial_fis; 452 dma_addr_t initial_fis_dma; 453 struct hisi_sas_itct *itct; 454 dma_addr_t itct_dma; 455 struct hisi_sas_iost *iost; 456 dma_addr_t iost_dma; 457 struct hisi_sas_breakpoint *breakpoint; 458 dma_addr_t breakpoint_dma; 459 struct hisi_sas_breakpoint *sata_breakpoint; 460 dma_addr_t sata_breakpoint_dma; 461 struct hisi_sas_slot *slot_info; 462 unsigned long flags; 463 const struct hisi_sas_hw *hw; /* Low level hw interface */ 464 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 465 struct work_struct rst_work; 466 u32 phy_state; 467 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 468 u32 intr_coal_count; /* Interrupt count to coalesce */ 469 470 int cq_nvecs; 471 472 /* bist */ 473 enum sas_linkrate debugfs_bist_linkrate; 474 int debugfs_bist_code_mode; 475 int debugfs_bist_phy_no; 476 int debugfs_bist_mode; 477 u32 debugfs_bist_cnt; 478 int debugfs_bist_enable; 479 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; 480 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; 481 482 /* debugfs memories */ 483 /* Put Global AXI and RAS Register into register array */ 484 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; 485 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; 486 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 487 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 488 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; 489 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; 490 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 491 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 492 493 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; 494 int debugfs_dump_index; 495 struct dentry *debugfs_dir; 496 struct dentry *debugfs_dump_dentry; 497 struct dentry *debugfs_bist_dentry; 498 struct dentry *debugfs_fifo_dentry; 499 500 int iopoll_q_cnt; 501 }; 502 503 /* Generic HW DMA host memory structures */ 504 /* Delivery queue header */ 505 struct hisi_sas_cmd_hdr { 506 /* dw0 */ 507 __le32 dw0; 508 509 /* dw1 */ 510 __le32 dw1; 511 512 /* dw2 */ 513 __le32 dw2; 514 515 /* dw3 */ 516 __le32 transfer_tags; 517 518 /* dw4 */ 519 __le32 data_transfer_len; 520 521 /* dw5 */ 522 __le32 first_burst_num; 523 524 /* dw6 */ 525 __le32 sg_len; 526 527 /* dw7 */ 528 __le32 dw7; 529 530 /* dw8-9 */ 531 __le64 cmd_table_addr; 532 533 /* dw10-11 */ 534 __le64 sts_buffer_addr; 535 536 /* dw12-13 */ 537 __le64 prd_table_addr; 538 539 /* dw14-15 */ 540 __le64 dif_prd_table_addr; 541 }; 542 543 #define ITCT_RESV_DDW 12 544 struct hisi_sas_itct { 545 __le64 qw0; 546 __le64 sas_addr; 547 __le64 qw2; 548 __le64 qw3; 549 __le64 qw4_15[ITCT_RESV_DDW]; 550 }; 551 552 struct hisi_sas_iost { 553 __le64 qw0; 554 __le64 qw1; 555 __le64 qw2; 556 __le64 qw3; 557 }; 558 559 #define ERROR_RECORD_BUF_DW 4 560 struct hisi_sas_err_record { 561 u32 data[ERROR_RECORD_BUF_DW]; 562 }; 563 564 #define FIS_RESV_DW 3 565 struct hisi_sas_initial_fis { 566 struct hisi_sas_err_record err_record; 567 struct dev_to_host_fis fis; 568 u32 rsvd[FIS_RESV_DW]; 569 }; 570 571 #define BREAKPOINT_DATA_SIZE 128 572 struct hisi_sas_breakpoint { 573 u8 data[BREAKPOINT_DATA_SIZE]; 574 }; 575 576 #define BREAKPOINT_TAG_NUM 32 577 struct hisi_sas_sata_breakpoint { 578 struct hisi_sas_breakpoint tag[BREAKPOINT_TAG_NUM]; 579 }; 580 581 struct hisi_sas_sge { 582 __le64 addr; 583 __le32 page_ctrl_0; 584 __le32 page_ctrl_1; 585 __le32 data_len; 586 __le32 data_off; 587 }; 588 589 #define SMP_CMD_TABLE_SIZE 44 590 struct hisi_sas_command_table_smp { 591 u8 bytes[SMP_CMD_TABLE_SIZE]; 592 }; 593 594 #define DUMMY_BUF_SIZE 12 595 struct hisi_sas_command_table_stp { 596 struct host_to_dev_fis command_fis; 597 u8 dummy[DUMMY_BUF_SIZE]; 598 u8 atapi_cdb[ATAPI_CDB_LEN]; 599 }; 600 601 #define HISI_SAS_SGE_PAGE_CNT (124) 602 struct hisi_sas_sge_page { 603 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 604 } __aligned(16); 605 606 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 607 struct hisi_sas_sge_dif_page { 608 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 609 } __aligned(16); 610 611 #define PROT_BUF_SIZE 7 612 struct hisi_sas_command_table_ssp { 613 struct ssp_frame_hdr hdr; 614 union { 615 struct { 616 struct ssp_command_iu task; 617 u32 prot[PROT_BUF_SIZE]; 618 }; 619 struct ssp_tmf_iu ssp_task; 620 struct xfer_rdy_iu xfer_rdy; 621 struct ssp_response_iu ssp_res; 622 } u; 623 }; 624 625 union hisi_sas_command_table { 626 struct hisi_sas_command_table_ssp ssp; 627 struct hisi_sas_command_table_smp smp; 628 struct hisi_sas_command_table_stp stp; 629 } __aligned(16); 630 631 #define IU_BUF_SIZE 1024 632 struct hisi_sas_status_buffer { 633 struct hisi_sas_err_record err; 634 u8 iu[IU_BUF_SIZE]; 635 } __aligned(16); 636 637 struct hisi_sas_slot_buf_table { 638 struct hisi_sas_status_buffer status_buffer; 639 union hisi_sas_command_table command_header; 640 struct hisi_sas_sge_page sge_page; 641 }; 642 643 struct hisi_sas_slot_dif_buf_table { 644 struct hisi_sas_slot_buf_table slot_buf; 645 struct hisi_sas_sge_dif_page sge_dif_page; 646 }; 647 648 extern struct scsi_transport_template *hisi_sas_stt; 649 650 extern bool hisi_sas_debugfs_enable; 651 extern u32 hisi_sas_debugfs_dump_count; 652 extern struct dentry *hisi_sas_debugfs_dir; 653 654 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 655 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 656 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 657 extern u8 hisi_sas_get_ata_protocol(struct sas_task *task); 658 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 659 extern void hisi_sas_sata_done(struct sas_task *task, 660 struct hisi_sas_slot *slot); 661 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 662 extern int hisi_sas_probe(struct platform_device *pdev, 663 const struct hisi_sas_hw *ops); 664 extern void hisi_sas_remove(struct platform_device *pdev); 665 666 int hisi_sas_sdev_configure(struct scsi_device *sdev, struct queue_limits *lim); 667 extern int hisi_sas_sdev_init(struct scsi_device *sdev); 668 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 669 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 670 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 671 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 672 int enable); 673 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy, 674 gfp_t gfp_flags); 675 extern void hisi_sas_phy_bcast(struct hisi_sas_phy *phy); 676 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 677 struct sas_task *task, 678 struct hisi_sas_slot *slot, 679 bool need_lock); 680 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 681 extern void hisi_sas_rst_work_handler(struct work_struct *work); 682 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 683 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 684 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 685 enum hisi_sas_phy_event event); 686 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 687 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 688 extern void hisi_sas_sync_cqs(struct hisi_hba *hisi_hba); 689 extern void hisi_sas_sync_poll_cqs(struct hisi_hba *hisi_hba); 690 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 691 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 692 #endif 693