1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 4 * 5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 6 * Copyright (C) 2006 David Brownell (convert to new framework) 7 */ 8 9 /* 10 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 11 * That defined the register interface now provided by all PCs, some 12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 13 * integrate an MC146818 clone in their southbridge, and boards use 14 * that instead of discrete clones like the DS12887 or M48T86. There 15 * are also clones that connect using the LPC bus. 16 * 17 * That register API is also used directly by various other drivers 18 * (notably for integrated NVRAM), infrastructure (x86 has code to 19 * bypass the RTC framework, directly reading the RTC during boot 20 * and updating minutes/seconds for systems using NTP synch) and 21 * utilities (like userspace 'hwclock', if no /dev node exists). 22 * 23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 24 * interrupts disabled, holding the global rtc_lock, to exclude those 25 * other drivers and utilities on correctly configured systems. 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/interrupt.h> 34 #include <linux/spinlock.h> 35 #include <linux/platform_device.h> 36 #include <linux/log2.h> 37 #include <linux/pm.h> 38 #include <linux/of.h> 39 #include <linux/of_platform.h> 40 #ifdef CONFIG_X86 41 #include <asm/i8259.h> 42 #include <asm/processor.h> 43 #include <linux/dmi.h> 44 #endif 45 46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 47 #include <linux/mc146818rtc.h> 48 49 #ifdef CONFIG_ACPI 50 /* 51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 52 * 53 * If cleared, ACPI SCI is only used to wake up the system from suspend 54 * 55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 56 */ 57 58 static bool use_acpi_alarm; 59 module_param(use_acpi_alarm, bool, 0444); 60 61 static inline int cmos_use_acpi_alarm(void) 62 { 63 return use_acpi_alarm; 64 } 65 #else /* !CONFIG_ACPI */ 66 67 static inline int cmos_use_acpi_alarm(void) 68 { 69 return 0; 70 } 71 #endif 72 73 struct cmos_rtc { 74 struct rtc_device *rtc; 75 struct device *dev; 76 int irq; 77 struct resource *iomem; 78 time64_t alarm_expires; 79 80 void (*wake_on)(struct device *); 81 void (*wake_off)(struct device *); 82 83 u8 enabled_wake; 84 u8 suspend_ctrl; 85 86 /* newer hardware extends the original register set */ 87 u8 day_alrm; 88 u8 mon_alrm; 89 u8 century; 90 91 struct rtc_wkalrm saved_wkalrm; 92 }; 93 94 /* both platform and pnp busses use negative numbers for invalid irqs */ 95 #define is_valid_irq(n) ((n) > 0) 96 97 static const char driver_name[] = "rtc_cmos"; 98 99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 102 */ 103 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 104 105 static inline int is_intr(u8 rtc_intr) 106 { 107 if (!(rtc_intr & RTC_IRQF)) 108 return 0; 109 return rtc_intr & RTC_IRQMASK; 110 } 111 112 /*----------------------------------------------------------------*/ 113 114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 116 * used in a broken "legacy replacement" mode. The breakage includes 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 118 * other (better) use. 119 * 120 * When that broken mode is in use, platform glue provides a partial 121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 122 * want to use HPET for anything except those IRQs though... 123 */ 124 #ifdef CONFIG_HPET_EMULATE_RTC 125 #include <asm/hpet.h> 126 #else 127 128 static inline int is_hpet_enabled(void) 129 { 130 return 0; 131 } 132 133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 134 { 135 return 0; 136 } 137 138 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 139 { 140 return 0; 141 } 142 143 static inline int 144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 145 { 146 return 0; 147 } 148 149 static inline int hpet_set_periodic_freq(unsigned long freq) 150 { 151 return 0; 152 } 153 154 static inline int hpet_rtc_timer_init(void) 155 { 156 return 0; 157 } 158 159 extern irq_handler_t hpet_rtc_interrupt; 160 161 static inline int hpet_register_irq_handler(irq_handler_t handler) 162 { 163 return 0; 164 } 165 166 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 167 { 168 return 0; 169 } 170 171 #endif 172 173 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 174 static inline int use_hpet_alarm(void) 175 { 176 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 177 } 178 179 /*----------------------------------------------------------------*/ 180 181 #ifdef RTC_PORT 182 183 /* Most newer x86 systems have two register banks, the first used 184 * for RTC and NVRAM and the second only for NVRAM. Caller must 185 * own rtc_lock ... and we won't worry about access during NMI. 186 */ 187 #define can_bank2 true 188 189 static inline unsigned char cmos_read_bank2(unsigned char addr) 190 { 191 outb(addr, RTC_PORT(2)); 192 return inb(RTC_PORT(3)); 193 } 194 195 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 196 { 197 outb(addr, RTC_PORT(2)); 198 outb(val, RTC_PORT(3)); 199 } 200 201 #else 202 203 #define can_bank2 false 204 205 static inline unsigned char cmos_read_bank2(unsigned char addr) 206 { 207 return 0; 208 } 209 210 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 211 { 212 } 213 214 #endif 215 216 /*----------------------------------------------------------------*/ 217 218 static int cmos_read_time(struct device *dev, struct rtc_time *t) 219 { 220 int ret; 221 222 /* 223 * If pm_trace abused the RTC for storage, set the timespec to 0, 224 * which tells the caller that this RTC value is unusable. 225 */ 226 if (!pm_trace_rtc_valid()) 227 return -EIO; 228 229 ret = mc146818_get_time(t, 1000); 230 if (ret < 0) { 231 dev_err_ratelimited(dev, "unable to read current time\n"); 232 return ret; 233 } 234 235 return 0; 236 } 237 238 static int cmos_set_time(struct device *dev, struct rtc_time *t) 239 { 240 /* NOTE: this ignores the issue whereby updating the seconds 241 * takes effect exactly 500ms after we write the register. 242 * (Also queueing and other delays before we get this far.) 243 */ 244 return mc146818_set_time(t); 245 } 246 247 struct cmos_read_alarm_callback_param { 248 struct cmos_rtc *cmos; 249 struct rtc_time *time; 250 unsigned char rtc_control; 251 }; 252 253 static void cmos_read_alarm_callback(unsigned char __always_unused seconds, 254 void *param_in) 255 { 256 struct cmos_read_alarm_callback_param *p = 257 (struct cmos_read_alarm_callback_param *)param_in; 258 struct rtc_time *time = p->time; 259 260 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 261 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM); 262 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM); 263 264 if (p->cmos->day_alrm) { 265 /* ignore upper bits on readback per ACPI spec */ 266 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f; 267 if (!time->tm_mday) 268 time->tm_mday = -1; 269 270 if (p->cmos->mon_alrm) { 271 time->tm_mon = CMOS_READ(p->cmos->mon_alrm); 272 if (!time->tm_mon) 273 time->tm_mon = -1; 274 } 275 } 276 277 p->rtc_control = CMOS_READ(RTC_CONTROL); 278 } 279 280 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 281 { 282 struct cmos_rtc *cmos = dev_get_drvdata(dev); 283 struct cmos_read_alarm_callback_param p = { 284 .cmos = cmos, 285 .time = &t->time, 286 }; 287 288 /* This not only a rtc_op, but also called directly */ 289 if (!is_valid_irq(cmos->irq)) 290 return -ETIMEDOUT; 291 292 /* Basic alarms only support hour, minute, and seconds fields. 293 * Some also support day and month, for alarms up to a year in 294 * the future. 295 */ 296 297 /* Some Intel chipsets disconnect the alarm registers when the clock 298 * update is in progress - during this time reads return bogus values 299 * and writes may fail silently. See for example "7th Generation Intel® 300 * Processor Family I/O for U/Y Platforms [...] Datasheet", section 301 * 27.7.1 302 * 303 * Use the mc146818_avoid_UIP() function to avoid this. 304 */ 305 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p)) 306 return -EIO; 307 308 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 309 if (((unsigned)t->time.tm_sec) < 0x60) 310 t->time.tm_sec = bcd2bin(t->time.tm_sec); 311 else 312 t->time.tm_sec = -1; 313 if (((unsigned)t->time.tm_min) < 0x60) 314 t->time.tm_min = bcd2bin(t->time.tm_min); 315 else 316 t->time.tm_min = -1; 317 if (((unsigned)t->time.tm_hour) < 0x24) 318 t->time.tm_hour = bcd2bin(t->time.tm_hour); 319 else 320 t->time.tm_hour = -1; 321 322 if (cmos->day_alrm) { 323 if (((unsigned)t->time.tm_mday) <= 0x31) 324 t->time.tm_mday = bcd2bin(t->time.tm_mday); 325 else 326 t->time.tm_mday = -1; 327 328 if (cmos->mon_alrm) { 329 if (((unsigned)t->time.tm_mon) <= 0x12) 330 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 331 else 332 t->time.tm_mon = -1; 333 } 334 } 335 } 336 337 t->enabled = !!(p.rtc_control & RTC_AIE); 338 t->pending = 0; 339 340 return 0; 341 } 342 343 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 344 { 345 unsigned char rtc_intr; 346 347 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 348 * allegedly some older rtcs need that to handle irqs properly 349 */ 350 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 351 352 if (use_hpet_alarm()) 353 return; 354 355 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 356 if (is_intr(rtc_intr)) 357 rtc_update_irq(cmos->rtc, 1, rtc_intr); 358 } 359 360 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 361 { 362 unsigned char rtc_control; 363 364 /* flush any pending IRQ status, notably for update irqs, 365 * before we enable new IRQs 366 */ 367 rtc_control = CMOS_READ(RTC_CONTROL); 368 cmos_checkintr(cmos, rtc_control); 369 370 rtc_control |= mask; 371 CMOS_WRITE(rtc_control, RTC_CONTROL); 372 if (use_hpet_alarm()) 373 hpet_set_rtc_irq_bit(mask); 374 375 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 376 if (cmos->wake_on) 377 cmos->wake_on(cmos->dev); 378 } 379 380 cmos_checkintr(cmos, rtc_control); 381 } 382 383 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 384 { 385 unsigned char rtc_control; 386 387 rtc_control = CMOS_READ(RTC_CONTROL); 388 rtc_control &= ~mask; 389 CMOS_WRITE(rtc_control, RTC_CONTROL); 390 if (use_hpet_alarm()) 391 hpet_mask_rtc_irq_bit(mask); 392 393 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 394 if (cmos->wake_off) 395 cmos->wake_off(cmos->dev); 396 } 397 398 cmos_checkintr(cmos, rtc_control); 399 } 400 401 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 402 { 403 struct cmos_rtc *cmos = dev_get_drvdata(dev); 404 struct rtc_time now; 405 406 cmos_read_time(dev, &now); 407 408 if (!cmos->day_alrm) { 409 time64_t t_max_date; 410 time64_t t_alrm; 411 412 t_max_date = rtc_tm_to_time64(&now); 413 t_max_date += 24 * 60 * 60 - 1; 414 t_alrm = rtc_tm_to_time64(&t->time); 415 if (t_alrm > t_max_date) { 416 dev_err(dev, 417 "Alarms can be up to one day in the future\n"); 418 return -EINVAL; 419 } 420 } else if (!cmos->mon_alrm) { 421 struct rtc_time max_date = now; 422 time64_t t_max_date; 423 time64_t t_alrm; 424 int max_mday; 425 426 if (max_date.tm_mon == 11) { 427 max_date.tm_mon = 0; 428 max_date.tm_year += 1; 429 } else { 430 max_date.tm_mon += 1; 431 } 432 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 433 if (max_date.tm_mday > max_mday) 434 max_date.tm_mday = max_mday; 435 436 t_max_date = rtc_tm_to_time64(&max_date); 437 t_max_date -= 1; 438 t_alrm = rtc_tm_to_time64(&t->time); 439 if (t_alrm > t_max_date) { 440 dev_err(dev, 441 "Alarms can be up to one month in the future\n"); 442 return -EINVAL; 443 } 444 } else { 445 struct rtc_time max_date = now; 446 time64_t t_max_date; 447 time64_t t_alrm; 448 int max_mday; 449 450 max_date.tm_year += 1; 451 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 452 if (max_date.tm_mday > max_mday) 453 max_date.tm_mday = max_mday; 454 455 t_max_date = rtc_tm_to_time64(&max_date); 456 t_max_date -= 1; 457 t_alrm = rtc_tm_to_time64(&t->time); 458 if (t_alrm > t_max_date) { 459 dev_err(dev, 460 "Alarms can be up to one year in the future\n"); 461 return -EINVAL; 462 } 463 } 464 465 return 0; 466 } 467 468 struct cmos_set_alarm_callback_param { 469 struct cmos_rtc *cmos; 470 unsigned char mon, mday, hrs, min, sec; 471 struct rtc_wkalrm *t; 472 }; 473 474 /* Note: this function may be executed by mc146818_avoid_UIP() more then 475 * once 476 */ 477 static void cmos_set_alarm_callback(unsigned char __always_unused seconds, 478 void *param_in) 479 { 480 struct cmos_set_alarm_callback_param *p = 481 (struct cmos_set_alarm_callback_param *)param_in; 482 483 /* next rtc irq must not be from previous alarm setting */ 484 cmos_irq_disable(p->cmos, RTC_AIE); 485 486 /* update alarm */ 487 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM); 488 CMOS_WRITE(p->min, RTC_MINUTES_ALARM); 489 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM); 490 491 /* the system may support an "enhanced" alarm */ 492 if (p->cmos->day_alrm) { 493 CMOS_WRITE(p->mday, p->cmos->day_alrm); 494 if (p->cmos->mon_alrm) 495 CMOS_WRITE(p->mon, p->cmos->mon_alrm); 496 } 497 498 if (use_hpet_alarm()) { 499 /* 500 * FIXME the HPET alarm glue currently ignores day_alrm 501 * and mon_alrm ... 502 */ 503 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min, 504 p->t->time.tm_sec); 505 } 506 507 if (p->t->enabled) 508 cmos_irq_enable(p->cmos, RTC_AIE); 509 } 510 511 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 512 { 513 struct cmos_rtc *cmos = dev_get_drvdata(dev); 514 struct cmos_set_alarm_callback_param p = { 515 .cmos = cmos, 516 .t = t 517 }; 518 unsigned char rtc_control; 519 int ret; 520 521 /* This not only a rtc_op, but also called directly */ 522 if (!is_valid_irq(cmos->irq)) 523 return -EIO; 524 525 ret = cmos_validate_alarm(dev, t); 526 if (ret < 0) 527 return ret; 528 529 p.mon = t->time.tm_mon + 1; 530 p.mday = t->time.tm_mday; 531 p.hrs = t->time.tm_hour; 532 p.min = t->time.tm_min; 533 p.sec = t->time.tm_sec; 534 535 spin_lock_irq(&rtc_lock); 536 rtc_control = CMOS_READ(RTC_CONTROL); 537 spin_unlock_irq(&rtc_lock); 538 539 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 540 /* Writing 0xff means "don't care" or "match all". */ 541 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff; 542 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff; 543 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff; 544 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff; 545 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff; 546 } 547 548 /* 549 * Some Intel chipsets disconnect the alarm registers when the clock 550 * update is in progress - during this time writes fail silently. 551 * 552 * Use mc146818_avoid_UIP() to avoid this. 553 */ 554 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p)) 555 return -ETIMEDOUT; 556 557 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 558 559 return 0; 560 } 561 562 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 563 { 564 struct cmos_rtc *cmos = dev_get_drvdata(dev); 565 unsigned long flags; 566 567 spin_lock_irqsave(&rtc_lock, flags); 568 569 if (enabled) 570 cmos_irq_enable(cmos, RTC_AIE); 571 else 572 cmos_irq_disable(cmos, RTC_AIE); 573 574 spin_unlock_irqrestore(&rtc_lock, flags); 575 return 0; 576 } 577 578 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 579 580 static int cmos_procfs(struct device *dev, struct seq_file *seq) 581 { 582 struct cmos_rtc *cmos = dev_get_drvdata(dev); 583 unsigned char rtc_control, valid; 584 585 spin_lock_irq(&rtc_lock); 586 rtc_control = CMOS_READ(RTC_CONTROL); 587 valid = CMOS_READ(RTC_VALID); 588 spin_unlock_irq(&rtc_lock); 589 590 /* NOTE: at least ICH6 reports battery status using a different 591 * (non-RTC) bit; and SQWE is ignored on many current systems. 592 */ 593 seq_printf(seq, 594 "periodic_IRQ\t: %s\n" 595 "update_IRQ\t: %s\n" 596 "HPET_emulated\t: %s\n" 597 // "square_wave\t: %s\n" 598 "BCD\t\t: %s\n" 599 "DST_enable\t: %s\n" 600 "periodic_freq\t: %d\n" 601 "batt_status\t: %s\n", 602 (rtc_control & RTC_PIE) ? "yes" : "no", 603 (rtc_control & RTC_UIE) ? "yes" : "no", 604 use_hpet_alarm() ? "yes" : "no", 605 // (rtc_control & RTC_SQWE) ? "yes" : "no", 606 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 607 (rtc_control & RTC_DST_EN) ? "yes" : "no", 608 cmos->rtc->irq_freq, 609 (valid & RTC_VRT) ? "okay" : "dead"); 610 611 return 0; 612 } 613 614 #else 615 #define cmos_procfs NULL 616 #endif 617 618 static const struct rtc_class_ops cmos_rtc_ops = { 619 .read_time = cmos_read_time, 620 .set_time = cmos_set_time, 621 .read_alarm = cmos_read_alarm, 622 .set_alarm = cmos_set_alarm, 623 .proc = cmos_procfs, 624 .alarm_irq_enable = cmos_alarm_irq_enable, 625 }; 626 627 /*----------------------------------------------------------------*/ 628 629 /* 630 * All these chips have at least 64 bytes of address space, shared by 631 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 632 * by boot firmware. Modern chips have 128 or 256 bytes. 633 */ 634 635 #define NVRAM_OFFSET (RTC_REG_D + 1) 636 637 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 638 size_t count) 639 { 640 unsigned char *buf = val; 641 642 off += NVRAM_OFFSET; 643 for (; count; count--, off++, buf++) { 644 guard(spinlock_irq)(&rtc_lock); 645 if (off < 128) 646 *buf = CMOS_READ(off); 647 else if (can_bank2) 648 *buf = cmos_read_bank2(off); 649 else 650 return -EIO; 651 } 652 653 return 0; 654 } 655 656 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 657 size_t count) 658 { 659 struct cmos_rtc *cmos = priv; 660 unsigned char *buf = val; 661 662 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 663 * checksum on part of the NVRAM data. That's currently ignored 664 * here. If userspace is smart enough to know what fields of 665 * NVRAM to update, updating checksums is also part of its job. 666 */ 667 off += NVRAM_OFFSET; 668 for (; count; count--, off++, buf++) { 669 /* don't trash RTC registers */ 670 if (off == cmos->day_alrm 671 || off == cmos->mon_alrm 672 || off == cmos->century) 673 continue; 674 675 guard(spinlock_irq)(&rtc_lock); 676 if (off < 128) 677 CMOS_WRITE(*buf, off); 678 else if (can_bank2) 679 cmos_write_bank2(*buf, off); 680 else 681 return -EIO; 682 } 683 684 return 0; 685 } 686 687 /*----------------------------------------------------------------*/ 688 689 static struct cmos_rtc cmos_rtc; 690 691 static irqreturn_t cmos_interrupt(int irq, void *p) 692 { 693 u8 irqstat; 694 u8 rtc_control; 695 696 spin_lock(&rtc_lock); 697 698 /* When the HPET interrupt handler calls us, the interrupt 699 * status is passed as arg1 instead of the irq number. But 700 * always clear irq status, even when HPET is in the way. 701 * 702 * Note that HPET and RTC are almost certainly out of phase, 703 * giving different IRQ status ... 704 */ 705 irqstat = CMOS_READ(RTC_INTR_FLAGS); 706 rtc_control = CMOS_READ(RTC_CONTROL); 707 if (use_hpet_alarm()) 708 irqstat = (unsigned long)irq & 0xF0; 709 710 /* If we were suspended, RTC_CONTROL may not be accurate since the 711 * bios may have cleared it. 712 */ 713 if (!cmos_rtc.suspend_ctrl) 714 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 715 else 716 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 717 718 /* All Linux RTC alarms should be treated as if they were oneshot. 719 * Similar code may be needed in system wakeup paths, in case the 720 * alarm woke the system. 721 */ 722 if (irqstat & RTC_AIE) { 723 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 724 rtc_control &= ~RTC_AIE; 725 CMOS_WRITE(rtc_control, RTC_CONTROL); 726 if (use_hpet_alarm()) 727 hpet_mask_rtc_irq_bit(RTC_AIE); 728 CMOS_READ(RTC_INTR_FLAGS); 729 } 730 spin_unlock(&rtc_lock); 731 732 if (is_intr(irqstat)) { 733 rtc_update_irq(p, 1, irqstat); 734 return IRQ_HANDLED; 735 } else 736 return IRQ_NONE; 737 } 738 739 #ifdef CONFIG_ACPI 740 741 #include <linux/acpi.h> 742 743 static u32 rtc_handler(void *context) 744 { 745 struct device *dev = context; 746 struct cmos_rtc *cmos = dev_get_drvdata(dev); 747 unsigned char rtc_control = 0; 748 unsigned char rtc_intr; 749 unsigned long flags; 750 751 752 /* 753 * Always update rtc irq when ACPI is used as RTC Alarm. 754 * Or else, ACPI SCI is enabled during suspend/resume only, 755 * update rtc irq in that case. 756 */ 757 if (cmos_use_acpi_alarm()) 758 cmos_interrupt(0, (void *)cmos->rtc); 759 else { 760 /* Fix me: can we use cmos_interrupt() here as well? */ 761 spin_lock_irqsave(&rtc_lock, flags); 762 if (cmos_rtc.suspend_ctrl) 763 rtc_control = CMOS_READ(RTC_CONTROL); 764 if (rtc_control & RTC_AIE) { 765 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 766 CMOS_WRITE(rtc_control, RTC_CONTROL); 767 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 768 rtc_update_irq(cmos->rtc, 1, rtc_intr); 769 } 770 spin_unlock_irqrestore(&rtc_lock, flags); 771 } 772 773 pm_wakeup_hard_event(dev); 774 acpi_clear_event(ACPI_EVENT_RTC); 775 acpi_disable_event(ACPI_EVENT_RTC, 0); 776 return ACPI_INTERRUPT_HANDLED; 777 } 778 779 static void acpi_rtc_event_setup(struct device *dev) 780 { 781 if (acpi_disabled) 782 return; 783 784 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 785 /* 786 * After the RTC handler is installed, the Fixed_RTC event should 787 * be disabled. Only when the RTC alarm is set will it be enabled. 788 */ 789 acpi_clear_event(ACPI_EVENT_RTC); 790 acpi_disable_event(ACPI_EVENT_RTC, 0); 791 } 792 793 static void acpi_rtc_event_cleanup(void) 794 { 795 if (acpi_disabled) 796 return; 797 798 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler); 799 } 800 801 static void rtc_wake_on(struct device *dev) 802 { 803 acpi_clear_event(ACPI_EVENT_RTC); 804 acpi_enable_event(ACPI_EVENT_RTC, 0); 805 } 806 807 static void rtc_wake_off(struct device *dev) 808 { 809 acpi_disable_event(ACPI_EVENT_RTC, 0); 810 } 811 812 #ifdef CONFIG_X86 813 static void use_acpi_alarm_quirks(void) 814 { 815 switch (boot_cpu_data.x86_vendor) { 816 case X86_VENDOR_INTEL: 817 if (dmi_get_bios_year() < 2015) 818 return; 819 break; 820 case X86_VENDOR_AMD: 821 case X86_VENDOR_HYGON: 822 if (dmi_get_bios_year() < 2021) 823 return; 824 break; 825 default: 826 return; 827 } 828 if (!is_hpet_enabled()) 829 return; 830 831 use_acpi_alarm = true; 832 } 833 #else 834 static inline void use_acpi_alarm_quirks(void) { } 835 #endif 836 837 static void acpi_cmos_wake_setup(struct device *dev) 838 { 839 if (acpi_disabled) 840 return; 841 842 use_acpi_alarm_quirks(); 843 844 cmos_rtc.wake_on = rtc_wake_on; 845 cmos_rtc.wake_off = rtc_wake_off; 846 847 /* ACPI tables bug workaround. */ 848 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 849 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 850 acpi_gbl_FADT.month_alarm); 851 acpi_gbl_FADT.month_alarm = 0; 852 } 853 854 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm; 855 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm; 856 cmos_rtc.century = acpi_gbl_FADT.century; 857 858 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 859 dev_info(dev, "RTC can wake from S4\n"); 860 861 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 862 device_init_wakeup(dev, true); 863 } 864 865 static void cmos_check_acpi_rtc_status(struct device *dev, 866 unsigned char *rtc_control) 867 { 868 struct cmos_rtc *cmos = dev_get_drvdata(dev); 869 acpi_event_status rtc_status; 870 acpi_status status; 871 872 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 873 return; 874 875 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 876 if (ACPI_FAILURE(status)) { 877 dev_err(dev, "Could not get RTC status\n"); 878 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 879 unsigned char mask; 880 *rtc_control &= ~RTC_AIE; 881 CMOS_WRITE(*rtc_control, RTC_CONTROL); 882 mask = CMOS_READ(RTC_INTR_FLAGS); 883 rtc_update_irq(cmos->rtc, 1, mask); 884 } 885 } 886 887 #else /* !CONFIG_ACPI */ 888 889 static inline void acpi_rtc_event_setup(struct device *dev) 890 { 891 } 892 893 static inline void acpi_rtc_event_cleanup(void) 894 { 895 } 896 897 static inline void acpi_cmos_wake_setup(struct device *dev) 898 { 899 } 900 901 static inline void cmos_check_acpi_rtc_status(struct device *dev, 902 unsigned char *rtc_control) 903 { 904 } 905 #endif /* CONFIG_ACPI */ 906 907 #ifdef CONFIG_PNP 908 #define INITSECTION 909 910 #else 911 #define INITSECTION __init 912 #endif 913 914 #define SECS_PER_DAY (24 * 60 * 60) 915 #define SECS_PER_MONTH (28 * SECS_PER_DAY) 916 #define SECS_PER_YEAR (365 * SECS_PER_DAY) 917 918 static int INITSECTION 919 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 920 { 921 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 922 int retval = 0; 923 unsigned char rtc_control; 924 unsigned address_space; 925 u32 flags = 0; 926 struct nvmem_config nvmem_cfg = { 927 .name = "cmos_nvram", 928 .word_size = 1, 929 .stride = 1, 930 .reg_read = cmos_nvram_read, 931 .reg_write = cmos_nvram_write, 932 .priv = &cmos_rtc, 933 }; 934 935 /* there can be only one ... */ 936 if (cmos_rtc.dev) 937 return -EBUSY; 938 939 if (!ports) 940 return -ENODEV; 941 942 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 943 * 944 * REVISIT non-x86 systems may instead use memory space resources 945 * (needing ioremap etc), not i/o space resources like this ... 946 */ 947 if (RTC_IOMAPPED) 948 ports = request_region(ports->start, resource_size(ports), 949 driver_name); 950 else 951 ports = request_mem_region(ports->start, resource_size(ports), 952 driver_name); 953 if (!ports) { 954 dev_dbg(dev, "i/o registers already in use\n"); 955 return -EBUSY; 956 } 957 958 cmos_rtc.irq = rtc_irq; 959 cmos_rtc.iomem = ports; 960 961 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 962 * driver did, but don't reject unknown configs. Old hardware 963 * won't address 128 bytes. Newer chips have multiple banks, 964 * though they may not be listed in one I/O resource. 965 */ 966 #if defined(CONFIG_ATARI) 967 address_space = 64; 968 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 969 || defined(__sparc__) || defined(__mips__) \ 970 || defined(__powerpc__) 971 address_space = 128; 972 #else 973 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 974 address_space = 128; 975 #endif 976 if (can_bank2 && ports->end > (ports->start + 1)) 977 address_space = 256; 978 979 /* For ACPI systems extension info comes from the FADT. On others, 980 * board specific setup provides it as appropriate. Systems where 981 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 982 * some almost-clones) can provide hooks to make that behave. 983 * 984 * Note that ACPI doesn't preclude putting these registers into 985 * "extended" areas of the chip, including some that we won't yet 986 * expect CMOS_READ and friends to handle. 987 */ 988 if (info) { 989 if (info->flags) 990 flags = info->flags; 991 if (info->address_space) 992 address_space = info->address_space; 993 994 cmos_rtc.day_alrm = info->rtc_day_alarm; 995 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 996 cmos_rtc.century = info->rtc_century; 997 998 if (info->wake_on && info->wake_off) { 999 cmos_rtc.wake_on = info->wake_on; 1000 cmos_rtc.wake_off = info->wake_off; 1001 } 1002 } else { 1003 acpi_cmos_wake_setup(dev); 1004 } 1005 1006 if (cmos_rtc.day_alrm >= 128) 1007 cmos_rtc.day_alrm = 0; 1008 1009 if (cmos_rtc.mon_alrm >= 128) 1010 cmos_rtc.mon_alrm = 0; 1011 1012 if (cmos_rtc.century >= 128) 1013 cmos_rtc.century = 0; 1014 1015 cmos_rtc.dev = dev; 1016 dev_set_drvdata(dev, &cmos_rtc); 1017 1018 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 1019 if (IS_ERR(cmos_rtc.rtc)) { 1020 retval = PTR_ERR(cmos_rtc.rtc); 1021 goto cleanup0; 1022 } 1023 1024 if (cmos_rtc.mon_alrm) 1025 cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1; 1026 else if (cmos_rtc.day_alrm) 1027 cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1; 1028 else 1029 cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1; 1030 1031 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 1032 1033 if (!mc146818_does_rtc_work()) { 1034 dev_warn(dev, "broken or not accessible\n"); 1035 retval = -ENXIO; 1036 goto cleanup1; 1037 } 1038 1039 spin_lock_irq(&rtc_lock); 1040 1041 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 1042 /* force periodic irq to CMOS reset default of 1024Hz; 1043 * 1044 * REVISIT it's been reported that at least one x86_64 ALI 1045 * mobo doesn't use 32KHz here ... for portability we might 1046 * need to do something about other clock frequencies. 1047 */ 1048 cmos_rtc.rtc->irq_freq = 1024; 1049 if (use_hpet_alarm()) 1050 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 1051 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 1052 } 1053 1054 /* disable irqs */ 1055 if (is_valid_irq(rtc_irq)) 1056 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 1057 1058 rtc_control = CMOS_READ(RTC_CONTROL); 1059 1060 spin_unlock_irq(&rtc_lock); 1061 1062 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 1063 dev_warn(dev, "only 24-hr supported\n"); 1064 retval = -ENXIO; 1065 goto cleanup1; 1066 } 1067 1068 if (use_hpet_alarm()) 1069 hpet_rtc_timer_init(); 1070 1071 if (is_valid_irq(rtc_irq)) { 1072 irq_handler_t rtc_cmos_int_handler; 1073 1074 if (use_hpet_alarm()) { 1075 rtc_cmos_int_handler = hpet_rtc_interrupt; 1076 retval = hpet_register_irq_handler(cmos_interrupt); 1077 if (retval) { 1078 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 1079 dev_warn(dev, "hpet_register_irq_handler " 1080 " failed in rtc_init()."); 1081 goto cleanup1; 1082 } 1083 } else 1084 rtc_cmos_int_handler = cmos_interrupt; 1085 1086 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 1087 0, dev_name(&cmos_rtc.rtc->dev), 1088 cmos_rtc.rtc); 1089 if (retval < 0) { 1090 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 1091 goto cleanup1; 1092 } 1093 } else { 1094 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features); 1095 } 1096 1097 cmos_rtc.rtc->ops = &cmos_rtc_ops; 1098 1099 retval = devm_rtc_register_device(cmos_rtc.rtc); 1100 if (retval) 1101 goto cleanup2; 1102 1103 /* Set the sync offset for the periodic 11min update correct */ 1104 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2; 1105 1106 /* export at least the first block of NVRAM */ 1107 nvmem_cfg.size = address_space - NVRAM_OFFSET; 1108 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg); 1109 1110 /* 1111 * Everything has gone well so far, so by default register a handler for 1112 * the ACPI RTC fixed event. 1113 */ 1114 if (!info) 1115 acpi_rtc_event_setup(dev); 1116 1117 dev_info(dev, "%s%s, %d bytes nvram%s\n", 1118 !is_valid_irq(rtc_irq) ? "no alarms" : 1119 cmos_rtc.mon_alrm ? "alarms up to one year" : 1120 cmos_rtc.day_alrm ? "alarms up to one month" : 1121 "alarms up to one day", 1122 cmos_rtc.century ? ", y3k" : "", 1123 nvmem_cfg.size, 1124 use_hpet_alarm() ? ", hpet irqs" : ""); 1125 1126 return 0; 1127 1128 cleanup2: 1129 if (is_valid_irq(rtc_irq)) 1130 free_irq(rtc_irq, cmos_rtc.rtc); 1131 cleanup1: 1132 cmos_rtc.dev = NULL; 1133 cleanup0: 1134 if (RTC_IOMAPPED) 1135 release_region(ports->start, resource_size(ports)); 1136 else 1137 release_mem_region(ports->start, resource_size(ports)); 1138 return retval; 1139 } 1140 1141 static void cmos_do_shutdown(int rtc_irq) 1142 { 1143 spin_lock_irq(&rtc_lock); 1144 if (is_valid_irq(rtc_irq)) 1145 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 1146 spin_unlock_irq(&rtc_lock); 1147 } 1148 1149 static void cmos_do_remove(struct device *dev) 1150 { 1151 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1152 struct resource *ports; 1153 1154 cmos_do_shutdown(cmos->irq); 1155 1156 if (is_valid_irq(cmos->irq)) { 1157 free_irq(cmos->irq, cmos->rtc); 1158 if (use_hpet_alarm()) 1159 hpet_unregister_irq_handler(cmos_interrupt); 1160 } 1161 1162 if (!dev_get_platdata(dev)) 1163 acpi_rtc_event_cleanup(); 1164 1165 cmos->rtc = NULL; 1166 1167 ports = cmos->iomem; 1168 if (RTC_IOMAPPED) 1169 release_region(ports->start, resource_size(ports)); 1170 else 1171 release_mem_region(ports->start, resource_size(ports)); 1172 cmos->iomem = NULL; 1173 1174 cmos->dev = NULL; 1175 } 1176 1177 static int cmos_aie_poweroff(struct device *dev) 1178 { 1179 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1180 struct rtc_time now; 1181 time64_t t_now; 1182 int retval = 0; 1183 unsigned char rtc_control; 1184 1185 if (!cmos->alarm_expires) 1186 return -EINVAL; 1187 1188 spin_lock_irq(&rtc_lock); 1189 rtc_control = CMOS_READ(RTC_CONTROL); 1190 spin_unlock_irq(&rtc_lock); 1191 1192 /* We only care about the situation where AIE is disabled. */ 1193 if (rtc_control & RTC_AIE) 1194 return -EBUSY; 1195 1196 cmos_read_time(dev, &now); 1197 t_now = rtc_tm_to_time64(&now); 1198 1199 /* 1200 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 1201 * automatically right after shutdown on some buggy boxes. 1202 * This automatic rebooting issue won't happen when the alarm 1203 * time is larger than now+1 seconds. 1204 * 1205 * If the alarm time is equal to now+1 seconds, the issue can be 1206 * prevented by cancelling the alarm. 1207 */ 1208 if (cmos->alarm_expires == t_now + 1) { 1209 struct rtc_wkalrm alarm; 1210 1211 /* Cancel the AIE timer by configuring the past time. */ 1212 rtc_time64_to_tm(t_now - 1, &alarm.time); 1213 alarm.enabled = 0; 1214 retval = cmos_set_alarm(dev, &alarm); 1215 } else if (cmos->alarm_expires > t_now + 1) { 1216 retval = -EBUSY; 1217 } 1218 1219 return retval; 1220 } 1221 1222 static int cmos_suspend(struct device *dev) 1223 { 1224 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1225 unsigned char tmp; 1226 1227 /* only the alarm might be a wakeup event source */ 1228 spin_lock_irq(&rtc_lock); 1229 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 1230 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 1231 unsigned char mask; 1232 1233 if (device_may_wakeup(dev)) 1234 mask = RTC_IRQMASK & ~RTC_AIE; 1235 else 1236 mask = RTC_IRQMASK; 1237 tmp &= ~mask; 1238 CMOS_WRITE(tmp, RTC_CONTROL); 1239 if (use_hpet_alarm()) 1240 hpet_mask_rtc_irq_bit(mask); 1241 cmos_checkintr(cmos, tmp); 1242 } 1243 spin_unlock_irq(&rtc_lock); 1244 1245 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 1246 cmos->enabled_wake = 1; 1247 if (cmos->wake_on) 1248 cmos->wake_on(dev); 1249 else 1250 enable_irq_wake(cmos->irq); 1251 } 1252 1253 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm)); 1254 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1255 1256 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1257 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1258 tmp); 1259 1260 return 0; 1261 } 1262 1263 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1264 * after a detour through G3 "mechanical off", although the ACPI spec 1265 * says wakeup should only work from G1/S4 "hibernate". To most users, 1266 * distinctions between S4 and S5 are pointless. So when the hardware 1267 * allows, don't draw that distinction. 1268 */ 1269 static inline int cmos_poweroff(struct device *dev) 1270 { 1271 if (!IS_ENABLED(CONFIG_PM)) 1272 return -ENOSYS; 1273 1274 return cmos_suspend(dev); 1275 } 1276 1277 static void cmos_check_wkalrm(struct device *dev) 1278 { 1279 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1280 struct rtc_wkalrm current_alarm; 1281 time64_t t_now; 1282 time64_t t_current_expires; 1283 time64_t t_saved_expires; 1284 struct rtc_time now; 1285 1286 /* Check if we have RTC Alarm armed */ 1287 if (!(cmos->suspend_ctrl & RTC_AIE)) 1288 return; 1289 1290 cmos_read_time(dev, &now); 1291 t_now = rtc_tm_to_time64(&now); 1292 1293 /* 1294 * ACPI RTC wake event is cleared after resume from STR, 1295 * ACK the rtc irq here 1296 */ 1297 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1298 local_irq_disable(); 1299 cmos_interrupt(0, (void *)cmos->rtc); 1300 local_irq_enable(); 1301 return; 1302 } 1303 1304 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm)); 1305 cmos_read_alarm(dev, ¤t_alarm); 1306 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1307 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1308 if (t_current_expires != t_saved_expires || 1309 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1310 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1311 } 1312 } 1313 1314 static int __maybe_unused cmos_resume(struct device *dev) 1315 { 1316 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1317 unsigned char tmp; 1318 1319 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1320 if (cmos->wake_off) 1321 cmos->wake_off(dev); 1322 else 1323 disable_irq_wake(cmos->irq); 1324 cmos->enabled_wake = 0; 1325 } 1326 1327 /* The BIOS might have changed the alarm, restore it */ 1328 cmos_check_wkalrm(dev); 1329 1330 spin_lock_irq(&rtc_lock); 1331 tmp = cmos->suspend_ctrl; 1332 cmos->suspend_ctrl = 0; 1333 /* re-enable any irqs previously active */ 1334 if (tmp & RTC_IRQMASK) { 1335 unsigned char mask; 1336 1337 if (device_may_wakeup(dev) && use_hpet_alarm()) 1338 hpet_rtc_timer_init(); 1339 1340 do { 1341 CMOS_WRITE(tmp, RTC_CONTROL); 1342 if (use_hpet_alarm()) 1343 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1344 1345 mask = CMOS_READ(RTC_INTR_FLAGS); 1346 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1347 if (!use_hpet_alarm() || !is_intr(mask)) 1348 break; 1349 1350 /* force one-shot behavior if HPET blocked 1351 * the wake alarm's irq 1352 */ 1353 rtc_update_irq(cmos->rtc, 1, mask); 1354 tmp &= ~RTC_AIE; 1355 hpet_mask_rtc_irq_bit(RTC_AIE); 1356 } while (mask & RTC_AIE); 1357 1358 if (tmp & RTC_AIE) 1359 cmos_check_acpi_rtc_status(dev, &tmp); 1360 } 1361 spin_unlock_irq(&rtc_lock); 1362 1363 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1364 1365 return 0; 1366 } 1367 1368 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1369 1370 /*----------------------------------------------------------------*/ 1371 1372 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1373 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1374 * probably list them in similar PNPBIOS tables; so PNP is more common. 1375 * 1376 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1377 * predate even PNPBIOS should set up platform_bus devices. 1378 */ 1379 1380 #ifdef CONFIG_PNP 1381 1382 #include <linux/pnp.h> 1383 1384 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1385 { 1386 int irq; 1387 1388 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1389 irq = 0; 1390 #ifdef CONFIG_X86 1391 /* Some machines contain a PNP entry for the RTC, but 1392 * don't define the IRQ. It should always be safe to 1393 * hardcode it on systems with a legacy PIC. 1394 */ 1395 if (nr_legacy_irqs()) 1396 irq = RTC_IRQ; 1397 #endif 1398 } else { 1399 irq = pnp_irq(pnp, 0); 1400 } 1401 1402 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1403 } 1404 1405 static void cmos_pnp_remove(struct pnp_dev *pnp) 1406 { 1407 cmos_do_remove(&pnp->dev); 1408 } 1409 1410 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1411 { 1412 struct device *dev = &pnp->dev; 1413 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1414 1415 if (system_state == SYSTEM_POWER_OFF) { 1416 int retval = cmos_poweroff(dev); 1417 1418 if (cmos_aie_poweroff(dev) < 0 && !retval) 1419 return; 1420 } 1421 1422 cmos_do_shutdown(cmos->irq); 1423 } 1424 1425 static const struct pnp_device_id rtc_ids[] = { 1426 { .id = "PNP0b00", }, 1427 { .id = "PNP0b01", }, 1428 { .id = "PNP0b02", }, 1429 { }, 1430 }; 1431 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1432 1433 static struct pnp_driver cmos_pnp_driver = { 1434 .name = driver_name, 1435 .id_table = rtc_ids, 1436 .probe = cmos_pnp_probe, 1437 .remove = cmos_pnp_remove, 1438 .shutdown = cmos_pnp_shutdown, 1439 1440 /* flag ensures resume() gets called, and stops syslog spam */ 1441 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1442 .driver = { 1443 .pm = &cmos_pm_ops, 1444 }, 1445 }; 1446 1447 #endif /* CONFIG_PNP */ 1448 1449 #ifdef CONFIG_OF 1450 static const struct of_device_id of_cmos_match[] = { 1451 { 1452 .compatible = "motorola,mc146818", 1453 }, 1454 { }, 1455 }; 1456 MODULE_DEVICE_TABLE(of, of_cmos_match); 1457 1458 static __init void cmos_of_init(struct platform_device *pdev) 1459 { 1460 struct device_node *node = pdev->dev.of_node; 1461 const __be32 *val; 1462 1463 if (!node) 1464 return; 1465 1466 val = of_get_property(node, "ctrl-reg", NULL); 1467 if (val) 1468 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1469 1470 val = of_get_property(node, "freq-reg", NULL); 1471 if (val) 1472 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1473 } 1474 #else 1475 static inline void cmos_of_init(struct platform_device *pdev) {} 1476 #endif 1477 /*----------------------------------------------------------------*/ 1478 1479 /* Platform setup should have set up an RTC device, when PNP is 1480 * unavailable ... this could happen even on (older) PCs. 1481 */ 1482 1483 static int __init cmos_platform_probe(struct platform_device *pdev) 1484 { 1485 struct resource *resource; 1486 int irq; 1487 1488 cmos_of_init(pdev); 1489 1490 if (RTC_IOMAPPED) 1491 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1492 else 1493 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1494 irq = platform_get_irq(pdev, 0); 1495 if (irq < 0) 1496 irq = -1; 1497 1498 return cmos_do_probe(&pdev->dev, resource, irq); 1499 } 1500 1501 static void cmos_platform_remove(struct platform_device *pdev) 1502 { 1503 cmos_do_remove(&pdev->dev); 1504 } 1505 1506 static void cmos_platform_shutdown(struct platform_device *pdev) 1507 { 1508 struct device *dev = &pdev->dev; 1509 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1510 1511 if (system_state == SYSTEM_POWER_OFF) { 1512 int retval = cmos_poweroff(dev); 1513 1514 if (cmos_aie_poweroff(dev) < 0 && !retval) 1515 return; 1516 } 1517 1518 cmos_do_shutdown(cmos->irq); 1519 } 1520 1521 /* work with hotplug and coldplug */ 1522 MODULE_ALIAS("platform:rtc_cmos"); 1523 1524 static struct platform_driver cmos_platform_driver = { 1525 .remove = cmos_platform_remove, 1526 .shutdown = cmos_platform_shutdown, 1527 .driver = { 1528 .name = driver_name, 1529 .pm = &cmos_pm_ops, 1530 .of_match_table = of_match_ptr(of_cmos_match), 1531 } 1532 }; 1533 1534 #ifdef CONFIG_PNP 1535 static bool pnp_driver_registered; 1536 #endif 1537 static bool platform_driver_registered; 1538 1539 static int __init cmos_init(void) 1540 { 1541 int retval = 0; 1542 1543 #ifdef CONFIG_PNP 1544 retval = pnp_register_driver(&cmos_pnp_driver); 1545 if (retval == 0) 1546 pnp_driver_registered = true; 1547 #endif 1548 1549 if (!cmos_rtc.dev) { 1550 retval = platform_driver_probe(&cmos_platform_driver, 1551 cmos_platform_probe); 1552 if (retval == 0) 1553 platform_driver_registered = true; 1554 } 1555 1556 if (retval == 0) 1557 return 0; 1558 1559 #ifdef CONFIG_PNP 1560 if (pnp_driver_registered) 1561 pnp_unregister_driver(&cmos_pnp_driver); 1562 #endif 1563 return retval; 1564 } 1565 module_init(cmos_init); 1566 1567 static void __exit cmos_exit(void) 1568 { 1569 #ifdef CONFIG_PNP 1570 if (pnp_driver_registered) 1571 pnp_unregister_driver(&cmos_pnp_driver); 1572 #endif 1573 if (platform_driver_registered) 1574 platform_driver_unregister(&cmos_platform_driver); 1575 } 1576 module_exit(cmos_exit); 1577 1578 1579 MODULE_AUTHOR("David Brownell"); 1580 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1581 MODULE_LICENSE("GPL"); 1582