1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright (c) 2011 Samsung Electronics Co., Ltd
4 //              http://www.samsung.com
5 
6 #include <linux/cleanup.h>
7 #include <linux/err.h>
8 #include <linux/of.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/machine.h>
14 #include <linux/mfd/samsung/core.h>
15 #include <linux/mfd/samsung/s5m8767.h>
16 #include <linux/regulator/of_regulator.h>
17 #include <linux/regmap.h>
18 
19 #define S5M8767_OPMODE_NORMAL_MODE 0x1
20 
21 struct s5m8767_info {
22 	struct device *dev;
23 	struct sec_pmic_dev *iodev;
24 	int num_regulators;
25 	struct sec_opmode_data *opmode;
26 
27 	int ramp_delay;
28 	bool buck2_ramp;
29 	bool buck3_ramp;
30 	bool buck4_ramp;
31 
32 	bool buck2_gpiodvs;
33 	bool buck3_gpiodvs;
34 	bool buck4_gpiodvs;
35 	u8 buck2_vol[8];
36 	u8 buck3_vol[8];
37 	u8 buck4_vol[8];
38 	struct gpio_desc *buck_gpios[3];
39 	struct gpio_desc *buck_ds[3];
40 	int buck_gpioindex;
41 };
42 
43 struct sec_voltage_desc {
44 	int max;
45 	int min;
46 	int step;
47 };
48 
49 static const struct sec_voltage_desc buck_voltage_val1 = {
50 	.max = 2225000,
51 	.min =  650000,
52 	.step =   6250,
53 };
54 
55 static const struct sec_voltage_desc buck_voltage_val2 = {
56 	.max = 1600000,
57 	.min =  600000,
58 	.step =   6250,
59 };
60 
61 static const struct sec_voltage_desc buck_voltage_val3 = {
62 	.max = 3000000,
63 	.min =  750000,
64 	.step =  12500,
65 };
66 
67 static const struct sec_voltage_desc ldo_voltage_val1 = {
68 	.max = 3950000,
69 	.min =  800000,
70 	.step =  50000,
71 };
72 
73 static const struct sec_voltage_desc ldo_voltage_val2 = {
74 	.max = 2375000,
75 	.min =  800000,
76 	.step =  25000,
77 };
78 
79 static const struct sec_voltage_desc *reg_voltage_map[] = {
80 	[S5M8767_LDO1] = &ldo_voltage_val2,
81 	[S5M8767_LDO2] = &ldo_voltage_val2,
82 	[S5M8767_LDO3] = &ldo_voltage_val1,
83 	[S5M8767_LDO4] = &ldo_voltage_val1,
84 	[S5M8767_LDO5] = &ldo_voltage_val1,
85 	[S5M8767_LDO6] = &ldo_voltage_val2,
86 	[S5M8767_LDO7] = &ldo_voltage_val2,
87 	[S5M8767_LDO8] = &ldo_voltage_val2,
88 	[S5M8767_LDO9] = &ldo_voltage_val1,
89 	[S5M8767_LDO10] = &ldo_voltage_val1,
90 	[S5M8767_LDO11] = &ldo_voltage_val1,
91 	[S5M8767_LDO12] = &ldo_voltage_val1,
92 	[S5M8767_LDO13] = &ldo_voltage_val1,
93 	[S5M8767_LDO14] = &ldo_voltage_val1,
94 	[S5M8767_LDO15] = &ldo_voltage_val2,
95 	[S5M8767_LDO16] = &ldo_voltage_val1,
96 	[S5M8767_LDO17] = &ldo_voltage_val1,
97 	[S5M8767_LDO18] = &ldo_voltage_val1,
98 	[S5M8767_LDO19] = &ldo_voltage_val1,
99 	[S5M8767_LDO20] = &ldo_voltage_val1,
100 	[S5M8767_LDO21] = &ldo_voltage_val1,
101 	[S5M8767_LDO22] = &ldo_voltage_val1,
102 	[S5M8767_LDO23] = &ldo_voltage_val1,
103 	[S5M8767_LDO24] = &ldo_voltage_val1,
104 	[S5M8767_LDO25] = &ldo_voltage_val1,
105 	[S5M8767_LDO26] = &ldo_voltage_val1,
106 	[S5M8767_LDO27] = &ldo_voltage_val1,
107 	[S5M8767_LDO28] = &ldo_voltage_val1,
108 	[S5M8767_BUCK1] = &buck_voltage_val1,
109 	[S5M8767_BUCK2] = &buck_voltage_val2,
110 	[S5M8767_BUCK3] = &buck_voltage_val2,
111 	[S5M8767_BUCK4] = &buck_voltage_val2,
112 	[S5M8767_BUCK5] = &buck_voltage_val1,
113 	[S5M8767_BUCK6] = &buck_voltage_val1,
114 	[S5M8767_BUCK7] = &buck_voltage_val3,
115 	[S5M8767_BUCK8] = &buck_voltage_val3,
116 	[S5M8767_BUCK9] = &buck_voltage_val3,
117 };
118 
119 static const unsigned int s5m8767_opmode_reg[][4] = {
120 	/* {OFF, ON, LOWPOWER, SUSPEND} */
121 	/* LDO1 ... LDO28 */
122 	{0x0, 0x3, 0x2, 0x1}, /* LDO1 */
123 	{0x0, 0x3, 0x2, 0x1},
124 	{0x0, 0x3, 0x2, 0x1},
125 	{0x0, 0x0, 0x0, 0x0},
126 	{0x0, 0x3, 0x2, 0x1}, /* LDO5 */
127 	{0x0, 0x3, 0x2, 0x1},
128 	{0x0, 0x3, 0x2, 0x1},
129 	{0x0, 0x3, 0x2, 0x1},
130 	{0x0, 0x3, 0x2, 0x1},
131 	{0x0, 0x3, 0x2, 0x1}, /* LDO10 */
132 	{0x0, 0x3, 0x2, 0x1},
133 	{0x0, 0x3, 0x2, 0x1},
134 	{0x0, 0x3, 0x2, 0x1},
135 	{0x0, 0x3, 0x2, 0x1},
136 	{0x0, 0x3, 0x2, 0x1}, /* LDO15 */
137 	{0x0, 0x3, 0x2, 0x1},
138 	{0x0, 0x3, 0x2, 0x1},
139 	{0x0, 0x0, 0x0, 0x0},
140 	{0x0, 0x3, 0x2, 0x1},
141 	{0x0, 0x3, 0x2, 0x1}, /* LDO20 */
142 	{0x0, 0x3, 0x2, 0x1},
143 	{0x0, 0x3, 0x2, 0x1},
144 	{0x0, 0x0, 0x0, 0x0},
145 	{0x0, 0x3, 0x2, 0x1},
146 	{0x0, 0x3, 0x2, 0x1}, /* LDO25 */
147 	{0x0, 0x3, 0x2, 0x1},
148 	{0x0, 0x3, 0x2, 0x1},
149 	{0x0, 0x3, 0x2, 0x1}, /* LDO28 */
150 
151 	/* BUCK1 ... BUCK9 */
152 	{0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
153 	{0x0, 0x3, 0x1, 0x1},
154 	{0x0, 0x3, 0x1, 0x1},
155 	{0x0, 0x3, 0x1, 0x1},
156 	{0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
157 	{0x0, 0x3, 0x1, 0x1},
158 	{0x0, 0x3, 0x1, 0x1},
159 	{0x0, 0x3, 0x1, 0x1},
160 	{0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
161 };
162 
163 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id,
164 				int *reg, int *enable_ctrl)
165 {
166 	int i;
167 	unsigned int mode;
168 
169 	switch (reg_id) {
170 	case S5M8767_LDO1 ... S5M8767_LDO2:
171 		*reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
172 		break;
173 	case S5M8767_LDO3 ... S5M8767_LDO28:
174 		*reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
175 		break;
176 	case S5M8767_BUCK1:
177 		*reg = S5M8767_REG_BUCK1CTRL1;
178 		break;
179 	case S5M8767_BUCK2 ... S5M8767_BUCK4:
180 		*reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
181 		break;
182 	case S5M8767_BUCK5:
183 		*reg = S5M8767_REG_BUCK5CTRL1;
184 		break;
185 	case S5M8767_BUCK6 ... S5M8767_BUCK9:
186 		*reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
187 		break;
188 	default:
189 		return -EINVAL;
190 	}
191 
192 	for (i = 0; i < s5m8767->num_regulators; i++) {
193 		if (s5m8767->opmode[i].id == reg_id) {
194 			mode = s5m8767->opmode[i].mode;
195 			break;
196 		}
197 	}
198 
199 	if (i >= s5m8767->num_regulators)
200 		return -EINVAL;
201 
202 	*enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
203 
204 	return 0;
205 }
206 
207 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
208 {
209 	int reg;
210 
211 	switch (reg_id) {
212 	case S5M8767_LDO1 ... S5M8767_LDO2:
213 		reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
214 		break;
215 	case S5M8767_LDO3 ... S5M8767_LDO28:
216 		reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
217 		break;
218 	case S5M8767_BUCK1:
219 		reg = S5M8767_REG_BUCK1CTRL2;
220 		break;
221 	case S5M8767_BUCK2:
222 		reg = S5M8767_REG_BUCK2DVS1;
223 		if (s5m8767->buck2_gpiodvs)
224 			reg += s5m8767->buck_gpioindex;
225 		break;
226 	case S5M8767_BUCK3:
227 		reg = S5M8767_REG_BUCK3DVS1;
228 		if (s5m8767->buck3_gpiodvs)
229 			reg += s5m8767->buck_gpioindex;
230 		break;
231 	case S5M8767_BUCK4:
232 		reg = S5M8767_REG_BUCK4DVS1;
233 		if (s5m8767->buck4_gpiodvs)
234 			reg += s5m8767->buck_gpioindex;
235 		break;
236 	case S5M8767_BUCK5:
237 		reg = S5M8767_REG_BUCK5CTRL2;
238 		break;
239 	case S5M8767_BUCK6 ... S5M8767_BUCK9:
240 		reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
241 		break;
242 	default:
243 		return -EINVAL;
244 	}
245 
246 	return reg;
247 }
248 
249 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
250 					  int min_vol)
251 {
252 	int selector = 0;
253 
254 	if (desc == NULL)
255 		return -EINVAL;
256 
257 	if (min_vol > desc->max)
258 		return -EINVAL;
259 
260 	if (min_vol < desc->min)
261 		min_vol = desc->min;
262 
263 	selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
264 
265 	if (desc->min + desc->step * selector > desc->max)
266 		return -EINVAL;
267 
268 	return selector;
269 }
270 
271 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
272 {
273 	int temp_index = s5m8767->buck_gpioindex;
274 
275 	gpiod_set_value(s5m8767->buck_gpios[0], !!(temp_index & BIT(2)));
276 	gpiod_set_value(s5m8767->buck_gpios[1], !!(temp_index & BIT(1)));
277 	gpiod_set_value(s5m8767->buck_gpios[2], !!(temp_index & BIT(0)));
278 
279 	return 0;
280 }
281 
282 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
283 {
284 	int temp_index = s5m8767->buck_gpioindex;
285 
286 	gpiod_set_value(s5m8767->buck_gpios[2], !!(temp_index & BIT(0)));
287 	gpiod_set_value(s5m8767->buck_gpios[1], !!(temp_index & BIT(1)));
288 	gpiod_set_value(s5m8767->buck_gpios[0], !!(temp_index & BIT(2)));
289 
290 	return 0;
291 }
292 
293 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
294 				   unsigned selector)
295 {
296 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
297 	int reg_id = rdev_get_id(rdev);
298 	int old_index, index = 0;
299 	u8 *buck234_vol = NULL;
300 
301 	switch (reg_id) {
302 	case S5M8767_LDO1 ... S5M8767_LDO28:
303 		break;
304 	case S5M8767_BUCK1 ... S5M8767_BUCK6:
305 		if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
306 			buck234_vol = &s5m8767->buck2_vol[0];
307 		else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
308 			buck234_vol = &s5m8767->buck3_vol[0];
309 		else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
310 			buck234_vol = &s5m8767->buck4_vol[0];
311 		break;
312 	case S5M8767_BUCK7 ... S5M8767_BUCK8:
313 		return -EINVAL;
314 	case S5M8767_BUCK9:
315 		break;
316 	default:
317 		return -EINVAL;
318 	}
319 
320 	/* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
321 	if (buck234_vol) {
322 		while (*buck234_vol != selector) {
323 			buck234_vol++;
324 			index++;
325 		}
326 		old_index = s5m8767->buck_gpioindex;
327 		s5m8767->buck_gpioindex = index;
328 
329 		if (index > old_index)
330 			return s5m8767_set_high(s5m8767);
331 		else
332 			return s5m8767_set_low(s5m8767);
333 	} else {
334 		return regulator_set_voltage_sel_regmap(rdev, selector);
335 	}
336 }
337 
338 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
339 					     unsigned int old_sel,
340 					     unsigned int new_sel)
341 {
342 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
343 
344 	if ((old_sel < new_sel) && s5m8767->ramp_delay)
345 		return DIV_ROUND_UP(rdev->desc->uV_step * (new_sel - old_sel),
346 					s5m8767->ramp_delay * 1000);
347 	return 0;
348 }
349 
350 static const struct regulator_ops s5m8767_ops = {
351 	.list_voltage		= regulator_list_voltage_linear,
352 	.is_enabled		= regulator_is_enabled_regmap,
353 	.enable			= regulator_enable_regmap,
354 	.disable		= regulator_disable_regmap,
355 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
356 	.set_voltage_sel	= s5m8767_set_voltage_sel,
357 	.set_voltage_time_sel	= s5m8767_set_voltage_time_sel,
358 };
359 
360 static const struct regulator_ops s5m8767_buck78_ops = {
361 	.list_voltage		= regulator_list_voltage_linear,
362 	.is_enabled		= regulator_is_enabled_regmap,
363 	.enable			= regulator_enable_regmap,
364 	.disable		= regulator_disable_regmap,
365 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
366 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
367 };
368 
369 #define s5m8767_regulator_desc(_name) {		\
370 	.name		= #_name,		\
371 	.id		= S5M8767_##_name,	\
372 	.ops		= &s5m8767_ops,		\
373 	.type		= REGULATOR_VOLTAGE,	\
374 	.owner		= THIS_MODULE,		\
375 }
376 
377 #define s5m8767_regulator_buck78_desc(_name) {	\
378 	.name		= #_name,		\
379 	.id		= S5M8767_##_name,	\
380 	.ops		= &s5m8767_buck78_ops,	\
381 	.type		= REGULATOR_VOLTAGE,	\
382 	.owner		= THIS_MODULE,		\
383 }
384 
385 static struct regulator_desc regulators[] = {
386 	s5m8767_regulator_desc(LDO1),
387 	s5m8767_regulator_desc(LDO2),
388 	s5m8767_regulator_desc(LDO3),
389 	s5m8767_regulator_desc(LDO4),
390 	s5m8767_regulator_desc(LDO5),
391 	s5m8767_regulator_desc(LDO6),
392 	s5m8767_regulator_desc(LDO7),
393 	s5m8767_regulator_desc(LDO8),
394 	s5m8767_regulator_desc(LDO9),
395 	s5m8767_regulator_desc(LDO10),
396 	s5m8767_regulator_desc(LDO11),
397 	s5m8767_regulator_desc(LDO12),
398 	s5m8767_regulator_desc(LDO13),
399 	s5m8767_regulator_desc(LDO14),
400 	s5m8767_regulator_desc(LDO15),
401 	s5m8767_regulator_desc(LDO16),
402 	s5m8767_regulator_desc(LDO17),
403 	s5m8767_regulator_desc(LDO18),
404 	s5m8767_regulator_desc(LDO19),
405 	s5m8767_regulator_desc(LDO20),
406 	s5m8767_regulator_desc(LDO21),
407 	s5m8767_regulator_desc(LDO22),
408 	s5m8767_regulator_desc(LDO23),
409 	s5m8767_regulator_desc(LDO24),
410 	s5m8767_regulator_desc(LDO25),
411 	s5m8767_regulator_desc(LDO26),
412 	s5m8767_regulator_desc(LDO27),
413 	s5m8767_regulator_desc(LDO28),
414 	s5m8767_regulator_desc(BUCK1),
415 	s5m8767_regulator_desc(BUCK2),
416 	s5m8767_regulator_desc(BUCK3),
417 	s5m8767_regulator_desc(BUCK4),
418 	s5m8767_regulator_desc(BUCK5),
419 	s5m8767_regulator_desc(BUCK6),
420 	s5m8767_regulator_buck78_desc(BUCK7),
421 	s5m8767_regulator_buck78_desc(BUCK8),
422 	s5m8767_regulator_desc(BUCK9),
423 };
424 
425 /*
426  * Enable GPIO control over BUCK9 in regulator_config for that regulator.
427  */
428 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767,
429 		struct sec_regulator_data *rdata,
430 		struct regulator_config *config)
431 {
432 	int i, mode = 0;
433 
434 	if (rdata->id != S5M8767_BUCK9)
435 		return;
436 
437 	/* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */
438 	for (i = 0; i < s5m8767->num_regulators; i++) {
439 		const struct sec_opmode_data *opmode = &s5m8767->opmode[i];
440 		if (opmode->id == rdata->id) {
441 			mode = s5m8767_opmode_reg[rdata->id][opmode->mode];
442 			break;
443 		}
444 	}
445 	if (mode != S5M8767_ENCTRL_USE_GPIO) {
446 		dev_warn(s5m8767->dev,
447 				"ext-control for %pOFn: mismatched op_mode (%x), ignoring\n",
448 				rdata->reg_node, mode);
449 		return;
450 	}
451 
452 	if (!rdata->ext_control_gpiod) {
453 		dev_warn(s5m8767->dev,
454 				"ext-control for %pOFn: GPIO not valid, ignoring\n",
455 			 rdata->reg_node);
456 		return;
457 	}
458 
459 	config->ena_gpiod = rdata->ext_control_gpiod;
460 }
461 
462 /*
463  * Turn on GPIO control over BUCK9.
464  */
465 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767,
466 		struct regulator_dev *rdev)
467 {
468 	int id = rdev_get_id(rdev);
469 	int ret, reg, enable_ctrl;
470 
471 	if (id != S5M8767_BUCK9)
472 		return -EINVAL;
473 
474 	ret = s5m8767_get_register(s5m8767, id, &reg, &enable_ctrl);
475 	if (ret)
476 		return ret;
477 
478 	return regmap_update_bits(s5m8767->iodev->regmap_pmic,
479 			reg, S5M8767_ENCTRL_MASK,
480 			S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT);
481 }
482 
483 
484 #ifdef CONFIG_OF
485 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
486 					struct sec_platform_data *pdata)
487 {
488 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
489 	struct device_node *pmic_np, *reg_np;
490 	struct sec_regulator_data *rdata;
491 	struct sec_opmode_data *rmode;
492 	unsigned int i, dvs_voltage_nr = 8;
493 
494 	pmic_np = iodev->dev->of_node;
495 	if (!pmic_np) {
496 		dev_err(iodev->dev, "could not find pmic sub-node\n");
497 		return -ENODEV;
498 	}
499 
500 	struct device_node *regulators_np __free(device_node) = of_get_child_by_name(pmic_np,
501 										     "regulators");
502 	if (!regulators_np) {
503 		dev_err(iodev->dev, "could not find regulators sub-node\n");
504 		return -EINVAL;
505 	}
506 
507 	/* count the number of regulators to be supported in pmic */
508 	pdata->num_regulators = of_get_child_count(regulators_np);
509 
510 	rdata = devm_kcalloc(&pdev->dev,
511 			     pdata->num_regulators, sizeof(*rdata),
512 			     GFP_KERNEL);
513 	if (!rdata)
514 		return -ENOMEM;
515 
516 	rmode = devm_kcalloc(&pdev->dev,
517 			     pdata->num_regulators, sizeof(*rmode),
518 			     GFP_KERNEL);
519 	if (!rmode)
520 		return -ENOMEM;
521 
522 	pdata->regulators = rdata;
523 	pdata->opmode = rmode;
524 	for_each_child_of_node(regulators_np, reg_np) {
525 		for (i = 0; i < ARRAY_SIZE(regulators); i++)
526 			if (of_node_name_eq(reg_np, regulators[i].name))
527 				break;
528 
529 		if (i == ARRAY_SIZE(regulators)) {
530 			dev_warn(iodev->dev,
531 			"don't know how to configure regulator %pOFn\n",
532 			reg_np);
533 			continue;
534 		}
535 
536 		rdata->ext_control_gpiod = devm_fwnode_gpiod_get(
537 			&pdev->dev,
538 			of_fwnode_handle(reg_np),
539 			"s5m8767,pmic-ext-control",
540 			GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,
541 			"s5m8767");
542 		if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) {
543 			rdata->ext_control_gpiod = NULL;
544 		} else if (IS_ERR(rdata->ext_control_gpiod)) {
545 			of_node_put(reg_np);
546 			return PTR_ERR(rdata->ext_control_gpiod);
547 		}
548 
549 		rdata->id = i;
550 		rdata->initdata = of_get_regulator_init_data(
551 						&pdev->dev, reg_np,
552 						&regulators[i]);
553 		rdata->reg_node = reg_np;
554 		rdata++;
555 		rmode->id = i;
556 		if (of_property_read_u32(reg_np, "op_mode",
557 				&rmode->mode)) {
558 			dev_warn(iodev->dev,
559 				"no op_mode property at %pOF\n",
560 				reg_np);
561 
562 			rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
563 		}
564 		rmode++;
565 	}
566 
567 	if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs")) {
568 		pdata->buck2_gpiodvs = true;
569 
570 		if (of_property_read_u32_array(pmic_np,
571 				"s5m8767,pmic-buck2-dvs-voltage",
572 				pdata->buck2_voltage, dvs_voltage_nr)) {
573 			dev_err(iodev->dev, "buck2 voltages not specified\n");
574 			return -EINVAL;
575 		}
576 	}
577 
578 	if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs")) {
579 		pdata->buck3_gpiodvs = true;
580 
581 		if (of_property_read_u32_array(pmic_np,
582 				"s5m8767,pmic-buck3-dvs-voltage",
583 				pdata->buck3_voltage, dvs_voltage_nr)) {
584 			dev_err(iodev->dev, "buck3 voltages not specified\n");
585 			return -EINVAL;
586 		}
587 	}
588 
589 	if (of_property_read_bool(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs")) {
590 		pdata->buck4_gpiodvs = true;
591 
592 		if (of_property_read_u32_array(pmic_np,
593 				"s5m8767,pmic-buck4-dvs-voltage",
594 				pdata->buck4_voltage, dvs_voltage_nr)) {
595 			dev_err(iodev->dev, "buck4 voltages not specified\n");
596 			return -EINVAL;
597 		}
598 	}
599 
600 	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
601 						pdata->buck4_gpiodvs) {
602 		if (of_property_read_u32(pmic_np,
603 				"s5m8767,pmic-buck-default-dvs-idx",
604 				&pdata->buck_default_idx)) {
605 			pdata->buck_default_idx = 0;
606 		} else {
607 			if (pdata->buck_default_idx >= 8) {
608 				pdata->buck_default_idx = 0;
609 				dev_info(iodev->dev,
610 				"invalid value for default dvs index, use 0\n");
611 			}
612 		}
613 	}
614 
615 	pdata->buck2_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck2-ramp-enable");
616 	pdata->buck3_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck3-ramp-enable");
617 	pdata->buck4_ramp_enable = of_property_read_bool(pmic_np, "s5m8767,pmic-buck4-ramp-enable");
618 
619 	if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
620 			|| pdata->buck4_ramp_enable) {
621 		if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
622 				&pdata->buck_ramp_delay))
623 			pdata->buck_ramp_delay = 0;
624 	}
625 
626 	return 0;
627 }
628 #else
629 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
630 					struct sec_platform_data *pdata)
631 {
632 	return 0;
633 }
634 #endif /* CONFIG_OF */
635 
636 static int s5m8767_pmic_probe(struct platform_device *pdev)
637 {
638 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
639 	struct sec_platform_data *pdata = iodev->pdata;
640 	struct regulator_config config = { };
641 	struct s5m8767_info *s5m8767;
642 	int i, ret, buck_init;
643 	const char *gpiods_names[3] = { "S5M8767 DS2", "S5M8767 DS3", "S5M8767 DS4" };
644 	const char *gpiodvs_names[3] = { "S5M8767 SET1", "S5M8767 SET2", "S5M8767 SET3" };
645 
646 	if (!pdata) {
647 		dev_err(pdev->dev.parent, "Platform data not supplied\n");
648 		return -ENODEV;
649 	}
650 
651 	if (iodev->dev->of_node) {
652 		ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
653 		if (ret)
654 			return ret;
655 	}
656 
657 	if (pdata->buck2_gpiodvs) {
658 		if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
659 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
660 			return -EINVAL;
661 		}
662 	}
663 
664 	if (pdata->buck3_gpiodvs) {
665 		if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
666 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
667 			return -EINVAL;
668 		}
669 	}
670 
671 	if (pdata->buck4_gpiodvs) {
672 		if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
673 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
674 			return -EINVAL;
675 		}
676 	}
677 
678 	s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
679 				GFP_KERNEL);
680 	if (!s5m8767)
681 		return -ENOMEM;
682 
683 	s5m8767->dev = &pdev->dev;
684 	s5m8767->iodev = iodev;
685 	s5m8767->num_regulators = pdata->num_regulators;
686 	platform_set_drvdata(pdev, s5m8767);
687 
688 	s5m8767->buck_gpioindex = pdata->buck_default_idx;
689 	s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
690 	s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
691 	s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
692 
693 	s5m8767->ramp_delay = pdata->buck_ramp_delay;
694 	s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
695 	s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
696 	s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
697 	s5m8767->opmode = pdata->opmode;
698 
699 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
700 						   pdata->buck2_init);
701 
702 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
703 			buck_init);
704 
705 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
706 						   pdata->buck3_init);
707 
708 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
709 			buck_init);
710 
711 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
712 						   pdata->buck4_init);
713 
714 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
715 			buck_init);
716 
717 	for (i = 0; i < 8; i++) {
718 		if (s5m8767->buck2_gpiodvs) {
719 			s5m8767->buck2_vol[i] =
720 				s5m8767_convert_voltage_to_sel(
721 						&buck_voltage_val2,
722 						pdata->buck2_voltage[i]);
723 		}
724 
725 		if (s5m8767->buck3_gpiodvs) {
726 			s5m8767->buck3_vol[i] =
727 				s5m8767_convert_voltage_to_sel(
728 						&buck_voltage_val2,
729 						pdata->buck3_voltage[i]);
730 		}
731 
732 		if (s5m8767->buck4_gpiodvs) {
733 			s5m8767->buck4_vol[i] =
734 				s5m8767_convert_voltage_to_sel(
735 						&buck_voltage_val2,
736 						pdata->buck4_voltage[i]);
737 		}
738 	}
739 
740 	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
741 						pdata->buck4_gpiodvs) {
742 		for (i = 0; i < 3; i++) {
743 			enum gpiod_flags flags;
744 
745 			if (s5m8767->buck_gpioindex & BIT(2 - i))
746 				flags = GPIOD_OUT_HIGH;
747 			else
748 				flags = GPIOD_OUT_LOW;
749 
750 			s5m8767->buck_gpios[i] = devm_gpiod_get_index(iodev->dev,
751 								      "s5m8767,pmic-buck-dvs", i,
752 								      flags);
753 			if (IS_ERR(s5m8767->buck_gpios[i])) {
754 				return dev_err_probe(iodev->dev, PTR_ERR(s5m8767->buck_gpios[i]),
755 						     "invalid gpio[%d]\n", i);
756 			}
757 
758 			gpiod_set_consumer_name(s5m8767->buck_gpios[i], gpiodvs_names[i]);
759 		}
760 	}
761 
762 	for (i = 0; i < 3; i++) {
763 		s5m8767->buck_ds[i] = devm_gpiod_get_index(iodev->dev,
764 							   "s5m8767,pmic-buck-ds", i,
765 							   GPIOD_OUT_LOW);
766 		if (IS_ERR(s5m8767->buck_ds[i])) {
767 			return dev_err_probe(iodev->dev, PTR_ERR(s5m8767->buck_ds[i]),
768 					     "can't get GPIO %d\n", i);
769 		}
770 		gpiod_set_consumer_name(s5m8767->buck_ds[i], gpiods_names[i]);
771 	}
772 
773 	regmap_update_bits(s5m8767->iodev->regmap_pmic,
774 			   S5M8767_REG_BUCK2CTRL, 1 << 1,
775 			   (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
776 	regmap_update_bits(s5m8767->iodev->regmap_pmic,
777 			   S5M8767_REG_BUCK3CTRL, 1 << 1,
778 			   (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
779 	regmap_update_bits(s5m8767->iodev->regmap_pmic,
780 			   S5M8767_REG_BUCK4CTRL, 1 << 1,
781 			   (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
782 
783 	/* Initialize GPIO DVS registers */
784 	for (i = 0; i < 8; i++) {
785 		if (s5m8767->buck2_gpiodvs) {
786 			regmap_write(s5m8767->iodev->regmap_pmic,
787 					S5M8767_REG_BUCK2DVS1 + i,
788 					s5m8767->buck2_vol[i]);
789 		}
790 
791 		if (s5m8767->buck3_gpiodvs) {
792 			regmap_write(s5m8767->iodev->regmap_pmic,
793 					S5M8767_REG_BUCK3DVS1 + i,
794 					s5m8767->buck3_vol[i]);
795 		}
796 
797 		if (s5m8767->buck4_gpiodvs) {
798 			regmap_write(s5m8767->iodev->regmap_pmic,
799 					S5M8767_REG_BUCK4DVS1 + i,
800 					s5m8767->buck4_vol[i]);
801 		}
802 	}
803 
804 	if (s5m8767->buck2_ramp)
805 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
806 				S5M8767_REG_DVSRAMP, 0x08, 0x08);
807 
808 	if (s5m8767->buck3_ramp)
809 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
810 				S5M8767_REG_DVSRAMP, 0x04, 0x04);
811 
812 	if (s5m8767->buck4_ramp)
813 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
814 				S5M8767_REG_DVSRAMP, 0x02, 0x02);
815 
816 	if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
817 		|| s5m8767->buck4_ramp) {
818 		unsigned int val;
819 		switch (s5m8767->ramp_delay) {
820 		case 5:
821 			val = S5M8767_DVS_BUCK_RAMP_5;
822 			break;
823 		case 10:
824 			val = S5M8767_DVS_BUCK_RAMP_10;
825 			break;
826 		case 25:
827 			val = S5M8767_DVS_BUCK_RAMP_25;
828 			break;
829 		case 50:
830 			val = S5M8767_DVS_BUCK_RAMP_50;
831 			break;
832 		case 100:
833 			val = S5M8767_DVS_BUCK_RAMP_100;
834 			break;
835 		default:
836 			val = S5M8767_DVS_BUCK_RAMP_10;
837 		}
838 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
839 					S5M8767_REG_DVSRAMP,
840 					S5M8767_DVS_BUCK_RAMP_MASK,
841 					val << S5M8767_DVS_BUCK_RAMP_SHIFT);
842 	}
843 
844 	for (i = 0; i < pdata->num_regulators; i++) {
845 		const struct sec_voltage_desc *desc;
846 		unsigned int id = pdata->regulators[i].id;
847 		int enable_reg, enable_val;
848 		struct regulator_dev *rdev;
849 
850 		BUILD_BUG_ON(ARRAY_SIZE(regulators) != ARRAY_SIZE(reg_voltage_map));
851 		if (WARN_ON_ONCE(id >= ARRAY_SIZE(regulators)))
852 			continue;
853 
854 		desc = reg_voltage_map[id];
855 		if (desc) {
856 			regulators[id].n_voltages =
857 				(desc->max - desc->min) / desc->step + 1;
858 			regulators[id].min_uV = desc->min;
859 			regulators[id].uV_step = desc->step;
860 			regulators[id].vsel_reg =
861 				s5m8767_get_vsel_reg(id, s5m8767);
862 			if (id < S5M8767_BUCK1)
863 				regulators[id].vsel_mask = 0x3f;
864 			else
865 				regulators[id].vsel_mask = 0xff;
866 
867 			ret = s5m8767_get_register(s5m8767, id, &enable_reg,
868 					     &enable_val);
869 			if (ret) {
870 				dev_err(s5m8767->dev, "error reading registers\n");
871 				return ret;
872 			}
873 			regulators[id].enable_reg = enable_reg;
874 			regulators[id].enable_mask = S5M8767_ENCTRL_MASK;
875 			regulators[id].enable_val = enable_val;
876 		}
877 
878 		config.dev = s5m8767->dev;
879 		config.init_data = pdata->regulators[i].initdata;
880 		config.driver_data = s5m8767;
881 		config.regmap = iodev->regmap_pmic;
882 		config.of_node = pdata->regulators[i].reg_node;
883 		config.ena_gpiod = NULL;
884 		if (pdata->regulators[i].ext_control_gpiod) {
885 			/* Assigns config.ena_gpiod */
886 			s5m8767_regulator_config_ext_control(s5m8767,
887 					&pdata->regulators[i], &config);
888 
889 			/*
890 			 * Hand the GPIO descriptor management over to the
891 			 * regulator core, remove it from devres management.
892 			 */
893 			devm_gpiod_unhinge(s5m8767->dev, config.ena_gpiod);
894 		}
895 		rdev = devm_regulator_register(&pdev->dev, &regulators[id],
896 						  &config);
897 		if (IS_ERR(rdev)) {
898 			ret = PTR_ERR(rdev);
899 			dev_err(s5m8767->dev, "regulator init failed for %d\n",
900 					id);
901 			return ret;
902 		}
903 
904 		if (pdata->regulators[i].ext_control_gpiod) {
905 			ret = s5m8767_enable_ext_control(s5m8767, rdev);
906 			if (ret < 0) {
907 				dev_err(s5m8767->dev,
908 						"failed to enable gpio control over %s: %d\n",
909 						rdev->desc->name, ret);
910 				return ret;
911 			}
912 		}
913 	}
914 
915 	return 0;
916 }
917 
918 static const struct platform_device_id s5m8767_pmic_id[] = {
919 	{ "s5m8767-pmic", 0},
920 	{ },
921 };
922 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
923 
924 static struct platform_driver s5m8767_pmic_driver = {
925 	.driver = {
926 		.name = "s5m8767-pmic",
927 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
928 	},
929 	.probe = s5m8767_pmic_probe,
930 	.id_table = s5m8767_pmic_id,
931 };
932 module_platform_driver(s5m8767_pmic_driver);
933 
934 /* Module information */
935 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
936 MODULE_DESCRIPTION("Samsung S5M8767 Regulator Driver");
937 MODULE_LICENSE("GPL");
938