1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog Devices ADP5585 PWM driver 4 * 5 * Copyright 2022 NXP 6 * Copyright 2024 Ideas on Board Oy 7 * 8 * Limitations: 9 * - The .apply() operation executes atomically, but may not wait for the 10 * period to complete (this is not documented and would need to be tested). 11 * - Disabling the PWM drives the output pin to a low level immediately. 12 * - The hardware can only generate normal polarity output. 13 */ 14 15 #include <asm/byteorder.h> 16 17 #include <linux/device.h> 18 #include <linux/err.h> 19 #include <linux/math64.h> 20 #include <linux/mfd/adp5585.h> 21 #include <linux/minmax.h> 22 #include <linux/module.h> 23 #include <linux/mod_devicetable.h> 24 #include <linux/platform_device.h> 25 #include <linux/pwm.h> 26 #include <linux/regmap.h> 27 #include <linux/time.h> 28 #include <linux/types.h> 29 30 #define ADP5585_PWM_CHAN_NUM 1 31 32 #define ADP5585_PWM_OSC_FREQ_HZ 1000000U 33 #define ADP5585_PWM_MIN_PERIOD_NS (2ULL * NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ) 34 #define ADP5585_PWM_MAX_PERIOD_NS (2ULL * 0xffff * NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ) 35 36 static int pwm_adp5585_request(struct pwm_chip *chip, struct pwm_device *pwm) 37 { 38 struct regmap *regmap = pwmchip_get_drvdata(chip); 39 40 /* Configure the R3 pin as PWM output. */ 41 return regmap_update_bits(regmap, ADP5585_PIN_CONFIG_C, 42 ADP5585_R3_EXTEND_CFG_MASK, 43 ADP5585_R3_EXTEND_CFG_PWM_OUT); 44 } 45 46 static void pwm_adp5585_free(struct pwm_chip *chip, struct pwm_device *pwm) 47 { 48 struct regmap *regmap = pwmchip_get_drvdata(chip); 49 50 regmap_update_bits(regmap, ADP5585_PIN_CONFIG_C, 51 ADP5585_R3_EXTEND_CFG_MASK, 52 ADP5585_R3_EXTEND_CFG_GPIO4); 53 } 54 55 static int pwm_adp5585_apply(struct pwm_chip *chip, 56 struct pwm_device *pwm, 57 const struct pwm_state *state) 58 { 59 struct regmap *regmap = pwmchip_get_drvdata(chip); 60 u64 period, duty_cycle; 61 u32 on, off; 62 __le16 val; 63 int ret; 64 65 if (!state->enabled) { 66 regmap_clear_bits(regmap, ADP5585_GENERAL_CFG, ADP5585_OSC_EN); 67 regmap_clear_bits(regmap, ADP5585_PWM_CFG, ADP5585_PWM_EN); 68 return 0; 69 } 70 71 if (state->polarity != PWM_POLARITY_NORMAL) 72 return -EINVAL; 73 74 if (state->period < ADP5585_PWM_MIN_PERIOD_NS) 75 return -EINVAL; 76 77 period = min(state->period, ADP5585_PWM_MAX_PERIOD_NS); 78 duty_cycle = min(state->duty_cycle, period); 79 80 /* 81 * Compute the on and off time. As the internal oscillator frequency is 82 * 1MHz, the calculation can be simplified without loss of precision. 83 */ 84 on = div_u64(duty_cycle, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ); 85 off = div_u64(period, NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ) - on; 86 87 val = cpu_to_le16(off); 88 ret = regmap_bulk_write(regmap, ADP5585_PWM_OFFT_LOW, &val, 2); 89 if (ret) 90 return ret; 91 92 val = cpu_to_le16(on); 93 ret = regmap_bulk_write(regmap, ADP5585_PWM_ONT_LOW, &val, 2); 94 if (ret) 95 return ret; 96 97 /* Enable PWM in continuous mode and no external AND'ing. */ 98 ret = regmap_update_bits(regmap, ADP5585_PWM_CFG, 99 ADP5585_PWM_IN_AND | ADP5585_PWM_MODE | 100 ADP5585_PWM_EN, ADP5585_PWM_EN); 101 if (ret) 102 return ret; 103 104 ret = regmap_set_bits(regmap, ADP5585_GENERAL_CFG, ADP5585_OSC_EN); 105 if (ret) 106 return ret; 107 108 return regmap_set_bits(regmap, ADP5585_PWM_CFG, ADP5585_PWM_EN); 109 } 110 111 static int pwm_adp5585_get_state(struct pwm_chip *chip, 112 struct pwm_device *pwm, 113 struct pwm_state *state) 114 { 115 struct regmap *regmap = pwmchip_get_drvdata(chip); 116 unsigned int on, off; 117 unsigned int val; 118 __le16 on_off; 119 int ret; 120 121 ret = regmap_bulk_read(regmap, ADP5585_PWM_OFFT_LOW, &on_off, 2); 122 if (ret) 123 return ret; 124 off = le16_to_cpu(on_off); 125 126 ret = regmap_bulk_read(regmap, ADP5585_PWM_ONT_LOW, &on_off, 2); 127 if (ret) 128 return ret; 129 on = le16_to_cpu(on_off); 130 131 state->duty_cycle = on * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ); 132 state->period = (on + off) * (NSEC_PER_SEC / ADP5585_PWM_OSC_FREQ_HZ); 133 134 state->polarity = PWM_POLARITY_NORMAL; 135 136 regmap_read(regmap, ADP5585_PWM_CFG, &val); 137 state->enabled = !!(val & ADP5585_PWM_EN); 138 139 return 0; 140 } 141 142 static const struct pwm_ops adp5585_pwm_ops = { 143 .request = pwm_adp5585_request, 144 .free = pwm_adp5585_free, 145 .apply = pwm_adp5585_apply, 146 .get_state = pwm_adp5585_get_state, 147 }; 148 149 static int adp5585_pwm_probe(struct platform_device *pdev) 150 { 151 struct device *dev = &pdev->dev; 152 struct adp5585_dev *adp5585 = dev_get_drvdata(dev->parent); 153 struct pwm_chip *chip; 154 int ret; 155 156 chip = devm_pwmchip_alloc(dev, ADP5585_PWM_CHAN_NUM, 0); 157 if (IS_ERR(chip)) 158 return PTR_ERR(chip); 159 160 device_set_of_node_from_dev(dev, dev->parent); 161 162 pwmchip_set_drvdata(chip, adp5585->regmap); 163 chip->ops = &adp5585_pwm_ops; 164 165 ret = devm_pwmchip_add(dev, chip); 166 if (ret) 167 return dev_err_probe(dev, ret, "failed to add PWM chip\n"); 168 169 return 0; 170 } 171 172 static const struct platform_device_id adp5585_pwm_id_table[] = { 173 { "adp5585-pwm" }, 174 { /* Sentinel */ } 175 }; 176 MODULE_DEVICE_TABLE(platform, adp5585_pwm_id_table); 177 178 static struct platform_driver adp5585_pwm_driver = { 179 .driver = { 180 .name = "adp5585-pwm", 181 }, 182 .probe = adp5585_pwm_probe, 183 .id_table = adp5585_pwm_id_table, 184 }; 185 module_platform_driver(adp5585_pwm_driver); 186 187 MODULE_AUTHOR("Xiaoning Wang <xiaoning.wang@nxp.com>"); 188 MODULE_DESCRIPTION("ADP5585 PWM Driver"); 189 MODULE_LICENSE("GPL"); 190