1# SPDX-License-Identifier: GPL-2.0-only 2# 3# PHY 4# 5 6menu "PHY Subsystem" 7 8config PHY_COMMON_PROPS 9 bool "PHY common properties" if KUNIT_ALL_TESTS 10 help 11 This parses properties common between generic PHYs and Ethernet PHYs. 12 13 Select this from consumer drivers to gain access to helpers for 14 parsing properties from the 15 Documentation/devicetree/bindings/phy/phy-common-props.yaml schema. 16 17config PHY_COMMON_PROPS_TEST 18 tristate "KUnit tests for PHY common props" if !KUNIT_ALL_TESTS 19 depends on KUNIT && PHY_COMMON_PROPS 20 default KUNIT_ALL_TESTS 21 help 22 This builds KUnit tests for the PHY common property API. 23 24 For more information on KUnit and unit tests in general, 25 please refer to the KUnit documentation in Documentation/dev-tools/kunit/. 26 27 When in doubt, say N. 28 29config GENERIC_PHY 30 bool "PHY Core" 31 help 32 Generic PHY support. 33 34 This framework is designed to provide a generic interface for PHY 35 devices present in the kernel. This layer will have the generic 36 API by which phy drivers can create PHY using the phy framework and 37 phy users can obtain reference to the PHY. All the users of this 38 framework should select this config. 39 40config GENERIC_PHY_MIPI_DPHY 41 bool 42 select GENERIC_PHY 43 help 44 Generic MIPI D-PHY support. 45 46 Provides a number of helpers a core functions for MIPI D-PHY 47 drivers to us. 48 49config PHY_GOOGLE_USB 50 tristate "Google Tensor SoC USB PHY driver" 51 select GENERIC_PHY 52 depends on TYPEC 53 help 54 Enable support for the USB PHY on Google Tensor SoCs, starting with 55 the G5 generation (Laguna). This driver provides the PHY interfaces 56 to interact with the SNPS eUSB2 and USB 3.2/DisplayPort Combo PHY, 57 both of which are integrated with the DWC3 USB DRD controller. 58 This driver currently supports USB high-speed. 59 60config PHY_LPC18XX_USB_OTG 61 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" 62 depends on OF && (ARCH_LPC18XX || COMPILE_TEST) 63 depends on MFD_SYSCON 64 select GENERIC_PHY 65 help 66 Enable this to support NXP LPC18xx/43xx internal USB OTG PHY. 67 68 This driver is need for USB0 support on LPC18xx/43xx and takes 69 care of enabling and clock setup. 70 71config PHY_PISTACHIO_USB 72 tristate "IMG Pistachio USB2.0 PHY driver" 73 depends on MIPS || COMPILE_TEST 74 select GENERIC_PHY 75 help 76 Enable this to support the USB2.0 PHY on the IMG Pistachio SoC. 77 78config PHY_SNPS_EUSB2 79 tristate "SNPS eUSB2 PHY Driver" 80 depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST) 81 select GENERIC_PHY 82 help 83 Enable support for the USB high-speed SNPS eUSB2 phy on select 84 SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller. 85 86config PHY_XGENE 87 tristate "APM X-Gene 15Gbps PHY support" 88 depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST) 89 select GENERIC_PHY 90 help 91 This option enables support for APM X-Gene SoC multi-purpose PHY. 92 93config USB_LGM_PHY 94 tristate "INTEL Lightning Mountain USB PHY Driver" 95 depends on USB_SUPPORT 96 depends on X86 || COMPILE_TEST 97 select USB_PHY 98 select REGULATOR 99 select REGULATOR_FIXED_VOLTAGE 100 help 101 Enable this to support Intel DWC3 PHY USB phy. This driver provides 102 interface to interact with USB GEN-II and USB 3.x PHY that is part 103 of the Intel network SOC. 104 105config PHY_CAN_TRANSCEIVER 106 tristate "CAN transceiver PHY" 107 select GENERIC_PHY 108 select MULTIPLEXER 109 help 110 This option enables support for CAN transceivers as a PHY. This 111 driver provides function for putting the transceivers in various 112 functional modes using gpios and sets the attribute max link 113 rate, for CAN drivers. 114 115config PHY_AIROHA_PCIE 116 tristate "Airoha PCIe-PHY Driver" 117 depends on ARCH_AIROHA || COMPILE_TEST 118 depends on OF 119 select GENERIC_PHY 120 help 121 Say Y here to add support for Airoha PCIe PHY driver. 122 This driver create the basic PHY instance and provides initialize 123 callback for PCIe GEN3 port. 124 125config PHY_NXP_PTN3222 126 tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" 127 depends on I2C 128 depends on OF 129 select GENERIC_PHY 130 help 131 Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. 132 This redriver performs translation between eUSB2 and USB2 signalling 133 schemes. It supports all three USB 2.0 data rates: Low Speed, Full 134 Speed and High Speed. 135 136config PHY_SPACEMIT_K1_PCIE 137 tristate "PCIe and combo PHY driver for the SpacemiT K1 SoC" 138 depends on ARCH_SPACEMIT || COMPILE_TEST 139 depends on COMMON_CLK 140 depends on HAS_IOMEM 141 depends on OF 142 select GENERIC_PHY 143 default ARCH_SPACEMIT 144 help 145 Enable support for the PCIe and USB 3 combo PHY and two 146 PCIe-only PHYs used in the SpacemiT K1 SoC. 147 148source "drivers/phy/allwinner/Kconfig" 149source "drivers/phy/amlogic/Kconfig" 150source "drivers/phy/apple/Kconfig" 151source "drivers/phy/broadcom/Kconfig" 152source "drivers/phy/cadence/Kconfig" 153source "drivers/phy/freescale/Kconfig" 154source "drivers/phy/hisilicon/Kconfig" 155source "drivers/phy/ingenic/Kconfig" 156source "drivers/phy/lantiq/Kconfig" 157source "drivers/phy/marvell/Kconfig" 158source "drivers/phy/mediatek/Kconfig" 159source "drivers/phy/microchip/Kconfig" 160source "drivers/phy/motorola/Kconfig" 161source "drivers/phy/mscc/Kconfig" 162source "drivers/phy/nuvoton/Kconfig" 163source "drivers/phy/qualcomm/Kconfig" 164source "drivers/phy/ralink/Kconfig" 165source "drivers/phy/realtek/Kconfig" 166source "drivers/phy/renesas/Kconfig" 167source "drivers/phy/rockchip/Kconfig" 168source "drivers/phy/samsung/Kconfig" 169source "drivers/phy/socionext/Kconfig" 170source "drivers/phy/sophgo/Kconfig" 171source "drivers/phy/spacemit/Kconfig" 172source "drivers/phy/st/Kconfig" 173source "drivers/phy/starfive/Kconfig" 174source "drivers/phy/sunplus/Kconfig" 175source "drivers/phy/tegra/Kconfig" 176source "drivers/phy/ti/Kconfig" 177source "drivers/phy/intel/Kconfig" 178source "drivers/phy/xilinx/Kconfig" 179 180endmenu 181