1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/async.h>
8 #include <linux/blkdev.h>
9 #include <linux/blk-mq.h>
10 #include <linux/blk-integrity.h>
11 #include <linux/compat.h>
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/hdreg.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/backing-dev.h>
18 #include <linux/slab.h>
19 #include <linux/types.h>
20 #include <linux/pr.h>
21 #include <linux/ptrace.h>
22 #include <linux/nvme_ioctl.h>
23 #include <linux/pm_qos.h>
24 #include <linux/ratelimit.h>
25 #include <linux/unaligned.h>
26 
27 #include "nvme.h"
28 #include "fabrics.h"
29 #include <linux/nvme-auth.h>
30 
31 #define CREATE_TRACE_POINTS
32 #include "trace.h"
33 
34 #define NVME_MINORS		(1U << MINORBITS)
35 
36 struct nvme_ns_info {
37 	struct nvme_ns_ids ids;
38 	u32 nsid;
39 	__le32 anagrpid;
40 	u8 pi_offset;
41 	u16 endgid;
42 	u64 runs;
43 	bool is_shared;
44 	bool is_readonly;
45 	bool is_ready;
46 	bool is_removed;
47 	bool is_rotational;
48 	bool no_vwc;
49 };
50 
51 unsigned int admin_timeout = 60;
52 module_param(admin_timeout, uint, 0644);
53 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
54 EXPORT_SYMBOL_GPL(admin_timeout);
55 
56 unsigned int nvme_io_timeout = 30;
57 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
59 EXPORT_SYMBOL_GPL(nvme_io_timeout);
60 
61 static unsigned char shutdown_timeout = 5;
62 module_param(shutdown_timeout, byte, 0644);
63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
64 
65 static u8 nvme_max_retries = 5;
66 module_param_named(max_retries, nvme_max_retries, byte, 0644);
67 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
68 
69 static unsigned long default_ps_max_latency_us = 100000;
70 module_param(default_ps_max_latency_us, ulong, 0644);
71 MODULE_PARM_DESC(default_ps_max_latency_us,
72 		 "max power saving latency for new devices; use PM QOS to change per device");
73 
74 static bool force_apst;
75 module_param(force_apst, bool, 0644);
76 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
77 
78 static unsigned long apst_primary_timeout_ms = 100;
79 module_param(apst_primary_timeout_ms, ulong, 0644);
80 MODULE_PARM_DESC(apst_primary_timeout_ms,
81 	"primary APST timeout in ms");
82 
83 static unsigned long apst_secondary_timeout_ms = 2000;
84 module_param(apst_secondary_timeout_ms, ulong, 0644);
85 MODULE_PARM_DESC(apst_secondary_timeout_ms,
86 	"secondary APST timeout in ms");
87 
88 static unsigned long apst_primary_latency_tol_us = 15000;
89 module_param(apst_primary_latency_tol_us, ulong, 0644);
90 MODULE_PARM_DESC(apst_primary_latency_tol_us,
91 	"primary APST latency tolerance in us");
92 
93 static unsigned long apst_secondary_latency_tol_us = 100000;
94 module_param(apst_secondary_latency_tol_us, ulong, 0644);
95 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
96 	"secondary APST latency tolerance in us");
97 
98 /*
99  * Older kernels didn't enable protection information if it was at an offset.
100  * Newer kernels do, so it breaks reads on the upgrade if such formats were
101  * used in prior kernels since the metadata written did not contain a valid
102  * checksum.
103  */
104 static bool disable_pi_offsets = false;
105 module_param(disable_pi_offsets, bool, 0444);
106 MODULE_PARM_DESC(disable_pi_offsets,
107 	"disable protection information if it has an offset");
108 
109 /*
110  * nvme_wq - hosts nvme related works that are not reset or delete
111  * nvme_reset_wq - hosts nvme reset works
112  * nvme_delete_wq - hosts nvme delete works
113  *
114  * nvme_wq will host works such as scan, aen handling, fw activation,
115  * keep-alive, periodic reconnects etc. nvme_reset_wq
116  * runs reset works which also flush works hosted on nvme_wq for
117  * serialization purposes. nvme_delete_wq host controller deletion
118  * works which flush reset works for serialization.
119  */
120 struct workqueue_struct *nvme_wq;
121 EXPORT_SYMBOL_GPL(nvme_wq);
122 
123 struct workqueue_struct *nvme_reset_wq;
124 EXPORT_SYMBOL_GPL(nvme_reset_wq);
125 
126 struct workqueue_struct *nvme_delete_wq;
127 EXPORT_SYMBOL_GPL(nvme_delete_wq);
128 
129 static LIST_HEAD(nvme_subsystems);
130 DEFINE_MUTEX(nvme_subsystems_lock);
131 
132 static DEFINE_IDA(nvme_instance_ida);
133 static dev_t nvme_ctrl_base_chr_devt;
134 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
135 static const struct class nvme_class = {
136 	.name = "nvme",
137 	.dev_uevent = nvme_class_uevent,
138 };
139 
140 static const struct class nvme_subsys_class = {
141 	.name = "nvme-subsystem",
142 };
143 
144 static DEFINE_IDA(nvme_ns_chr_minor_ida);
145 static dev_t nvme_ns_chr_devt;
146 static const struct class nvme_ns_chr_class = {
147 	.name = "nvme-generic",
148 };
149 
150 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
151 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
152 					   unsigned nsid);
153 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
154 				   struct nvme_command *cmd);
155 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page,
156 		u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi);
157 
158 void nvme_queue_scan(struct nvme_ctrl *ctrl)
159 {
160 	/*
161 	 * Only new queue scan work when admin and IO queues are both alive
162 	 */
163 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
164 		queue_work(nvme_wq, &ctrl->scan_work);
165 }
166 
167 /*
168  * Use this function to proceed with scheduling reset_work for a controller
169  * that had previously been set to the resetting state. This is intended for
170  * code paths that can't be interrupted by other reset attempts. A hot removal
171  * may prevent this from succeeding.
172  */
173 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
174 {
175 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
176 		return -EBUSY;
177 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
178 		return -EBUSY;
179 	return 0;
180 }
181 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
182 
183 static void nvme_failfast_work(struct work_struct *work)
184 {
185 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
186 			struct nvme_ctrl, failfast_work);
187 
188 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
189 		return;
190 
191 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
192 	dev_info(ctrl->device, "failfast expired\n");
193 	nvme_kick_requeue_lists(ctrl);
194 }
195 
196 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
197 {
198 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
199 		return;
200 
201 	schedule_delayed_work(&ctrl->failfast_work,
202 			      ctrl->opts->fast_io_fail_tmo * HZ);
203 }
204 
205 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
206 {
207 	if (!ctrl->opts)
208 		return;
209 
210 	cancel_delayed_work_sync(&ctrl->failfast_work);
211 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
212 }
213 
214 
215 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
216 {
217 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
218 		return -EBUSY;
219 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
220 		return -EBUSY;
221 	return 0;
222 }
223 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
224 
225 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
226 {
227 	int ret;
228 
229 	ret = nvme_reset_ctrl(ctrl);
230 	if (!ret) {
231 		flush_work(&ctrl->reset_work);
232 		if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
233 			ret = -ENETRESET;
234 	}
235 
236 	return ret;
237 }
238 
239 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
240 {
241 	dev_info(ctrl->device,
242 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
243 
244 	flush_work(&ctrl->reset_work);
245 	nvme_stop_ctrl(ctrl);
246 	nvme_remove_namespaces(ctrl);
247 	ctrl->ops->delete_ctrl(ctrl);
248 	nvme_uninit_ctrl(ctrl);
249 }
250 
251 static void nvme_delete_ctrl_work(struct work_struct *work)
252 {
253 	struct nvme_ctrl *ctrl =
254 		container_of(work, struct nvme_ctrl, delete_work);
255 
256 	nvme_do_delete_ctrl(ctrl);
257 }
258 
259 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
260 {
261 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
262 		return -EBUSY;
263 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
264 		return -EBUSY;
265 	return 0;
266 }
267 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
268 
269 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
270 {
271 	/*
272 	 * Keep a reference until nvme_do_delete_ctrl() complete,
273 	 * since ->delete_ctrl can free the controller.
274 	 */
275 	nvme_get_ctrl(ctrl);
276 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
277 		nvme_do_delete_ctrl(ctrl);
278 	nvme_put_ctrl(ctrl);
279 }
280 
281 static blk_status_t nvme_error_status(u16 status)
282 {
283 	switch (status & NVME_SCT_SC_MASK) {
284 	case NVME_SC_SUCCESS:
285 		return BLK_STS_OK;
286 	case NVME_SC_CAP_EXCEEDED:
287 		return BLK_STS_NOSPC;
288 	case NVME_SC_LBA_RANGE:
289 	case NVME_SC_CMD_INTERRUPTED:
290 	case NVME_SC_NS_NOT_READY:
291 		return BLK_STS_TARGET;
292 	case NVME_SC_BAD_ATTRIBUTES:
293 	case NVME_SC_INVALID_OPCODE:
294 	case NVME_SC_INVALID_FIELD:
295 	case NVME_SC_INVALID_NS:
296 		return BLK_STS_NOTSUPP;
297 	case NVME_SC_WRITE_FAULT:
298 	case NVME_SC_READ_ERROR:
299 	case NVME_SC_UNWRITTEN_BLOCK:
300 	case NVME_SC_ACCESS_DENIED:
301 	case NVME_SC_READ_ONLY:
302 	case NVME_SC_COMPARE_FAILED:
303 		return BLK_STS_MEDIUM;
304 	case NVME_SC_GUARD_CHECK:
305 	case NVME_SC_APPTAG_CHECK:
306 	case NVME_SC_REFTAG_CHECK:
307 	case NVME_SC_INVALID_PI:
308 		return BLK_STS_PROTECTION;
309 	case NVME_SC_RESERVATION_CONFLICT:
310 		return BLK_STS_RESV_CONFLICT;
311 	case NVME_SC_HOST_PATH_ERROR:
312 		return BLK_STS_TRANSPORT;
313 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
314 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
315 	case NVME_SC_ZONE_TOO_MANY_OPEN:
316 		return BLK_STS_ZONE_OPEN_RESOURCE;
317 	default:
318 		return BLK_STS_IOERR;
319 	}
320 }
321 
322 static void nvme_retry_req(struct request *req)
323 {
324 	unsigned long delay = 0;
325 	u16 crd;
326 
327 	/* The mask and shift result must be <= 3 */
328 	crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11;
329 	if (crd)
330 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
331 
332 	nvme_req(req)->retries++;
333 	blk_mq_requeue_request(req, false);
334 	blk_mq_delay_kick_requeue_list(req->q, delay);
335 }
336 
337 static void nvme_log_error(struct request *req)
338 {
339 	struct nvme_ns *ns = req->q->queuedata;
340 	struct nvme_request *nr = nvme_req(req);
341 
342 	if (ns) {
343 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
344 		       ns->disk ? ns->disk->disk_name : "?",
345 		       nvme_get_opcode_str(nr->cmd->common.opcode),
346 		       nr->cmd->common.opcode,
347 		       nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
348 		       blk_rq_bytes(req) >> ns->head->lba_shift,
349 		       nvme_get_error_status_str(nr->status),
350 		       NVME_SCT(nr->status),		/* Status Code Type */
351 		       nr->status & NVME_SC_MASK,	/* Status Code */
352 		       nr->status & NVME_STATUS_MORE ? "MORE " : "",
353 		       nr->status & NVME_STATUS_DNR  ? "DNR "  : "");
354 		return;
355 	}
356 
357 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
358 			   dev_name(nr->ctrl->device),
359 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
360 			   nr->cmd->common.opcode,
361 			   nvme_get_error_status_str(nr->status),
362 			   NVME_SCT(nr->status),	/* Status Code Type */
363 			   nr->status & NVME_SC_MASK,	/* Status Code */
364 			   nr->status & NVME_STATUS_MORE ? "MORE " : "",
365 			   nr->status & NVME_STATUS_DNR  ? "DNR "  : "");
366 }
367 
368 static void nvme_log_err_passthru(struct request *req)
369 {
370 	struct nvme_ns *ns = req->q->queuedata;
371 	struct nvme_request *nr = nvme_req(req);
372 
373 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
374 		"cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
375 		ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
376 		ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
377 		     nvme_get_admin_opcode_str(nr->cmd->common.opcode),
378 		nr->cmd->common.opcode,
379 		nvme_get_error_status_str(nr->status),
380 		NVME_SCT(nr->status),		/* Status Code Type */
381 		nr->status & NVME_SC_MASK,	/* Status Code */
382 		nr->status & NVME_STATUS_MORE ? "MORE " : "",
383 		nr->status & NVME_STATUS_DNR  ? "DNR "  : "",
384 		nr->cmd->common.cdw10,
385 		nr->cmd->common.cdw11,
386 		nr->cmd->common.cdw12,
387 		nr->cmd->common.cdw13,
388 		nr->cmd->common.cdw14,
389 		nr->cmd->common.cdw14);
390 }
391 
392 enum nvme_disposition {
393 	COMPLETE,
394 	RETRY,
395 	FAILOVER,
396 	AUTHENTICATE,
397 };
398 
399 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
400 {
401 	if (likely(nvme_req(req)->status == 0))
402 		return COMPLETE;
403 
404 	if (blk_noretry_request(req) ||
405 	    (nvme_req(req)->status & NVME_STATUS_DNR) ||
406 	    nvme_req(req)->retries >= nvme_max_retries)
407 		return COMPLETE;
408 
409 	if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED)
410 		return AUTHENTICATE;
411 
412 	if (req->cmd_flags & REQ_NVME_MPATH) {
413 		if (nvme_is_path_error(nvme_req(req)->status) ||
414 		    blk_queue_dying(req->q))
415 			return FAILOVER;
416 	} else {
417 		if (blk_queue_dying(req->q))
418 			return COMPLETE;
419 	}
420 
421 	return RETRY;
422 }
423 
424 static inline void nvme_end_req_zoned(struct request *req)
425 {
426 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
427 	    req_op(req) == REQ_OP_ZONE_APPEND) {
428 		struct nvme_ns *ns = req->q->queuedata;
429 
430 		req->__sector = nvme_lba_to_sect(ns->head,
431 			le64_to_cpu(nvme_req(req)->result.u64));
432 	}
433 }
434 
435 static inline void __nvme_end_req(struct request *req)
436 {
437 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
438 		if (blk_rq_is_passthrough(req))
439 			nvme_log_err_passthru(req);
440 		else
441 			nvme_log_error(req);
442 	}
443 	nvme_end_req_zoned(req);
444 	nvme_trace_bio_complete(req);
445 	if (req->cmd_flags & REQ_NVME_MPATH)
446 		nvme_mpath_end_request(req);
447 }
448 
449 void nvme_end_req(struct request *req)
450 {
451 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
452 
453 	__nvme_end_req(req);
454 	blk_mq_end_request(req, status);
455 }
456 
457 void nvme_complete_rq(struct request *req)
458 {
459 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
460 
461 	trace_nvme_complete_rq(req);
462 	nvme_cleanup_cmd(req);
463 
464 	/*
465 	 * Completions of long-running commands should not be able to
466 	 * defer sending of periodic keep alives, since the controller
467 	 * may have completed processing such commands a long time ago
468 	 * (arbitrarily close to command submission time).
469 	 * req->deadline - req->timeout is the command submission time
470 	 * in jiffies.
471 	 */
472 	if (ctrl->kas &&
473 	    req->deadline - req->timeout >= ctrl->ka_last_check_time)
474 		ctrl->comp_seen = true;
475 
476 	switch (nvme_decide_disposition(req)) {
477 	case COMPLETE:
478 		nvme_end_req(req);
479 		return;
480 	case RETRY:
481 		nvme_retry_req(req);
482 		return;
483 	case FAILOVER:
484 		nvme_failover_req(req);
485 		return;
486 	case AUTHENTICATE:
487 #ifdef CONFIG_NVME_HOST_AUTH
488 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
489 		nvme_retry_req(req);
490 #else
491 		nvme_end_req(req);
492 #endif
493 		return;
494 	}
495 }
496 EXPORT_SYMBOL_GPL(nvme_complete_rq);
497 
498 void nvme_complete_batch_req(struct request *req)
499 {
500 	trace_nvme_complete_rq(req);
501 	nvme_cleanup_cmd(req);
502 	__nvme_end_req(req);
503 }
504 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
505 
506 /*
507  * Called to unwind from ->queue_rq on a failed command submission so that the
508  * multipathing code gets called to potentially failover to another path.
509  * The caller needs to unwind all transport specific resource allocations and
510  * must return propagate the return value.
511  */
512 blk_status_t nvme_host_path_error(struct request *req)
513 {
514 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
515 	blk_mq_set_request_complete(req);
516 	nvme_complete_rq(req);
517 	return BLK_STS_OK;
518 }
519 EXPORT_SYMBOL_GPL(nvme_host_path_error);
520 
521 bool nvme_cancel_request(struct request *req, void *data)
522 {
523 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
524 				"Cancelling I/O %d", req->tag);
525 
526 	/* don't abort one completed or idle request */
527 	if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
528 		return true;
529 
530 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
531 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
532 	blk_mq_complete_request(req);
533 	return true;
534 }
535 EXPORT_SYMBOL_GPL(nvme_cancel_request);
536 
537 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
538 {
539 	if (ctrl->tagset) {
540 		blk_mq_tagset_busy_iter(ctrl->tagset,
541 				nvme_cancel_request, ctrl);
542 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
543 	}
544 }
545 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
546 
547 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
548 {
549 	if (ctrl->admin_tagset) {
550 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
551 				nvme_cancel_request, ctrl);
552 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
553 	}
554 }
555 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
556 
557 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
558 		enum nvme_ctrl_state new_state)
559 {
560 	enum nvme_ctrl_state old_state;
561 	unsigned long flags;
562 	bool changed = false;
563 
564 	spin_lock_irqsave(&ctrl->lock, flags);
565 
566 	old_state = nvme_ctrl_state(ctrl);
567 	switch (new_state) {
568 	case NVME_CTRL_LIVE:
569 		switch (old_state) {
570 		case NVME_CTRL_CONNECTING:
571 			changed = true;
572 			fallthrough;
573 		default:
574 			break;
575 		}
576 		break;
577 	case NVME_CTRL_RESETTING:
578 		switch (old_state) {
579 		case NVME_CTRL_NEW:
580 		case NVME_CTRL_LIVE:
581 			changed = true;
582 			fallthrough;
583 		default:
584 			break;
585 		}
586 		break;
587 	case NVME_CTRL_CONNECTING:
588 		switch (old_state) {
589 		case NVME_CTRL_NEW:
590 		case NVME_CTRL_RESETTING:
591 			changed = true;
592 			fallthrough;
593 		default:
594 			break;
595 		}
596 		break;
597 	case NVME_CTRL_DELETING:
598 		switch (old_state) {
599 		case NVME_CTRL_LIVE:
600 		case NVME_CTRL_RESETTING:
601 		case NVME_CTRL_CONNECTING:
602 			changed = true;
603 			fallthrough;
604 		default:
605 			break;
606 		}
607 		break;
608 	case NVME_CTRL_DELETING_NOIO:
609 		switch (old_state) {
610 		case NVME_CTRL_DELETING:
611 		case NVME_CTRL_DEAD:
612 			changed = true;
613 			fallthrough;
614 		default:
615 			break;
616 		}
617 		break;
618 	case NVME_CTRL_DEAD:
619 		switch (old_state) {
620 		case NVME_CTRL_DELETING:
621 			changed = true;
622 			fallthrough;
623 		default:
624 			break;
625 		}
626 		break;
627 	default:
628 		break;
629 	}
630 
631 	if (changed) {
632 		WRITE_ONCE(ctrl->state, new_state);
633 		wake_up_all(&ctrl->state_wq);
634 	}
635 
636 	spin_unlock_irqrestore(&ctrl->lock, flags);
637 	if (!changed)
638 		return false;
639 
640 	if (new_state == NVME_CTRL_LIVE) {
641 		if (old_state == NVME_CTRL_CONNECTING)
642 			nvme_stop_failfast_work(ctrl);
643 		nvme_kick_requeue_lists(ctrl);
644 	} else if (new_state == NVME_CTRL_CONNECTING &&
645 		old_state == NVME_CTRL_RESETTING) {
646 		nvme_start_failfast_work(ctrl);
647 	}
648 	return changed;
649 }
650 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
651 
652 /*
653  * Waits for the controller state to be resetting, or returns false if it is
654  * not possible to ever transition to that state.
655  */
656 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
657 {
658 	wait_event(ctrl->state_wq,
659 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
660 		   nvme_state_terminal(ctrl));
661 	return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
662 }
663 EXPORT_SYMBOL_GPL(nvme_wait_reset);
664 
665 static void nvme_free_ns_head(struct kref *ref)
666 {
667 	struct nvme_ns_head *head =
668 		container_of(ref, struct nvme_ns_head, ref);
669 
670 	nvme_mpath_put_disk(head);
671 	ida_free(&head->subsys->ns_ida, head->instance);
672 	cleanup_srcu_struct(&head->srcu);
673 	nvme_put_subsystem(head->subsys);
674 	kfree(head->plids);
675 	kfree(head);
676 }
677 
678 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
679 {
680 	return kref_get_unless_zero(&head->ref);
681 }
682 
683 void nvme_put_ns_head(struct nvme_ns_head *head)
684 {
685 	kref_put(&head->ref, nvme_free_ns_head);
686 }
687 
688 static void nvme_free_ns(struct kref *kref)
689 {
690 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
691 
692 	put_disk(ns->disk);
693 	nvme_put_ns_head(ns->head);
694 	nvme_put_ctrl(ns->ctrl);
695 	kfree(ns);
696 }
697 
698 bool nvme_get_ns(struct nvme_ns *ns)
699 {
700 	return kref_get_unless_zero(&ns->kref);
701 }
702 
703 void nvme_put_ns(struct nvme_ns *ns)
704 {
705 	kref_put(&ns->kref, nvme_free_ns);
706 }
707 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU");
708 
709 static inline void nvme_clear_nvme_request(struct request *req)
710 {
711 	nvme_req(req)->status = 0;
712 	nvme_req(req)->retries = 0;
713 	nvme_req(req)->flags = 0;
714 	req->rq_flags |= RQF_DONTPREP;
715 }
716 
717 /* initialize a passthrough request */
718 void nvme_init_request(struct request *req, struct nvme_command *cmd)
719 {
720 	struct nvme_request *nr = nvme_req(req);
721 	bool logging_enabled;
722 
723 	if (req->q->queuedata) {
724 		struct nvme_ns *ns = req->q->disk->private_data;
725 
726 		logging_enabled = ns->head->passthru_err_log_enabled;
727 		req->timeout = NVME_IO_TIMEOUT;
728 	} else { /* no queuedata implies admin queue */
729 		logging_enabled = nr->ctrl->passthru_err_log_enabled;
730 		req->timeout = NVME_ADMIN_TIMEOUT;
731 	}
732 
733 	if (!logging_enabled)
734 		req->rq_flags |= RQF_QUIET;
735 
736 	/* passthru commands should let the driver set the SGL flags */
737 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
738 
739 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
740 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
741 		req->cmd_flags |= REQ_POLLED;
742 	nvme_clear_nvme_request(req);
743 	memcpy(nr->cmd, cmd, sizeof(*cmd));
744 }
745 EXPORT_SYMBOL_GPL(nvme_init_request);
746 
747 /*
748  * For something we're not in a state to send to the device the default action
749  * is to busy it and retry it after the controller state is recovered.  However,
750  * if the controller is deleting or if anything is marked for failfast or
751  * nvme multipath it is immediately failed.
752  *
753  * Note: commands used to initialize the controller will be marked for failfast.
754  * Note: nvme cli/ioctl commands are marked for failfast.
755  */
756 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
757 		struct request *rq)
758 {
759 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
760 
761 	if (state != NVME_CTRL_DELETING_NOIO &&
762 	    state != NVME_CTRL_DELETING &&
763 	    state != NVME_CTRL_DEAD &&
764 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
765 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
766 		return BLK_STS_RESOURCE;
767 	return nvme_host_path_error(rq);
768 }
769 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
770 
771 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
772 		bool queue_live, enum nvme_ctrl_state state)
773 {
774 	struct nvme_request *req = nvme_req(rq);
775 
776 	/*
777 	 * currently we have a problem sending passthru commands
778 	 * on the admin_q if the controller is not LIVE because we can't
779 	 * make sure that they are going out after the admin connect,
780 	 * controller enable and/or other commands in the initialization
781 	 * sequence. until the controller will be LIVE, fail with
782 	 * BLK_STS_RESOURCE so that they will be rescheduled.
783 	 */
784 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
785 		return false;
786 
787 	if (ctrl->ops->flags & NVME_F_FABRICS) {
788 		/*
789 		 * Only allow commands on a live queue, except for the connect
790 		 * command, which is require to set the queue live in the
791 		 * appropinquate states.
792 		 */
793 		switch (state) {
794 		case NVME_CTRL_CONNECTING:
795 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
796 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
797 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
798 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
799 				return true;
800 			break;
801 		default:
802 			break;
803 		case NVME_CTRL_DEAD:
804 			return false;
805 		}
806 	}
807 
808 	return queue_live;
809 }
810 EXPORT_SYMBOL_GPL(__nvme_check_ready);
811 
812 static inline void nvme_setup_flush(struct nvme_ns *ns,
813 		struct nvme_command *cmnd)
814 {
815 	memset(cmnd, 0, sizeof(*cmnd));
816 	cmnd->common.opcode = nvme_cmd_flush;
817 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
818 }
819 
820 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
821 		struct nvme_command *cmnd)
822 {
823 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
824 	struct nvme_dsm_range *range;
825 	struct bio *bio;
826 
827 	/*
828 	 * Some devices do not consider the DSM 'Number of Ranges' field when
829 	 * determining how much data to DMA. Always allocate memory for maximum
830 	 * number of segments to prevent device reading beyond end of buffer.
831 	 */
832 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
833 
834 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
835 	if (!range) {
836 		/*
837 		 * If we fail allocation our range, fallback to the controller
838 		 * discard page. If that's also busy, it's safe to return
839 		 * busy, as we know we can make progress once that's freed.
840 		 */
841 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
842 			return BLK_STS_RESOURCE;
843 
844 		range = page_address(ns->ctrl->discard_page);
845 	}
846 
847 	if (queue_max_discard_segments(req->q) == 1) {
848 		u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
849 		u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
850 
851 		range[0].cattr = cpu_to_le32(0);
852 		range[0].nlb = cpu_to_le32(nlb);
853 		range[0].slba = cpu_to_le64(slba);
854 		n = 1;
855 	} else {
856 		__rq_for_each_bio(bio, req) {
857 			u64 slba = nvme_sect_to_lba(ns->head,
858 						    bio->bi_iter.bi_sector);
859 			u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
860 
861 			if (n < segments) {
862 				range[n].cattr = cpu_to_le32(0);
863 				range[n].nlb = cpu_to_le32(nlb);
864 				range[n].slba = cpu_to_le64(slba);
865 			}
866 			n++;
867 		}
868 	}
869 
870 	if (WARN_ON_ONCE(n != segments)) {
871 		if (virt_to_page(range) == ns->ctrl->discard_page)
872 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
873 		else
874 			kfree(range);
875 		return BLK_STS_IOERR;
876 	}
877 
878 	memset(cmnd, 0, sizeof(*cmnd));
879 	cmnd->dsm.opcode = nvme_cmd_dsm;
880 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
881 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
882 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
883 
884 	bvec_set_virt(&req->special_vec, range, alloc_size);
885 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
886 
887 	return BLK_STS_OK;
888 }
889 
890 static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd)
891 {
892 	cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag);
893 	cmnd->rw.lbatm = cpu_to_le16(0xffff);
894 }
895 
896 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
897 			      struct request *req)
898 {
899 	u32 upper, lower;
900 	u64 ref48;
901 
902 	/* both rw and write zeroes share the same reftag format */
903 	switch (ns->head->guard_type) {
904 	case NVME_NVM_NS_16B_GUARD:
905 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
906 		break;
907 	case NVME_NVM_NS_64B_GUARD:
908 		ref48 = ext_pi_ref_tag(req);
909 		lower = lower_32_bits(ref48);
910 		upper = upper_32_bits(ref48);
911 
912 		cmnd->rw.reftag = cpu_to_le32(lower);
913 		cmnd->rw.cdw3 = cpu_to_le32(upper);
914 		break;
915 	default:
916 		break;
917 	}
918 }
919 
920 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
921 		struct request *req, struct nvme_command *cmnd)
922 {
923 	memset(cmnd, 0, sizeof(*cmnd));
924 
925 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
926 		return nvme_setup_discard(ns, req, cmnd);
927 
928 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
929 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
930 	cmnd->write_zeroes.slba =
931 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
932 	cmnd->write_zeroes.length =
933 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
934 
935 	if (!(req->cmd_flags & REQ_NOUNMAP) &&
936 	    (ns->head->features & NVME_NS_DEAC))
937 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
938 
939 	if (nvme_ns_has_pi(ns->head)) {
940 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
941 
942 		switch (ns->head->pi_type) {
943 		case NVME_NS_DPS_PI_TYPE1:
944 		case NVME_NS_DPS_PI_TYPE2:
945 			nvme_set_ref_tag(ns, cmnd, req);
946 			break;
947 		}
948 	}
949 
950 	return BLK_STS_OK;
951 }
952 
953 /*
954  * NVMe does not support a dedicated command to issue an atomic write. A write
955  * which does adhere to the device atomic limits will silently be executed
956  * non-atomically. The request issuer should ensure that the write is within
957  * the queue atomic writes limits, but just validate this in case it is not.
958  */
959 static bool nvme_valid_atomic_write(struct request *req)
960 {
961 	struct request_queue *q = req->q;
962 	u32 boundary_bytes = queue_atomic_write_boundary_bytes(q);
963 
964 	if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q))
965 		return false;
966 
967 	if (boundary_bytes) {
968 		u64 mask = boundary_bytes - 1, imask = ~mask;
969 		u64 start = blk_rq_pos(req) << SECTOR_SHIFT;
970 		u64 end = start + blk_rq_bytes(req) - 1;
971 
972 		/* If greater then must be crossing a boundary */
973 		if (blk_rq_bytes(req) > boundary_bytes)
974 			return false;
975 
976 		if ((start & imask) != (end & imask))
977 			return false;
978 	}
979 
980 	return true;
981 }
982 
983 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
984 		struct request *req, struct nvme_command *cmnd,
985 		enum nvme_opcode op)
986 {
987 	u16 control = 0;
988 	u32 dsmgmt = 0;
989 
990 	if (req->cmd_flags & REQ_FUA)
991 		control |= NVME_RW_FUA;
992 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
993 		control |= NVME_RW_LR;
994 
995 	if (req->cmd_flags & REQ_RAHEAD)
996 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
997 
998 	if (op == nvme_cmd_write && ns->head->nr_plids) {
999 		u16 write_stream = req->bio->bi_write_stream;
1000 
1001 		if (WARN_ON_ONCE(write_stream > ns->head->nr_plids))
1002 			return BLK_STS_INVAL;
1003 
1004 		if (write_stream) {
1005 			dsmgmt |= ns->head->plids[write_stream - 1] << 16;
1006 			control |= NVME_RW_DTYPE_DPLCMT;
1007 		}
1008 	}
1009 
1010 	if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req))
1011 		return BLK_STS_INVAL;
1012 
1013 	cmnd->rw.opcode = op;
1014 	cmnd->rw.flags = 0;
1015 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
1016 	cmnd->rw.cdw2 = 0;
1017 	cmnd->rw.cdw3 = 0;
1018 	cmnd->rw.metadata = 0;
1019 	cmnd->rw.slba =
1020 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
1021 	cmnd->rw.length =
1022 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
1023 	cmnd->rw.reftag = 0;
1024 	cmnd->rw.lbat = 0;
1025 	cmnd->rw.lbatm = 0;
1026 
1027 	if (ns->head->ms) {
1028 		/*
1029 		 * If formatted with metadata, the block layer always provides a
1030 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
1031 		 * we enable the PRACT bit for protection information or set the
1032 		 * namespace capacity to zero to prevent any I/O.
1033 		 */
1034 		if (!blk_integrity_rq(req)) {
1035 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
1036 				return BLK_STS_NOTSUPP;
1037 			control |= NVME_RW_PRINFO_PRACT;
1038 		}
1039 
1040 		if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD))
1041 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
1042 		if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) {
1043 			control |= NVME_RW_PRINFO_PRCHK_REF;
1044 			if (op == nvme_cmd_zone_append)
1045 				control |= NVME_RW_APPEND_PIREMAP;
1046 			nvme_set_ref_tag(ns, cmnd, req);
1047 		}
1048 		if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) {
1049 			control |= NVME_RW_PRINFO_PRCHK_APP;
1050 			nvme_set_app_tag(req, cmnd);
1051 		}
1052 	}
1053 
1054 	cmnd->rw.control = cpu_to_le16(control);
1055 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1056 	return 0;
1057 }
1058 
1059 void nvme_cleanup_cmd(struct request *req)
1060 {
1061 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1062 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1063 
1064 		if (req->special_vec.bv_page == ctrl->discard_page)
1065 			clear_bit_unlock(0, &ctrl->discard_page_busy);
1066 		else
1067 			kfree(bvec_virt(&req->special_vec));
1068 		req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
1069 	}
1070 }
1071 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1072 
1073 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1074 {
1075 	struct nvme_command *cmd = nvme_req(req)->cmd;
1076 	blk_status_t ret = BLK_STS_OK;
1077 
1078 	if (!(req->rq_flags & RQF_DONTPREP))
1079 		nvme_clear_nvme_request(req);
1080 
1081 	switch (req_op(req)) {
1082 	case REQ_OP_DRV_IN:
1083 	case REQ_OP_DRV_OUT:
1084 		/* these are setup prior to execution in nvme_init_request() */
1085 		break;
1086 	case REQ_OP_FLUSH:
1087 		nvme_setup_flush(ns, cmd);
1088 		break;
1089 	case REQ_OP_ZONE_RESET_ALL:
1090 	case REQ_OP_ZONE_RESET:
1091 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1092 		break;
1093 	case REQ_OP_ZONE_OPEN:
1094 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1095 		break;
1096 	case REQ_OP_ZONE_CLOSE:
1097 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1098 		break;
1099 	case REQ_OP_ZONE_FINISH:
1100 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1101 		break;
1102 	case REQ_OP_WRITE_ZEROES:
1103 		ret = nvme_setup_write_zeroes(ns, req, cmd);
1104 		break;
1105 	case REQ_OP_DISCARD:
1106 		ret = nvme_setup_discard(ns, req, cmd);
1107 		break;
1108 	case REQ_OP_READ:
1109 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1110 		break;
1111 	case REQ_OP_WRITE:
1112 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1113 		break;
1114 	case REQ_OP_ZONE_APPEND:
1115 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1116 		break;
1117 	default:
1118 		WARN_ON_ONCE(1);
1119 		return BLK_STS_IOERR;
1120 	}
1121 
1122 	cmd->common.command_id = nvme_cid(req);
1123 	trace_nvme_setup_cmd(req, cmd);
1124 	return ret;
1125 }
1126 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1127 
1128 /*
1129  * Return values:
1130  * 0:  success
1131  * >0: nvme controller's cqe status response
1132  * <0: kernel error in lieu of controller response
1133  */
1134 int nvme_execute_rq(struct request *rq, bool at_head)
1135 {
1136 	blk_status_t status;
1137 
1138 	status = blk_execute_rq(rq, at_head);
1139 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1140 		return -EINTR;
1141 	if (nvme_req(rq)->status)
1142 		return nvme_req(rq)->status;
1143 	return blk_status_to_errno(status);
1144 }
1145 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU");
1146 
1147 /*
1148  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1149  * if the result is positive, it's an NVM Express status code
1150  */
1151 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1152 		union nvme_result *result, void *buffer, unsigned bufflen,
1153 		int qid, nvme_submit_flags_t flags)
1154 {
1155 	struct request *req;
1156 	int ret;
1157 	blk_mq_req_flags_t blk_flags = 0;
1158 
1159 	if (flags & NVME_SUBMIT_NOWAIT)
1160 		blk_flags |= BLK_MQ_REQ_NOWAIT;
1161 	if (flags & NVME_SUBMIT_RESERVED)
1162 		blk_flags |= BLK_MQ_REQ_RESERVED;
1163 	if (qid == NVME_QID_ANY)
1164 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1165 	else
1166 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1167 						qid - 1);
1168 
1169 	if (IS_ERR(req))
1170 		return PTR_ERR(req);
1171 	nvme_init_request(req, cmd);
1172 	if (flags & NVME_SUBMIT_RETRY)
1173 		req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1174 
1175 	if (buffer && bufflen) {
1176 		ret = blk_rq_map_kern(req, buffer, bufflen, GFP_KERNEL);
1177 		if (ret)
1178 			goto out;
1179 	}
1180 
1181 	ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1182 	if (result && ret >= 0)
1183 		*result = nvme_req(req)->result;
1184  out:
1185 	blk_mq_free_request(req);
1186 	return ret;
1187 }
1188 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1189 
1190 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1191 		void *buffer, unsigned bufflen)
1192 {
1193 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1194 			NVME_QID_ANY, 0);
1195 }
1196 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1197 
1198 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1199 {
1200 	u32 effects = 0;
1201 
1202 	if (ns) {
1203 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1204 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1205 			dev_warn_once(ctrl->device,
1206 				"IO command:%02x has unusual effects:%08x\n",
1207 				opcode, effects);
1208 
1209 		/*
1210 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1211 		 * which would deadlock when done on an I/O command.  Note that
1212 		 * We already warn about an unusual effect above.
1213 		 */
1214 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1215 	} else {
1216 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1217 
1218 		/* Ignore execution restrictions if any relaxation bits are set */
1219 		if (effects & NVME_CMD_EFFECTS_CSER_MASK)
1220 			effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1221 	}
1222 
1223 	return effects;
1224 }
1225 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU");
1226 
1227 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1228 {
1229 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1230 
1231 	/*
1232 	 * For simplicity, IO to all namespaces is quiesced even if the command
1233 	 * effects say only one namespace is affected.
1234 	 */
1235 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1236 		mutex_lock(&ctrl->scan_lock);
1237 		mutex_lock(&ctrl->subsys->lock);
1238 		nvme_mpath_start_freeze(ctrl->subsys);
1239 		nvme_mpath_wait_freeze(ctrl->subsys);
1240 		nvme_start_freeze(ctrl);
1241 		nvme_wait_freeze(ctrl);
1242 	}
1243 	return effects;
1244 }
1245 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU");
1246 
1247 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1248 		       struct nvme_command *cmd, int status)
1249 {
1250 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1251 		nvme_unfreeze(ctrl);
1252 		nvme_mpath_unfreeze(ctrl->subsys);
1253 		mutex_unlock(&ctrl->subsys->lock);
1254 		mutex_unlock(&ctrl->scan_lock);
1255 	}
1256 	if (effects & NVME_CMD_EFFECTS_CCC) {
1257 		if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1258 				      &ctrl->flags)) {
1259 			dev_info(ctrl->device,
1260 "controller capabilities changed, reset may be required to take effect.\n");
1261 		}
1262 	}
1263 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1264 		nvme_queue_scan(ctrl);
1265 		flush_work(&ctrl->scan_work);
1266 	}
1267 	if (ns)
1268 		return;
1269 
1270 	switch (cmd->common.opcode) {
1271 	case nvme_admin_set_features:
1272 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1273 		case NVME_FEAT_KATO:
1274 			/*
1275 			 * Keep alive commands interval on the host should be
1276 			 * updated when KATO is modified by Set Features
1277 			 * commands.
1278 			 */
1279 			if (!status)
1280 				nvme_update_keep_alive(ctrl, cmd);
1281 			break;
1282 		default:
1283 			break;
1284 		}
1285 		break;
1286 	default:
1287 		break;
1288 	}
1289 }
1290 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU");
1291 
1292 /*
1293  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1294  *
1295  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1296  *   accounting for transport roundtrip times [..].
1297  */
1298 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1299 {
1300 	unsigned long delay = ctrl->kato * HZ / 2;
1301 
1302 	/*
1303 	 * When using Traffic Based Keep Alive, we need to run
1304 	 * nvme_keep_alive_work at twice the normal frequency, as one
1305 	 * command completion can postpone sending a keep alive command
1306 	 * by up to twice the delay between runs.
1307 	 */
1308 	if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1309 		delay /= 2;
1310 	return delay;
1311 }
1312 
1313 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1314 {
1315 	unsigned long now = jiffies;
1316 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1317 	unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1318 
1319 	if (time_after(now, ka_next_check_tm))
1320 		delay = 0;
1321 	else
1322 		delay = ka_next_check_tm - now;
1323 
1324 	queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1325 }
1326 
1327 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1328 						 blk_status_t status)
1329 {
1330 	struct nvme_ctrl *ctrl = rq->end_io_data;
1331 	unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1332 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1333 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1334 
1335 	/*
1336 	 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1337 	 * at the desired frequency.
1338 	 */
1339 	if (rtt <= delay) {
1340 		delay -= rtt;
1341 	} else {
1342 		dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1343 			 jiffies_to_msecs(rtt));
1344 		delay = 0;
1345 	}
1346 
1347 	blk_mq_free_request(rq);
1348 
1349 	if (status) {
1350 		dev_err(ctrl->device,
1351 			"failed nvme_keep_alive_end_io error=%d\n",
1352 				status);
1353 		return RQ_END_IO_NONE;
1354 	}
1355 
1356 	ctrl->ka_last_check_time = jiffies;
1357 	ctrl->comp_seen = false;
1358 	if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1359 		queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1360 	return RQ_END_IO_NONE;
1361 }
1362 
1363 static void nvme_keep_alive_work(struct work_struct *work)
1364 {
1365 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1366 			struct nvme_ctrl, ka_work);
1367 	bool comp_seen = ctrl->comp_seen;
1368 	struct request *rq;
1369 
1370 	ctrl->ka_last_check_time = jiffies;
1371 
1372 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1373 		dev_dbg(ctrl->device,
1374 			"reschedule traffic based keep-alive timer\n");
1375 		ctrl->comp_seen = false;
1376 		nvme_queue_keep_alive_work(ctrl);
1377 		return;
1378 	}
1379 
1380 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1381 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1382 	if (IS_ERR(rq)) {
1383 		/* allocation failure, reset the controller */
1384 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1385 		nvme_reset_ctrl(ctrl);
1386 		return;
1387 	}
1388 	nvme_init_request(rq, &ctrl->ka_cmd);
1389 
1390 	rq->timeout = ctrl->kato * HZ;
1391 	rq->end_io = nvme_keep_alive_end_io;
1392 	rq->end_io_data = ctrl;
1393 	blk_execute_rq_nowait(rq, false);
1394 }
1395 
1396 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1397 {
1398 	if (unlikely(ctrl->kato == 0))
1399 		return;
1400 
1401 	nvme_queue_keep_alive_work(ctrl);
1402 }
1403 
1404 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1405 {
1406 	if (unlikely(ctrl->kato == 0))
1407 		return;
1408 
1409 	cancel_delayed_work_sync(&ctrl->ka_work);
1410 }
1411 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1412 
1413 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1414 				   struct nvme_command *cmd)
1415 {
1416 	unsigned int new_kato =
1417 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1418 
1419 	dev_info(ctrl->device,
1420 		 "keep alive interval updated from %u ms to %u ms\n",
1421 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1422 
1423 	nvme_stop_keep_alive(ctrl);
1424 	ctrl->kato = new_kato;
1425 	nvme_start_keep_alive(ctrl);
1426 }
1427 
1428 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns)
1429 {
1430 	/*
1431 	 * The CNS field occupies a full byte starting with NVMe 1.2
1432 	 */
1433 	if (ctrl->vs >= NVME_VS(1, 2, 0))
1434 		return true;
1435 
1436 	/*
1437 	 * NVMe 1.1 expanded the CNS value to two bits, which means values
1438 	 * larger than that could get truncated and treated as an incorrect
1439 	 * value.
1440 	 *
1441 	 * Qemu implemented 1.0 behavior for controllers claiming 1.1
1442 	 * compliance, so they need to be quirked here.
1443 	 */
1444 	if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1445 	    !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS))
1446 		return cns <= 3;
1447 
1448 	/*
1449 	 * NVMe 1.0 used a single bit for the CNS value.
1450 	 */
1451 	return cns <= 1;
1452 }
1453 
1454 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1455 {
1456 	struct nvme_command c = { };
1457 	int error;
1458 
1459 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1460 	c.identify.opcode = nvme_admin_identify;
1461 	c.identify.cns = NVME_ID_CNS_CTRL;
1462 
1463 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1464 	if (!*id)
1465 		return -ENOMEM;
1466 
1467 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1468 			sizeof(struct nvme_id_ctrl));
1469 	if (error) {
1470 		kfree(*id);
1471 		*id = NULL;
1472 	}
1473 	return error;
1474 }
1475 
1476 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1477 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1478 {
1479 	const char *warn_str = "ctrl returned bogus length:";
1480 	void *data = cur;
1481 
1482 	switch (cur->nidt) {
1483 	case NVME_NIDT_EUI64:
1484 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1485 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1486 				 warn_str, cur->nidl);
1487 			return -1;
1488 		}
1489 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1490 			return NVME_NIDT_EUI64_LEN;
1491 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1492 		return NVME_NIDT_EUI64_LEN;
1493 	case NVME_NIDT_NGUID:
1494 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1495 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1496 				 warn_str, cur->nidl);
1497 			return -1;
1498 		}
1499 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1500 			return NVME_NIDT_NGUID_LEN;
1501 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1502 		return NVME_NIDT_NGUID_LEN;
1503 	case NVME_NIDT_UUID:
1504 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1505 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1506 				 warn_str, cur->nidl);
1507 			return -1;
1508 		}
1509 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1510 			return NVME_NIDT_UUID_LEN;
1511 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1512 		return NVME_NIDT_UUID_LEN;
1513 	case NVME_NIDT_CSI:
1514 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1515 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1516 				 warn_str, cur->nidl);
1517 			return -1;
1518 		}
1519 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1520 		*csi_seen = true;
1521 		return NVME_NIDT_CSI_LEN;
1522 	default:
1523 		/* Skip unknown types */
1524 		return cur->nidl;
1525 	}
1526 }
1527 
1528 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1529 		struct nvme_ns_info *info)
1530 {
1531 	struct nvme_command c = { };
1532 	bool csi_seen = false;
1533 	int status, pos, len;
1534 	void *data;
1535 
1536 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1537 		return 0;
1538 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1539 		return 0;
1540 
1541 	c.identify.opcode = nvme_admin_identify;
1542 	c.identify.nsid = cpu_to_le32(info->nsid);
1543 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1544 
1545 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1546 	if (!data)
1547 		return -ENOMEM;
1548 
1549 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1550 				      NVME_IDENTIFY_DATA_SIZE);
1551 	if (status) {
1552 		dev_warn(ctrl->device,
1553 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1554 			info->nsid, status);
1555 		goto free_data;
1556 	}
1557 
1558 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1559 		struct nvme_ns_id_desc *cur = data + pos;
1560 
1561 		if (cur->nidl == 0)
1562 			break;
1563 
1564 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1565 		if (len < 0)
1566 			break;
1567 
1568 		len += sizeof(*cur);
1569 	}
1570 
1571 	if (nvme_multi_css(ctrl) && !csi_seen) {
1572 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1573 			 info->nsid);
1574 		status = -EINVAL;
1575 	}
1576 
1577 free_data:
1578 	kfree(data);
1579 	return status;
1580 }
1581 
1582 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1583 			struct nvme_id_ns **id)
1584 {
1585 	struct nvme_command c = { };
1586 	int error;
1587 
1588 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1589 	c.identify.opcode = nvme_admin_identify;
1590 	c.identify.nsid = cpu_to_le32(nsid);
1591 	c.identify.cns = NVME_ID_CNS_NS;
1592 
1593 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1594 	if (!*id)
1595 		return -ENOMEM;
1596 
1597 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1598 	if (error) {
1599 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1600 		kfree(*id);
1601 		*id = NULL;
1602 	}
1603 	return error;
1604 }
1605 
1606 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1607 		struct nvme_ns_info *info)
1608 {
1609 	struct nvme_ns_ids *ids = &info->ids;
1610 	struct nvme_id_ns *id;
1611 	int ret;
1612 
1613 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1614 	if (ret)
1615 		return ret;
1616 
1617 	if (id->ncap == 0) {
1618 		/* namespace not allocated or attached */
1619 		info->is_removed = true;
1620 		ret = -ENODEV;
1621 		goto error;
1622 	}
1623 
1624 	info->anagrpid = id->anagrpid;
1625 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1626 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1627 	info->is_ready = true;
1628 	info->endgid = le16_to_cpu(id->endgid);
1629 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1630 		dev_info(ctrl->device,
1631 			 "Ignoring bogus Namespace Identifiers\n");
1632 	} else {
1633 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1634 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1635 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1636 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1637 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1638 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1639 	}
1640 
1641 error:
1642 	kfree(id);
1643 	return ret;
1644 }
1645 
1646 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1647 		struct nvme_ns_info *info)
1648 {
1649 	struct nvme_id_ns_cs_indep *id;
1650 	struct nvme_command c = {
1651 		.identify.opcode	= nvme_admin_identify,
1652 		.identify.nsid		= cpu_to_le32(info->nsid),
1653 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1654 	};
1655 	int ret;
1656 
1657 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1658 	if (!id)
1659 		return -ENOMEM;
1660 
1661 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1662 	if (!ret) {
1663 		info->anagrpid = id->anagrpid;
1664 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1665 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1666 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1667 		info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL;
1668 		info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT;
1669 		info->endgid = le16_to_cpu(id->endgid);
1670 	}
1671 	kfree(id);
1672 	return ret;
1673 }
1674 
1675 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1676 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1677 {
1678 	union nvme_result res = { 0 };
1679 	struct nvme_command c = { };
1680 	int ret;
1681 
1682 	c.features.opcode = op;
1683 	c.features.fid = cpu_to_le32(fid);
1684 	c.features.dword11 = cpu_to_le32(dword11);
1685 
1686 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1687 			buffer, buflen, NVME_QID_ANY, 0);
1688 	if (ret >= 0 && result)
1689 		*result = le32_to_cpu(res.u32);
1690 	return ret;
1691 }
1692 
1693 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1694 		      unsigned int dword11, void *buffer, size_t buflen,
1695 		      void *result)
1696 {
1697 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1698 			     buflen, result);
1699 }
1700 EXPORT_SYMBOL_GPL(nvme_set_features);
1701 
1702 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1703 		      unsigned int dword11, void *buffer, size_t buflen,
1704 		      void *result)
1705 {
1706 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1707 			     buflen, result);
1708 }
1709 EXPORT_SYMBOL_GPL(nvme_get_features);
1710 
1711 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1712 {
1713 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1714 	u32 result;
1715 	int status, nr_io_queues;
1716 
1717 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1718 			&result);
1719 
1720 	/*
1721 	 * It's either a kernel error or the host observed a connection
1722 	 * lost. In either case it's not possible communicate with the
1723 	 * controller and thus enter the error code path.
1724 	 */
1725 	if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1726 		return status;
1727 
1728 	/*
1729 	 * Degraded controllers might return an error when setting the queue
1730 	 * count.  We still want to be able to bring them online and offer
1731 	 * access to the admin queue, as that might be only way to fix them up.
1732 	 */
1733 	if (status > 0) {
1734 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1735 		*count = 0;
1736 	} else {
1737 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1738 		*count = min(*count, nr_io_queues);
1739 	}
1740 
1741 	return 0;
1742 }
1743 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1744 
1745 #define NVME_AEN_SUPPORTED \
1746 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1747 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1748 
1749 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1750 {
1751 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1752 	int status;
1753 
1754 	if (!supported_aens)
1755 		return;
1756 
1757 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1758 			NULL, 0, &result);
1759 	if (status)
1760 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1761 			 supported_aens);
1762 
1763 	queue_work(nvme_wq, &ctrl->async_event_work);
1764 }
1765 
1766 static int nvme_ns_open(struct nvme_ns *ns)
1767 {
1768 
1769 	/* should never be called due to GENHD_FL_HIDDEN */
1770 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1771 		goto fail;
1772 	if (!nvme_get_ns(ns))
1773 		goto fail;
1774 	if (!try_module_get(ns->ctrl->ops->module))
1775 		goto fail_put_ns;
1776 
1777 	return 0;
1778 
1779 fail_put_ns:
1780 	nvme_put_ns(ns);
1781 fail:
1782 	return -ENXIO;
1783 }
1784 
1785 static void nvme_ns_release(struct nvme_ns *ns)
1786 {
1787 
1788 	module_put(ns->ctrl->ops->module);
1789 	nvme_put_ns(ns);
1790 }
1791 
1792 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1793 {
1794 	return nvme_ns_open(disk->private_data);
1795 }
1796 
1797 static void nvme_release(struct gendisk *disk)
1798 {
1799 	nvme_ns_release(disk->private_data);
1800 }
1801 
1802 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1803 {
1804 	/* some standard values */
1805 	geo->heads = 1 << 6;
1806 	geo->sectors = 1 << 5;
1807 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1808 	return 0;
1809 }
1810 
1811 static bool nvme_init_integrity(struct nvme_ns_head *head,
1812 		struct queue_limits *lim, struct nvme_ns_info *info)
1813 {
1814 	struct blk_integrity *bi = &lim->integrity;
1815 
1816 	memset(bi, 0, sizeof(*bi));
1817 
1818 	if (!head->ms)
1819 		return true;
1820 
1821 	/*
1822 	 * PI can always be supported as we can ask the controller to simply
1823 	 * insert/strip it, which is not possible for other kinds of metadata.
1824 	 */
1825 	if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1826 	    !(head->features & NVME_NS_METADATA_SUPPORTED))
1827 		return nvme_ns_has_pi(head);
1828 
1829 	switch (head->pi_type) {
1830 	case NVME_NS_DPS_PI_TYPE3:
1831 		switch (head->guard_type) {
1832 		case NVME_NVM_NS_16B_GUARD:
1833 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1834 			bi->tag_size = sizeof(u16) + sizeof(u32);
1835 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1836 			break;
1837 		case NVME_NVM_NS_64B_GUARD:
1838 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1839 			bi->tag_size = sizeof(u16) + 6;
1840 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1841 			break;
1842 		default:
1843 			break;
1844 		}
1845 		break;
1846 	case NVME_NS_DPS_PI_TYPE1:
1847 	case NVME_NS_DPS_PI_TYPE2:
1848 		switch (head->guard_type) {
1849 		case NVME_NVM_NS_16B_GUARD:
1850 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1851 			bi->tag_size = sizeof(u16);
1852 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1853 				     BLK_INTEGRITY_REF_TAG;
1854 			break;
1855 		case NVME_NVM_NS_64B_GUARD:
1856 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1857 			bi->tag_size = sizeof(u16);
1858 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1859 				     BLK_INTEGRITY_REF_TAG;
1860 			break;
1861 		default:
1862 			break;
1863 		}
1864 		break;
1865 	default:
1866 		break;
1867 	}
1868 
1869 	bi->tuple_size = head->ms;
1870 	bi->pi_offset = info->pi_offset;
1871 	return true;
1872 }
1873 
1874 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1875 {
1876 	struct nvme_ctrl *ctrl = ns->ctrl;
1877 
1878 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1879 		lim->max_hw_discard_sectors =
1880 			nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1881 	else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1882 		lim->max_hw_discard_sectors = UINT_MAX;
1883 	else
1884 		lim->max_hw_discard_sectors = 0;
1885 
1886 	lim->discard_granularity = lim->logical_block_size;
1887 
1888 	if (ctrl->dmrl)
1889 		lim->max_discard_segments = ctrl->dmrl;
1890 	else
1891 		lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1892 }
1893 
1894 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1895 {
1896 	return uuid_equal(&a->uuid, &b->uuid) &&
1897 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1898 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1899 		a->csi == b->csi;
1900 }
1901 
1902 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1903 		struct nvme_id_ns_nvm **nvmp)
1904 {
1905 	struct nvme_command c = {
1906 		.identify.opcode	= nvme_admin_identify,
1907 		.identify.nsid		= cpu_to_le32(nsid),
1908 		.identify.cns		= NVME_ID_CNS_CS_NS,
1909 		.identify.csi		= NVME_CSI_NVM,
1910 	};
1911 	struct nvme_id_ns_nvm *nvm;
1912 	int ret;
1913 
1914 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1915 	if (!nvm)
1916 		return -ENOMEM;
1917 
1918 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1919 	if (ret)
1920 		kfree(nvm);
1921 	else
1922 		*nvmp = nvm;
1923 	return ret;
1924 }
1925 
1926 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1927 		struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1928 {
1929 	u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1930 	u8 guard_type;
1931 
1932 	/* no support for storage tag formats right now */
1933 	if (nvme_elbaf_sts(elbaf))
1934 		return;
1935 
1936 	guard_type = nvme_elbaf_guard_type(elbaf);
1937 	if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) &&
1938 	     guard_type == NVME_NVM_NS_QTYPE_GUARD)
1939 		guard_type = nvme_elbaf_qualified_guard_type(elbaf);
1940 
1941 	head->guard_type = guard_type;
1942 	switch (head->guard_type) {
1943 	case NVME_NVM_NS_64B_GUARD:
1944 		head->pi_size = sizeof(struct crc64_pi_tuple);
1945 		break;
1946 	case NVME_NVM_NS_16B_GUARD:
1947 		head->pi_size = sizeof(struct t10_pi_tuple);
1948 		break;
1949 	default:
1950 		break;
1951 	}
1952 }
1953 
1954 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1955 		struct nvme_ns_head *head, struct nvme_id_ns *id,
1956 		struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info)
1957 {
1958 	head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1959 	head->pi_type = 0;
1960 	head->pi_size = 0;
1961 	head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1962 	if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1963 		return;
1964 
1965 	if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1966 		nvme_configure_pi_elbas(head, id, nvm);
1967 	} else {
1968 		head->pi_size = sizeof(struct t10_pi_tuple);
1969 		head->guard_type = NVME_NVM_NS_16B_GUARD;
1970 	}
1971 
1972 	if (head->pi_size && head->ms >= head->pi_size)
1973 		head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1974 	if (!(id->dps & NVME_NS_DPS_PI_FIRST)) {
1975 		if (disable_pi_offsets)
1976 			head->pi_type = 0;
1977 		else
1978 			info->pi_offset = head->ms - head->pi_size;
1979 	}
1980 
1981 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1982 		/*
1983 		 * The NVMe over Fabrics specification only supports metadata as
1984 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1985 		 * remap the separate metadata buffer from the block layer.
1986 		 */
1987 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1988 			return;
1989 
1990 		head->features |= NVME_NS_EXT_LBAS;
1991 
1992 		/*
1993 		 * The current fabrics transport drivers support namespace
1994 		 * metadata formats only if nvme_ns_has_pi() returns true.
1995 		 * Suppress support for all other formats so the namespace will
1996 		 * have a 0 capacity and not be usable through the block stack.
1997 		 *
1998 		 * Note, this check will need to be modified if any drivers
1999 		 * gain the ability to use other metadata formats.
2000 		 */
2001 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
2002 			head->features |= NVME_NS_METADATA_SUPPORTED;
2003 	} else {
2004 		/*
2005 		 * For PCIe controllers, we can't easily remap the separate
2006 		 * metadata buffer from the block layer and thus require a
2007 		 * separate metadata buffer for block layer metadata/PI support.
2008 		 * We allow extended LBAs for the passthrough interface, though.
2009 		 */
2010 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
2011 			head->features |= NVME_NS_EXT_LBAS;
2012 		else
2013 			head->features |= NVME_NS_METADATA_SUPPORTED;
2014 	}
2015 }
2016 
2017 
2018 static void nvme_update_atomic_write_disk_info(struct nvme_ns *ns,
2019 			struct nvme_id_ns *id, struct queue_limits *lim,
2020 			u32 bs, u32 atomic_bs)
2021 {
2022 	unsigned int boundary = 0;
2023 
2024 	if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) {
2025 		if (le16_to_cpu(id->nabspf))
2026 			boundary = (le16_to_cpu(id->nabspf) + 1) * bs;
2027 	}
2028 	lim->atomic_write_hw_max = atomic_bs;
2029 	lim->atomic_write_hw_boundary = boundary;
2030 	lim->atomic_write_hw_unit_min = bs;
2031 	lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs);
2032 	lim->features |= BLK_FEAT_ATOMIC_WRITES;
2033 }
2034 
2035 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
2036 {
2037 	return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
2038 }
2039 
2040 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
2041 		struct queue_limits *lim)
2042 {
2043 	lim->max_hw_sectors = ctrl->max_hw_sectors;
2044 	lim->max_segments = min_t(u32, USHRT_MAX,
2045 		min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
2046 	lim->max_integrity_segments = ctrl->max_integrity_segments;
2047 	lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
2048 	lim->max_segment_size = UINT_MAX;
2049 	lim->dma_alignment = 3;
2050 }
2051 
2052 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
2053 		struct queue_limits *lim)
2054 {
2055 	struct nvme_ns_head *head = ns->head;
2056 	u32 bs = 1U << head->lba_shift;
2057 	u32 atomic_bs, phys_bs, io_opt = 0;
2058 	bool valid = true;
2059 
2060 	/*
2061 	 * The block layer can't support LBA sizes larger than the page size
2062 	 * or smaller than a sector size yet, so catch this early and don't
2063 	 * allow block I/O.
2064 	 */
2065 	if (blk_validate_block_size(bs)) {
2066 		bs = (1 << 9);
2067 		valid = false;
2068 	}
2069 
2070 	atomic_bs = phys_bs = bs;
2071 	if (id->nabo == 0) {
2072 		/*
2073 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
2074 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
2075 		 * 0 then AWUPF must be used instead.
2076 		 */
2077 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
2078 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2079 		else
2080 			atomic_bs = (1 + ns->ctrl->awupf) * bs;
2081 
2082 		/*
2083 		 * Set subsystem atomic bs.
2084 		 */
2085 		if (ns->ctrl->subsys->atomic_bs) {
2086 			if (atomic_bs != ns->ctrl->subsys->atomic_bs) {
2087 				dev_err_ratelimited(ns->ctrl->device,
2088 					"%s: Inconsistent Atomic Write Size, Namespace will not be added: Subsystem=%d bytes, Controller/Namespace=%d bytes\n",
2089 					ns->disk ? ns->disk->disk_name : "?",
2090 					ns->ctrl->subsys->atomic_bs,
2091 					atomic_bs);
2092 			}
2093 		} else
2094 			ns->ctrl->subsys->atomic_bs = atomic_bs;
2095 
2096 		nvme_update_atomic_write_disk_info(ns, id, lim, bs, atomic_bs);
2097 	}
2098 
2099 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
2100 		/* NPWG = Namespace Preferred Write Granularity */
2101 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2102 		/* NOWS = Namespace Optimal Write Size */
2103 		if (id->nows)
2104 			io_opt = bs * (1 + le16_to_cpu(id->nows));
2105 	}
2106 
2107 	/*
2108 	 * Linux filesystems assume writing a single physical block is
2109 	 * an atomic operation. Hence limit the physical block size to the
2110 	 * value of the Atomic Write Unit Power Fail parameter.
2111 	 */
2112 	lim->logical_block_size = bs;
2113 	lim->physical_block_size = min(phys_bs, atomic_bs);
2114 	lim->io_min = phys_bs;
2115 	lim->io_opt = io_opt;
2116 	if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) &&
2117 	    (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM))
2118 		lim->max_write_zeroes_sectors = UINT_MAX;
2119 	else
2120 		lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2121 	return valid;
2122 }
2123 
2124 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2125 {
2126 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2127 }
2128 
2129 static inline bool nvme_first_scan(struct gendisk *disk)
2130 {
2131 	/* nvme_alloc_ns() scans the disk prior to adding it */
2132 	return !disk_live(disk);
2133 }
2134 
2135 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2136 		struct queue_limits *lim)
2137 {
2138 	struct nvme_ctrl *ctrl = ns->ctrl;
2139 	u32 iob;
2140 
2141 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2142 	    is_power_of_2(ctrl->max_hw_sectors))
2143 		iob = ctrl->max_hw_sectors;
2144 	else
2145 		iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2146 
2147 	if (!iob)
2148 		return;
2149 
2150 	if (!is_power_of_2(iob)) {
2151 		if (nvme_first_scan(ns->disk))
2152 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2153 				ns->disk->disk_name, iob);
2154 		return;
2155 	}
2156 
2157 	if (blk_queue_is_zoned(ns->disk->queue)) {
2158 		if (nvme_first_scan(ns->disk))
2159 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
2160 				ns->disk->disk_name);
2161 		return;
2162 	}
2163 
2164 	lim->chunk_sectors = iob;
2165 }
2166 
2167 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2168 		struct nvme_ns_info *info)
2169 {
2170 	struct queue_limits lim;
2171 	unsigned int memflags;
2172 	int ret;
2173 
2174 	lim = queue_limits_start_update(ns->disk->queue);
2175 	nvme_set_ctrl_limits(ns->ctrl, &lim);
2176 
2177 	memflags = blk_mq_freeze_queue(ns->disk->queue);
2178 	ret = queue_limits_commit_update(ns->disk->queue, &lim);
2179 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2180 	blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2181 
2182 	/* Hide the block-interface for these devices */
2183 	if (!ret)
2184 		ret = -ENODEV;
2185 	return ret;
2186 }
2187 
2188 static int nvme_query_fdp_granularity(struct nvme_ctrl *ctrl,
2189 				      struct nvme_ns_info *info, u8 fdp_idx)
2190 {
2191 	struct nvme_fdp_config_log hdr, *h;
2192 	struct nvme_fdp_config_desc *desc;
2193 	size_t size = sizeof(hdr);
2194 	void *log, *end;
2195 	int i, n, ret;
2196 
2197 	ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0,
2198 			       NVME_CSI_NVM, &hdr, size, 0, info->endgid);
2199 	if (ret) {
2200 		dev_warn(ctrl->device,
2201 			 "FDP configs log header status:0x%x endgid:%d\n", ret,
2202 			 info->endgid);
2203 		return ret;
2204 	}
2205 
2206 	size = le32_to_cpu(hdr.sze);
2207 	if (size > PAGE_SIZE * MAX_ORDER_NR_PAGES) {
2208 		dev_warn(ctrl->device, "FDP config size too large:%zu\n",
2209 			 size);
2210 		return 0;
2211 	}
2212 
2213 	h = kvmalloc(size, GFP_KERNEL);
2214 	if (!h)
2215 		return -ENOMEM;
2216 
2217 	ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0,
2218 			       NVME_CSI_NVM, h, size, 0, info->endgid);
2219 	if (ret) {
2220 		dev_warn(ctrl->device,
2221 			 "FDP configs log status:0x%x endgid:%d\n", ret,
2222 			 info->endgid);
2223 		goto out;
2224 	}
2225 
2226 	n = le16_to_cpu(h->numfdpc) + 1;
2227 	if (fdp_idx > n) {
2228 		dev_warn(ctrl->device, "FDP index:%d out of range:%d\n",
2229 			 fdp_idx, n);
2230 		/* Proceed without registering FDP streams */
2231 		ret = 0;
2232 		goto out;
2233 	}
2234 
2235 	log = h + 1;
2236 	desc = log;
2237 	end = log + size - sizeof(*h);
2238 	for (i = 0; i < fdp_idx; i++) {
2239 		log += le16_to_cpu(desc->dsze);
2240 		desc = log;
2241 		if (log >= end) {
2242 			dev_warn(ctrl->device,
2243 				 "FDP invalid config descriptor list\n");
2244 			ret = 0;
2245 			goto out;
2246 		}
2247 	}
2248 
2249 	if (le32_to_cpu(desc->nrg) > 1) {
2250 		dev_warn(ctrl->device, "FDP NRG > 1 not supported\n");
2251 		ret = 0;
2252 		goto out;
2253 	}
2254 
2255 	info->runs = le64_to_cpu(desc->runs);
2256 out:
2257 	kvfree(h);
2258 	return ret;
2259 }
2260 
2261 static int nvme_query_fdp_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2262 {
2263 	struct nvme_ns_head *head = ns->head;
2264 	struct nvme_ctrl *ctrl = ns->ctrl;
2265 	struct nvme_fdp_ruh_status *ruhs;
2266 	struct nvme_fdp_config fdp;
2267 	struct nvme_command c = {};
2268 	size_t size;
2269 	int i, ret;
2270 
2271 	/*
2272 	 * The FDP configuration is static for the lifetime of the namespace,
2273 	 * so return immediately if we've already registered this namespace's
2274 	 * streams.
2275 	 */
2276 	if (head->nr_plids)
2277 		return 0;
2278 
2279 	ret = nvme_get_features(ctrl, NVME_FEAT_FDP, info->endgid, NULL, 0,
2280 				&fdp);
2281 	if (ret) {
2282 		dev_warn(ctrl->device, "FDP get feature status:0x%x\n", ret);
2283 		return ret;
2284 	}
2285 
2286 	if (!(fdp.flags & FDPCFG_FDPE))
2287 		return 0;
2288 
2289 	ret = nvme_query_fdp_granularity(ctrl, info, fdp.fdpcidx);
2290 	if (!info->runs)
2291 		return ret;
2292 
2293 	size = struct_size(ruhs, ruhsd, S8_MAX - 1);
2294 	ruhs = kzalloc(size, GFP_KERNEL);
2295 	if (!ruhs)
2296 		return -ENOMEM;
2297 
2298 	c.imr.opcode = nvme_cmd_io_mgmt_recv;
2299 	c.imr.nsid = cpu_to_le32(head->ns_id);
2300 	c.imr.mo = NVME_IO_MGMT_RECV_MO_RUHS;
2301 	c.imr.numd = cpu_to_le32(nvme_bytes_to_numd(size));
2302 	ret = nvme_submit_sync_cmd(ns->queue, &c, ruhs, size);
2303 	if (ret) {
2304 		dev_warn(ctrl->device, "FDP io-mgmt status:0x%x\n", ret);
2305 		goto free;
2306 	}
2307 
2308 	head->nr_plids = le16_to_cpu(ruhs->nruhsd);
2309 	if (!head->nr_plids)
2310 		goto free;
2311 
2312 	head->plids = kcalloc(head->nr_plids, sizeof(*head->plids),
2313 			      GFP_KERNEL);
2314 	if (!head->plids) {
2315 		dev_warn(ctrl->device,
2316 			 "failed to allocate %u FDP placement IDs\n",
2317 			 head->nr_plids);
2318 		head->nr_plids = 0;
2319 		ret = -ENOMEM;
2320 		goto free;
2321 	}
2322 
2323 	for (i = 0; i < head->nr_plids; i++)
2324 		head->plids[i] = le16_to_cpu(ruhs->ruhsd[i].pid);
2325 free:
2326 	kfree(ruhs);
2327 	return ret;
2328 }
2329 
2330 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2331 		struct nvme_ns_info *info)
2332 {
2333 	struct queue_limits lim;
2334 	struct nvme_id_ns_nvm *nvm = NULL;
2335 	struct nvme_zone_info zi = {};
2336 	struct nvme_id_ns *id;
2337 	unsigned int memflags;
2338 	sector_t capacity;
2339 	unsigned lbaf;
2340 	int ret;
2341 
2342 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2343 	if (ret)
2344 		return ret;
2345 
2346 	if (id->ncap == 0) {
2347 		/* namespace not allocated or attached */
2348 		info->is_removed = true;
2349 		ret = -ENXIO;
2350 		goto out;
2351 	}
2352 	lbaf = nvme_lbaf_index(id->flbas);
2353 
2354 	if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2355 		ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2356 		if (ret < 0)
2357 			goto out;
2358 	}
2359 
2360 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2361 	    ns->head->ids.csi == NVME_CSI_ZNS) {
2362 		ret = nvme_query_zone_info(ns, lbaf, &zi);
2363 		if (ret < 0)
2364 			goto out;
2365 	}
2366 
2367 	if (ns->ctrl->ctratt & NVME_CTRL_ATTR_FDPS) {
2368 		ret = nvme_query_fdp_info(ns, info);
2369 		if (ret < 0)
2370 			goto out;
2371 	}
2372 
2373 	lim = queue_limits_start_update(ns->disk->queue);
2374 
2375 	memflags = blk_mq_freeze_queue(ns->disk->queue);
2376 	ns->head->lba_shift = id->lbaf[lbaf].ds;
2377 	ns->head->nuse = le64_to_cpu(id->nuse);
2378 	capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2379 	nvme_set_ctrl_limits(ns->ctrl, &lim);
2380 	nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info);
2381 	nvme_set_chunk_sectors(ns, id, &lim);
2382 	if (!nvme_update_disk_info(ns, id, &lim))
2383 		capacity = 0;
2384 
2385 	/*
2386 	 * Validate the max atomic write size fits within the subsystem's
2387 	 * atomic write capabilities.
2388 	 */
2389 	if (lim.atomic_write_hw_max > ns->ctrl->subsys->atomic_bs) {
2390 		blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2391 		ret = -ENXIO;
2392 		goto out;
2393 	}
2394 
2395 	nvme_config_discard(ns, &lim);
2396 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2397 	    ns->head->ids.csi == NVME_CSI_ZNS)
2398 		nvme_update_zone_info(ns, &lim, &zi);
2399 
2400 	if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc)
2401 		lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA;
2402 	else
2403 		lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA);
2404 
2405 	if (info->is_rotational)
2406 		lim.features |= BLK_FEAT_ROTATIONAL;
2407 
2408 	/*
2409 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
2410 	 * metadata masquerading as Type 0 if supported, otherwise reject block
2411 	 * I/O to namespaces with metadata except when the namespace supports
2412 	 * PI, as it can strip/insert in that case.
2413 	 */
2414 	if (!nvme_init_integrity(ns->head, &lim, info))
2415 		capacity = 0;
2416 
2417 	lim.max_write_streams = ns->head->nr_plids;
2418 	if (lim.max_write_streams)
2419 		lim.write_stream_granularity = min(info->runs, U32_MAX);
2420 	else
2421 		lim.write_stream_granularity = 0;
2422 
2423 	ret = queue_limits_commit_update(ns->disk->queue, &lim);
2424 	if (ret) {
2425 		blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2426 		goto out;
2427 	}
2428 
2429 	set_capacity_and_notify(ns->disk, capacity);
2430 
2431 	/*
2432 	 * Only set the DEAC bit if the device guarantees that reads from
2433 	 * deallocated data return zeroes.  While the DEAC bit does not
2434 	 * require that, it must be a no-op if reads from deallocated data
2435 	 * do not return zeroes.
2436 	 */
2437 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2438 		ns->head->features |= NVME_NS_DEAC;
2439 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2440 	set_bit(NVME_NS_READY, &ns->flags);
2441 	blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2442 
2443 	if (blk_queue_is_zoned(ns->queue)) {
2444 		ret = blk_revalidate_disk_zones(ns->disk);
2445 		if (ret && !nvme_first_scan(ns->disk))
2446 			goto out;
2447 	}
2448 
2449 	ret = 0;
2450 out:
2451 	kfree(nvm);
2452 	kfree(id);
2453 	return ret;
2454 }
2455 
2456 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2457 {
2458 	bool unsupported = false;
2459 	int ret;
2460 
2461 	switch (info->ids.csi) {
2462 	case NVME_CSI_ZNS:
2463 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2464 			dev_info(ns->ctrl->device,
2465 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2466 				info->nsid);
2467 			ret = nvme_update_ns_info_generic(ns, info);
2468 			break;
2469 		}
2470 		ret = nvme_update_ns_info_block(ns, info);
2471 		break;
2472 	case NVME_CSI_NVM:
2473 		ret = nvme_update_ns_info_block(ns, info);
2474 		break;
2475 	default:
2476 		dev_info(ns->ctrl->device,
2477 			"block device for nsid %u not supported (csi %u)\n",
2478 			info->nsid, info->ids.csi);
2479 		ret = nvme_update_ns_info_generic(ns, info);
2480 		break;
2481 	}
2482 
2483 	/*
2484 	 * If probing fails due an unsupported feature, hide the block device,
2485 	 * but still allow other access.
2486 	 */
2487 	if (ret == -ENODEV) {
2488 		ns->disk->flags |= GENHD_FL_HIDDEN;
2489 		set_bit(NVME_NS_READY, &ns->flags);
2490 		unsupported = true;
2491 		ret = 0;
2492 	}
2493 
2494 	if (!ret && nvme_ns_head_multipath(ns->head)) {
2495 		struct queue_limits *ns_lim = &ns->disk->queue->limits;
2496 		struct queue_limits lim;
2497 		unsigned int memflags;
2498 
2499 		lim = queue_limits_start_update(ns->head->disk->queue);
2500 		memflags = blk_mq_freeze_queue(ns->head->disk->queue);
2501 		/*
2502 		 * queue_limits mixes values that are the hardware limitations
2503 		 * for bio splitting with what is the device configuration.
2504 		 *
2505 		 * For NVMe the device configuration can change after e.g. a
2506 		 * Format command, and we really want to pick up the new format
2507 		 * value here.  But we must still stack the queue limits to the
2508 		 * least common denominator for multipathing to split the bios
2509 		 * properly.
2510 		 *
2511 		 * To work around this, we explicitly set the device
2512 		 * configuration to those that we just queried, but only stack
2513 		 * the splitting limits in to make sure we still obey possibly
2514 		 * lower limitations of other controllers.
2515 		 */
2516 		lim.logical_block_size = ns_lim->logical_block_size;
2517 		lim.physical_block_size = ns_lim->physical_block_size;
2518 		lim.io_min = ns_lim->io_min;
2519 		lim.io_opt = ns_lim->io_opt;
2520 		queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2521 					ns->head->disk->disk_name);
2522 		if (unsupported)
2523 			ns->head->disk->flags |= GENHD_FL_HIDDEN;
2524 		else
2525 			nvme_init_integrity(ns->head, &lim, info);
2526 		lim.max_write_streams = ns_lim->max_write_streams;
2527 		lim.write_stream_granularity = ns_lim->write_stream_granularity;
2528 		ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2529 
2530 		set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2531 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2532 		nvme_mpath_revalidate_paths(ns);
2533 
2534 		blk_mq_unfreeze_queue(ns->head->disk->queue, memflags);
2535 	}
2536 
2537 	return ret;
2538 }
2539 
2540 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16],
2541 		enum blk_unique_id type)
2542 {
2543 	struct nvme_ns_ids *ids = &ns->head->ids;
2544 
2545 	if (type != BLK_UID_EUI64)
2546 		return -EINVAL;
2547 
2548 	if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) {
2549 		memcpy(id, &ids->nguid, sizeof(ids->nguid));
2550 		return sizeof(ids->nguid);
2551 	}
2552 	if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) {
2553 		memcpy(id, &ids->eui64, sizeof(ids->eui64));
2554 		return sizeof(ids->eui64);
2555 	}
2556 
2557 	return -EINVAL;
2558 }
2559 
2560 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16],
2561 		enum blk_unique_id type)
2562 {
2563 	return nvme_ns_get_unique_id(disk->private_data, id, type);
2564 }
2565 
2566 #ifdef CONFIG_BLK_SED_OPAL
2567 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2568 		bool send)
2569 {
2570 	struct nvme_ctrl *ctrl = data;
2571 	struct nvme_command cmd = { };
2572 
2573 	if (send)
2574 		cmd.common.opcode = nvme_admin_security_send;
2575 	else
2576 		cmd.common.opcode = nvme_admin_security_recv;
2577 	cmd.common.nsid = 0;
2578 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2579 	cmd.common.cdw11 = cpu_to_le32(len);
2580 
2581 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2582 			NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2583 }
2584 
2585 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2586 {
2587 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2588 		if (!ctrl->opal_dev)
2589 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2590 		else if (was_suspended)
2591 			opal_unlock_from_suspend(ctrl->opal_dev);
2592 	} else {
2593 		free_opal_dev(ctrl->opal_dev);
2594 		ctrl->opal_dev = NULL;
2595 	}
2596 }
2597 #else
2598 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2599 {
2600 }
2601 #endif /* CONFIG_BLK_SED_OPAL */
2602 
2603 #ifdef CONFIG_BLK_DEV_ZONED
2604 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2605 		unsigned int nr_zones, report_zones_cb cb, void *data)
2606 {
2607 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2608 			data);
2609 }
2610 #else
2611 #define nvme_report_zones	NULL
2612 #endif /* CONFIG_BLK_DEV_ZONED */
2613 
2614 const struct block_device_operations nvme_bdev_ops = {
2615 	.owner		= THIS_MODULE,
2616 	.ioctl		= nvme_ioctl,
2617 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2618 	.open		= nvme_open,
2619 	.release	= nvme_release,
2620 	.getgeo		= nvme_getgeo,
2621 	.get_unique_id	= nvme_get_unique_id,
2622 	.report_zones	= nvme_report_zones,
2623 	.pr_ops		= &nvme_pr_ops,
2624 };
2625 
2626 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2627 		u32 timeout, const char *op)
2628 {
2629 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2630 	u32 csts;
2631 	int ret;
2632 
2633 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2634 		if (csts == ~0)
2635 			return -ENODEV;
2636 		if ((csts & mask) == val)
2637 			break;
2638 
2639 		usleep_range(1000, 2000);
2640 		if (fatal_signal_pending(current))
2641 			return -EINTR;
2642 		if (time_after(jiffies, timeout_jiffies)) {
2643 			dev_err(ctrl->device,
2644 				"Device not ready; aborting %s, CSTS=0x%x\n",
2645 				op, csts);
2646 			return -ENODEV;
2647 		}
2648 	}
2649 
2650 	return ret;
2651 }
2652 
2653 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2654 {
2655 	int ret;
2656 
2657 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2658 	if (shutdown)
2659 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2660 	else
2661 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2662 
2663 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2664 	if (ret)
2665 		return ret;
2666 
2667 	if (shutdown) {
2668 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2669 				       NVME_CSTS_SHST_CMPLT,
2670 				       ctrl->shutdown_timeout, "shutdown");
2671 	}
2672 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2673 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2674 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2675 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2676 }
2677 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2678 
2679 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2680 {
2681 	unsigned dev_page_min;
2682 	u32 timeout;
2683 	int ret;
2684 
2685 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2686 	if (ret) {
2687 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2688 		return ret;
2689 	}
2690 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2691 
2692 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2693 		dev_err(ctrl->device,
2694 			"Minimum device page size %u too large for host (%u)\n",
2695 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2696 		return -ENODEV;
2697 	}
2698 
2699 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2700 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2701 	else
2702 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2703 
2704 	/*
2705 	 * Setting CRIME results in CSTS.RDY before the media is ready. This
2706 	 * makes it possible for media related commands to return the error
2707 	 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2708 	 * restructured to handle retries, disable CC.CRIME.
2709 	 */
2710 	ctrl->ctrl_config &= ~NVME_CC_CRIME;
2711 
2712 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2713 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2714 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2715 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2716 	if (ret)
2717 		return ret;
2718 
2719 	/* CAP value may change after initial CC write */
2720 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2721 	if (ret)
2722 		return ret;
2723 
2724 	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2725 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2726 		u32 crto, ready_timeout;
2727 
2728 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2729 		if (ret) {
2730 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2731 				ret);
2732 			return ret;
2733 		}
2734 
2735 		/*
2736 		 * CRTO should always be greater or equal to CAP.TO, but some
2737 		 * devices are known to get this wrong. Use the larger of the
2738 		 * two values.
2739 		 */
2740 		ready_timeout = NVME_CRTO_CRWMT(crto);
2741 
2742 		if (ready_timeout < timeout)
2743 			dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2744 				      crto, ctrl->cap);
2745 		else
2746 			timeout = ready_timeout;
2747 	}
2748 
2749 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2750 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2751 	if (ret)
2752 		return ret;
2753 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2754 			       (timeout + 1) / 2, "initialisation");
2755 }
2756 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2757 
2758 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2759 {
2760 	__le64 ts;
2761 	int ret;
2762 
2763 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2764 		return 0;
2765 
2766 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2767 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2768 			NULL);
2769 	if (ret)
2770 		dev_warn_once(ctrl->device,
2771 			"could not set timestamp (%d)\n", ret);
2772 	return ret;
2773 }
2774 
2775 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2776 {
2777 	struct nvme_feat_host_behavior *host;
2778 	u8 acre = 0, lbafee = 0;
2779 	int ret;
2780 
2781 	/* Don't bother enabling the feature if retry delay is not reported */
2782 	if (ctrl->crdt[0])
2783 		acre = NVME_ENABLE_ACRE;
2784 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2785 		lbafee = NVME_ENABLE_LBAFEE;
2786 
2787 	if (!acre && !lbafee)
2788 		return 0;
2789 
2790 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2791 	if (!host)
2792 		return 0;
2793 
2794 	host->acre = acre;
2795 	host->lbafee = lbafee;
2796 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2797 				host, sizeof(*host), NULL);
2798 	kfree(host);
2799 	return ret;
2800 }
2801 
2802 /*
2803  * The function checks whether the given total (exlat + enlat) latency of
2804  * a power state allows the latter to be used as an APST transition target.
2805  * It does so by comparing the latency to the primary and secondary latency
2806  * tolerances defined by module params. If there's a match, the corresponding
2807  * timeout value is returned and the matching tolerance index (1 or 2) is
2808  * reported.
2809  */
2810 static bool nvme_apst_get_transition_time(u64 total_latency,
2811 		u64 *transition_time, unsigned *last_index)
2812 {
2813 	if (total_latency <= apst_primary_latency_tol_us) {
2814 		if (*last_index == 1)
2815 			return false;
2816 		*last_index = 1;
2817 		*transition_time = apst_primary_timeout_ms;
2818 		return true;
2819 	}
2820 	if (apst_secondary_timeout_ms &&
2821 		total_latency <= apst_secondary_latency_tol_us) {
2822 		if (*last_index <= 2)
2823 			return false;
2824 		*last_index = 2;
2825 		*transition_time = apst_secondary_timeout_ms;
2826 		return true;
2827 	}
2828 	return false;
2829 }
2830 
2831 /*
2832  * APST (Autonomous Power State Transition) lets us program a table of power
2833  * state transitions that the controller will perform automatically.
2834  *
2835  * Depending on module params, one of the two supported techniques will be used:
2836  *
2837  * - If the parameters provide explicit timeouts and tolerances, they will be
2838  *   used to build a table with up to 2 non-operational states to transition to.
2839  *   The default parameter values were selected based on the values used by
2840  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2841  *   regeneration of the APST table in the event of switching between external
2842  *   and battery power, the timeouts and tolerances reflect a compromise
2843  *   between values used by Microsoft for AC and battery scenarios.
2844  * - If not, we'll configure the table with a simple heuristic: we are willing
2845  *   to spend at most 2% of the time transitioning between power states.
2846  *   Therefore, when running in any given state, we will enter the next
2847  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2848  *   microseconds, as long as that state's exit latency is under the requested
2849  *   maximum latency.
2850  *
2851  * We will not autonomously enter any non-operational state for which the total
2852  * latency exceeds ps_max_latency_us.
2853  *
2854  * Users can set ps_max_latency_us to zero to turn off APST.
2855  */
2856 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2857 {
2858 	struct nvme_feat_auto_pst *table;
2859 	unsigned apste = 0;
2860 	u64 max_lat_us = 0;
2861 	__le64 target = 0;
2862 	int max_ps = -1;
2863 	int state;
2864 	int ret;
2865 	unsigned last_lt_index = UINT_MAX;
2866 
2867 	/*
2868 	 * If APST isn't supported or if we haven't been initialized yet,
2869 	 * then don't do anything.
2870 	 */
2871 	if (!ctrl->apsta)
2872 		return 0;
2873 
2874 	if (ctrl->npss > 31) {
2875 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2876 		return 0;
2877 	}
2878 
2879 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2880 	if (!table)
2881 		return 0;
2882 
2883 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2884 		/* Turn off APST. */
2885 		dev_dbg(ctrl->device, "APST disabled\n");
2886 		goto done;
2887 	}
2888 
2889 	/*
2890 	 * Walk through all states from lowest- to highest-power.
2891 	 * According to the spec, lower-numbered states use more power.  NPSS,
2892 	 * despite the name, is the index of the lowest-power state, not the
2893 	 * number of states.
2894 	 */
2895 	for (state = (int)ctrl->npss; state >= 0; state--) {
2896 		u64 total_latency_us, exit_latency_us, transition_ms;
2897 
2898 		if (target)
2899 			table->entries[state] = target;
2900 
2901 		/*
2902 		 * Don't allow transitions to the deepest state if it's quirked
2903 		 * off.
2904 		 */
2905 		if (state == ctrl->npss &&
2906 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2907 			continue;
2908 
2909 		/*
2910 		 * Is this state a useful non-operational state for higher-power
2911 		 * states to autonomously transition to?
2912 		 */
2913 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2914 			continue;
2915 
2916 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2917 		if (exit_latency_us > ctrl->ps_max_latency_us)
2918 			continue;
2919 
2920 		total_latency_us = exit_latency_us +
2921 			le32_to_cpu(ctrl->psd[state].entry_lat);
2922 
2923 		/*
2924 		 * This state is good. It can be used as the APST idle target
2925 		 * for higher power states.
2926 		 */
2927 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2928 			if (!nvme_apst_get_transition_time(total_latency_us,
2929 					&transition_ms, &last_lt_index))
2930 				continue;
2931 		} else {
2932 			transition_ms = total_latency_us + 19;
2933 			do_div(transition_ms, 20);
2934 			if (transition_ms > (1 << 24) - 1)
2935 				transition_ms = (1 << 24) - 1;
2936 		}
2937 
2938 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2939 		if (max_ps == -1)
2940 			max_ps = state;
2941 		if (total_latency_us > max_lat_us)
2942 			max_lat_us = total_latency_us;
2943 	}
2944 
2945 	if (max_ps == -1)
2946 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2947 	else
2948 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2949 			max_ps, max_lat_us, (int)sizeof(*table), table);
2950 	apste = 1;
2951 
2952 done:
2953 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2954 				table, sizeof(*table), NULL);
2955 	if (ret)
2956 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2957 	kfree(table);
2958 	return ret;
2959 }
2960 
2961 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2962 {
2963 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2964 	u64 latency;
2965 
2966 	switch (val) {
2967 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2968 	case PM_QOS_LATENCY_ANY:
2969 		latency = U64_MAX;
2970 		break;
2971 
2972 	default:
2973 		latency = val;
2974 	}
2975 
2976 	if (ctrl->ps_max_latency_us != latency) {
2977 		ctrl->ps_max_latency_us = latency;
2978 		if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2979 			nvme_configure_apst(ctrl);
2980 	}
2981 }
2982 
2983 struct nvme_core_quirk_entry {
2984 	/*
2985 	 * NVMe model and firmware strings are padded with spaces.  For
2986 	 * simplicity, strings in the quirk table are padded with NULLs
2987 	 * instead.
2988 	 */
2989 	u16 vid;
2990 	const char *mn;
2991 	const char *fr;
2992 	unsigned long quirks;
2993 };
2994 
2995 static const struct nvme_core_quirk_entry core_quirks[] = {
2996 	{
2997 		/*
2998 		 * This Toshiba device seems to die using any APST states.  See:
2999 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
3000 		 */
3001 		.vid = 0x1179,
3002 		.mn = "THNSF5256GPUK TOSHIBA",
3003 		.quirks = NVME_QUIRK_NO_APST,
3004 	},
3005 	{
3006 		/*
3007 		 * This LiteON CL1-3D*-Q11 firmware version has a race
3008 		 * condition associated with actions related to suspend to idle
3009 		 * LiteON has resolved the problem in future firmware
3010 		 */
3011 		.vid = 0x14a4,
3012 		.fr = "22301111",
3013 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
3014 	},
3015 	{
3016 		/*
3017 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
3018 		 * aborts I/O during any load, but more easily reproducible
3019 		 * with discards (fstrim).
3020 		 *
3021 		 * The device is left in a state where it is also not possible
3022 		 * to use "nvme set-feature" to disable APST, but booting with
3023 		 * nvme_core.default_ps_max_latency=0 works.
3024 		 */
3025 		.vid = 0x1e0f,
3026 		.mn = "KCD6XVUL6T40",
3027 		.quirks = NVME_QUIRK_NO_APST,
3028 	},
3029 	{
3030 		/*
3031 		 * The external Samsung X5 SSD fails initialization without a
3032 		 * delay before checking if it is ready and has a whole set of
3033 		 * other problems.  To make this even more interesting, it
3034 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
3035 		 * does not need or want these quirks.
3036 		 */
3037 		.vid = 0x144d,
3038 		.mn = "Samsung Portable SSD X5",
3039 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
3040 			  NVME_QUIRK_NO_DEEPEST_PS |
3041 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
3042 	}
3043 };
3044 
3045 /* match is null-terminated but idstr is space-padded. */
3046 static bool string_matches(const char *idstr, const char *match, size_t len)
3047 {
3048 	size_t matchlen;
3049 
3050 	if (!match)
3051 		return true;
3052 
3053 	matchlen = strlen(match);
3054 	WARN_ON_ONCE(matchlen > len);
3055 
3056 	if (memcmp(idstr, match, matchlen))
3057 		return false;
3058 
3059 	for (; matchlen < len; matchlen++)
3060 		if (idstr[matchlen] != ' ')
3061 			return false;
3062 
3063 	return true;
3064 }
3065 
3066 static bool quirk_matches(const struct nvme_id_ctrl *id,
3067 			  const struct nvme_core_quirk_entry *q)
3068 {
3069 	return q->vid == le16_to_cpu(id->vid) &&
3070 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
3071 		string_matches(id->fr, q->fr, sizeof(id->fr));
3072 }
3073 
3074 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
3075 		struct nvme_id_ctrl *id)
3076 {
3077 	size_t nqnlen;
3078 	int off;
3079 
3080 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
3081 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
3082 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
3083 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
3084 			return;
3085 		}
3086 
3087 		if (ctrl->vs >= NVME_VS(1, 2, 1))
3088 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
3089 	}
3090 
3091 	/*
3092 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
3093 	 * Base Specification 2.0.  It is slightly different from the format
3094 	 * specified there due to historic reasons, and we can't change it now.
3095 	 */
3096 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
3097 			"nqn.2014.08.org.nvmexpress:%04x%04x",
3098 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
3099 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
3100 	off += sizeof(id->sn);
3101 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
3102 	off += sizeof(id->mn);
3103 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
3104 }
3105 
3106 static void nvme_release_subsystem(struct device *dev)
3107 {
3108 	struct nvme_subsystem *subsys =
3109 		container_of(dev, struct nvme_subsystem, dev);
3110 
3111 	if (subsys->instance >= 0)
3112 		ida_free(&nvme_instance_ida, subsys->instance);
3113 	kfree(subsys);
3114 }
3115 
3116 static void nvme_destroy_subsystem(struct kref *ref)
3117 {
3118 	struct nvme_subsystem *subsys =
3119 			container_of(ref, struct nvme_subsystem, ref);
3120 
3121 	mutex_lock(&nvme_subsystems_lock);
3122 	list_del(&subsys->entry);
3123 	mutex_unlock(&nvme_subsystems_lock);
3124 
3125 	ida_destroy(&subsys->ns_ida);
3126 	device_del(&subsys->dev);
3127 	put_device(&subsys->dev);
3128 }
3129 
3130 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
3131 {
3132 	kref_put(&subsys->ref, nvme_destroy_subsystem);
3133 }
3134 
3135 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
3136 {
3137 	struct nvme_subsystem *subsys;
3138 
3139 	lockdep_assert_held(&nvme_subsystems_lock);
3140 
3141 	/*
3142 	 * Fail matches for discovery subsystems. This results
3143 	 * in each discovery controller bound to a unique subsystem.
3144 	 * This avoids issues with validating controller values
3145 	 * that can only be true when there is a single unique subsystem.
3146 	 * There may be multiple and completely independent entities
3147 	 * that provide discovery controllers.
3148 	 */
3149 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
3150 		return NULL;
3151 
3152 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
3153 		if (strcmp(subsys->subnqn, subsysnqn))
3154 			continue;
3155 		if (!kref_get_unless_zero(&subsys->ref))
3156 			continue;
3157 		return subsys;
3158 	}
3159 
3160 	return NULL;
3161 }
3162 
3163 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
3164 {
3165 	return ctrl->opts && ctrl->opts->discovery_nqn;
3166 }
3167 
3168 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
3169 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3170 {
3171 	struct nvme_ctrl *tmp;
3172 
3173 	lockdep_assert_held(&nvme_subsystems_lock);
3174 
3175 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
3176 		if (nvme_state_terminal(tmp))
3177 			continue;
3178 
3179 		if (tmp->cntlid == ctrl->cntlid) {
3180 			dev_err(ctrl->device,
3181 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
3182 				ctrl->cntlid, dev_name(tmp->device),
3183 				subsys->subnqn);
3184 			return false;
3185 		}
3186 
3187 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
3188 		    nvme_discovery_ctrl(ctrl))
3189 			continue;
3190 
3191 		dev_err(ctrl->device,
3192 			"Subsystem does not support multiple controllers\n");
3193 		return false;
3194 	}
3195 
3196 	return true;
3197 }
3198 
3199 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3200 {
3201 	struct nvme_subsystem *subsys, *found;
3202 	int ret;
3203 
3204 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
3205 	if (!subsys)
3206 		return -ENOMEM;
3207 
3208 	subsys->instance = -1;
3209 	mutex_init(&subsys->lock);
3210 	kref_init(&subsys->ref);
3211 	INIT_LIST_HEAD(&subsys->ctrls);
3212 	INIT_LIST_HEAD(&subsys->nsheads);
3213 	nvme_init_subnqn(subsys, ctrl, id);
3214 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
3215 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
3216 	subsys->vendor_id = le16_to_cpu(id->vid);
3217 	subsys->cmic = id->cmic;
3218 
3219 	/* Versions prior to 1.4 don't necessarily report a valid type */
3220 	if (id->cntrltype == NVME_CTRL_DISC ||
3221 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
3222 		subsys->subtype = NVME_NQN_DISC;
3223 	else
3224 		subsys->subtype = NVME_NQN_NVME;
3225 
3226 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
3227 		dev_err(ctrl->device,
3228 			"Subsystem %s is not a discovery controller",
3229 			subsys->subnqn);
3230 		kfree(subsys);
3231 		return -EINVAL;
3232 	}
3233 	nvme_mpath_default_iopolicy(subsys);
3234 
3235 	subsys->dev.class = &nvme_subsys_class;
3236 	subsys->dev.release = nvme_release_subsystem;
3237 	subsys->dev.groups = nvme_subsys_attrs_groups;
3238 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
3239 	device_initialize(&subsys->dev);
3240 
3241 	mutex_lock(&nvme_subsystems_lock);
3242 	found = __nvme_find_get_subsystem(subsys->subnqn);
3243 	if (found) {
3244 		put_device(&subsys->dev);
3245 		subsys = found;
3246 
3247 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
3248 			ret = -EINVAL;
3249 			goto out_put_subsystem;
3250 		}
3251 	} else {
3252 		ret = device_add(&subsys->dev);
3253 		if (ret) {
3254 			dev_err(ctrl->device,
3255 				"failed to register subsystem device.\n");
3256 			put_device(&subsys->dev);
3257 			goto out_unlock;
3258 		}
3259 		ida_init(&subsys->ns_ida);
3260 		list_add_tail(&subsys->entry, &nvme_subsystems);
3261 	}
3262 
3263 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3264 				dev_name(ctrl->device));
3265 	if (ret) {
3266 		dev_err(ctrl->device,
3267 			"failed to create sysfs link from subsystem.\n");
3268 		goto out_put_subsystem;
3269 	}
3270 
3271 	if (!found)
3272 		subsys->instance = ctrl->instance;
3273 	ctrl->subsys = subsys;
3274 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3275 	mutex_unlock(&nvme_subsystems_lock);
3276 	return 0;
3277 
3278 out_put_subsystem:
3279 	nvme_put_subsystem(subsys);
3280 out_unlock:
3281 	mutex_unlock(&nvme_subsystems_lock);
3282 	return ret;
3283 }
3284 
3285 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page,
3286 		u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi)
3287 {
3288 	struct nvme_command c = { };
3289 	u32 dwlen = nvme_bytes_to_numd(size);
3290 
3291 	c.get_log_page.opcode = nvme_admin_get_log_page;
3292 	c.get_log_page.nsid = cpu_to_le32(nsid);
3293 	c.get_log_page.lid = log_page;
3294 	c.get_log_page.lsp = lsp;
3295 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3296 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3297 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3298 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3299 	c.get_log_page.csi = csi;
3300 	c.get_log_page.lsi = cpu_to_le16(lsi);
3301 
3302 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3303 }
3304 
3305 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3306 		void *log, size_t size, u64 offset)
3307 {
3308 	return nvme_get_log_lsi(ctrl, nsid, log_page, lsp, csi, log, size,
3309 			offset, 0);
3310 }
3311 
3312 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3313 				struct nvme_effects_log **log)
3314 {
3315 	struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi);
3316 	int ret;
3317 
3318 	if (cel)
3319 		goto out;
3320 
3321 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3322 	if (!cel)
3323 		return -ENOMEM;
3324 
3325 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3326 			cel, sizeof(*cel), 0);
3327 	if (ret) {
3328 		kfree(cel);
3329 		return ret;
3330 	}
3331 
3332 	old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3333 	if (xa_is_err(old)) {
3334 		kfree(cel);
3335 		return xa_err(old);
3336 	}
3337 out:
3338 	*log = cel;
3339 	return 0;
3340 }
3341 
3342 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3343 {
3344 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3345 
3346 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
3347 		return UINT_MAX;
3348 	return val;
3349 }
3350 
3351 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3352 {
3353 	struct nvme_command c = { };
3354 	struct nvme_id_ctrl_nvm *id;
3355 	int ret;
3356 
3357 	/*
3358 	 * Even though NVMe spec explicitly states that MDTS is not applicable
3359 	 * to the write-zeroes, we are cautious and limit the size to the
3360 	 * controllers max_hw_sectors value, which is based on the MDTS field
3361 	 * and possibly other limiting factors.
3362 	 */
3363 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3364 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3365 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3366 	else
3367 		ctrl->max_zeroes_sectors = 0;
3368 
3369 	if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3370 	    !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) ||
3371 	    test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3372 		return 0;
3373 
3374 	id = kzalloc(sizeof(*id), GFP_KERNEL);
3375 	if (!id)
3376 		return -ENOMEM;
3377 
3378 	c.identify.opcode = nvme_admin_identify;
3379 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
3380 	c.identify.csi = NVME_CSI_NVM;
3381 
3382 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3383 	if (ret)
3384 		goto free_data;
3385 
3386 	ctrl->dmrl = id->dmrl;
3387 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3388 	if (id->wzsl)
3389 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3390 
3391 free_data:
3392 	if (ret > 0)
3393 		set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3394 	kfree(id);
3395 	return ret;
3396 }
3397 
3398 static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
3399 		u8 csi, struct nvme_effects_log **log)
3400 {
3401 	struct nvme_effects_log *effects, *old;
3402 
3403 	effects = kzalloc(sizeof(*effects), GFP_KERNEL);
3404 	if (!effects)
3405 		return -ENOMEM;
3406 
3407 	old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL);
3408 	if (xa_is_err(old)) {
3409 		kfree(effects);
3410 		return xa_err(old);
3411 	}
3412 
3413 	*log = effects;
3414 	return 0;
3415 }
3416 
3417 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3418 {
3419 	struct nvme_effects_log	*log = ctrl->effects;
3420 
3421 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3422 						NVME_CMD_EFFECTS_NCC |
3423 						NVME_CMD_EFFECTS_CSE_MASK);
3424 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3425 						NVME_CMD_EFFECTS_CSE_MASK);
3426 
3427 	/*
3428 	 * The spec says the result of a security receive command depends on
3429 	 * the previous security send command. As such, many vendors log this
3430 	 * command as one to submitted only when no other commands to the same
3431 	 * namespace are outstanding. The intention is to tell the host to
3432 	 * prevent mixing security send and receive.
3433 	 *
3434 	 * This driver can only enforce such exclusive access against IO
3435 	 * queues, though. We are not readily able to enforce such a rule for
3436 	 * two commands to the admin queue, which is the only queue that
3437 	 * matters for this command.
3438 	 *
3439 	 * Rather than blindly freezing the IO queues for this effect that
3440 	 * doesn't even apply to IO, mask it off.
3441 	 */
3442 	log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3443 
3444 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3445 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3446 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3447 }
3448 
3449 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3450 {
3451 	int ret = 0;
3452 
3453 	if (ctrl->effects)
3454 		return 0;
3455 
3456 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3457 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3458 		if (ret < 0)
3459 			return ret;
3460 	}
3461 
3462 	if (!ctrl->effects) {
3463 		ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3464 		if (ret < 0)
3465 			return ret;
3466 	}
3467 
3468 	nvme_init_known_nvm_effects(ctrl);
3469 	return 0;
3470 }
3471 
3472 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3473 {
3474 	/*
3475 	 * In fabrics we need to verify the cntlid matches the
3476 	 * admin connect
3477 	 */
3478 	if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3479 		dev_err(ctrl->device,
3480 			"Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3481 			ctrl->cntlid, le16_to_cpu(id->cntlid));
3482 		return -EINVAL;
3483 	}
3484 
3485 	if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3486 		dev_err(ctrl->device,
3487 			"keep-alive support is mandatory for fabrics\n");
3488 		return -EINVAL;
3489 	}
3490 
3491 	if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3492 		dev_err(ctrl->device,
3493 			"I/O queue command capsule supported size %d < 4\n",
3494 			ctrl->ioccsz);
3495 		return -EINVAL;
3496 	}
3497 
3498 	if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3499 		dev_err(ctrl->device,
3500 			"I/O queue response capsule supported size %d < 1\n",
3501 			ctrl->iorcsz);
3502 		return -EINVAL;
3503 	}
3504 
3505 	if (!ctrl->maxcmd) {
3506 		dev_warn(ctrl->device,
3507 			"Firmware bug: maximum outstanding commands is 0\n");
3508 		ctrl->maxcmd = ctrl->sqsize + 1;
3509 	}
3510 
3511 	return 0;
3512 }
3513 
3514 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3515 {
3516 	struct queue_limits lim;
3517 	struct nvme_id_ctrl *id;
3518 	u32 max_hw_sectors;
3519 	bool prev_apst_enabled;
3520 	int ret;
3521 
3522 	ret = nvme_identify_ctrl(ctrl, &id);
3523 	if (ret) {
3524 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3525 		return -EIO;
3526 	}
3527 
3528 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3529 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3530 
3531 	if (!ctrl->identified) {
3532 		unsigned int i;
3533 
3534 		/*
3535 		 * Check for quirks.  Quirk can depend on firmware version,
3536 		 * so, in principle, the set of quirks present can change
3537 		 * across a reset.  As a possible future enhancement, we
3538 		 * could re-scan for quirks every time we reinitialize
3539 		 * the device, but we'd have to make sure that the driver
3540 		 * behaves intelligently if the quirks change.
3541 		 */
3542 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3543 			if (quirk_matches(id, &core_quirks[i]))
3544 				ctrl->quirks |= core_quirks[i].quirks;
3545 		}
3546 
3547 		ret = nvme_init_subsystem(ctrl, id);
3548 		if (ret)
3549 			goto out_free;
3550 
3551 		ret = nvme_init_effects(ctrl, id);
3552 		if (ret)
3553 			goto out_free;
3554 	}
3555 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3556 	       sizeof(ctrl->subsys->firmware_rev));
3557 
3558 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3559 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3560 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3561 	}
3562 
3563 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3564 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3565 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3566 
3567 	ctrl->oacs = le16_to_cpu(id->oacs);
3568 	ctrl->oncs = le16_to_cpu(id->oncs);
3569 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3570 	ctrl->oaes = le32_to_cpu(id->oaes);
3571 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3572 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3573 
3574 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3575 	ctrl->vwc = id->vwc;
3576 	if (id->mdts)
3577 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3578 	else
3579 		max_hw_sectors = UINT_MAX;
3580 	ctrl->max_hw_sectors =
3581 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3582 
3583 	lim = queue_limits_start_update(ctrl->admin_q);
3584 	nvme_set_ctrl_limits(ctrl, &lim);
3585 	ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3586 	if (ret)
3587 		goto out_free;
3588 
3589 	ctrl->sgls = le32_to_cpu(id->sgls);
3590 	ctrl->kas = le16_to_cpu(id->kas);
3591 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3592 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3593 
3594 	ctrl->cntrltype = id->cntrltype;
3595 	ctrl->dctype = id->dctype;
3596 
3597 	if (id->rtd3e) {
3598 		/* us -> s */
3599 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3600 
3601 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3602 						 shutdown_timeout, 60);
3603 
3604 		if (ctrl->shutdown_timeout != shutdown_timeout)
3605 			dev_info(ctrl->device,
3606 				 "D3 entry latency set to %u seconds\n",
3607 				 ctrl->shutdown_timeout);
3608 	} else
3609 		ctrl->shutdown_timeout = shutdown_timeout;
3610 
3611 	ctrl->npss = id->npss;
3612 	ctrl->apsta = id->apsta;
3613 	prev_apst_enabled = ctrl->apst_enabled;
3614 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3615 		if (force_apst && id->apsta) {
3616 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3617 			ctrl->apst_enabled = true;
3618 		} else {
3619 			ctrl->apst_enabled = false;
3620 		}
3621 	} else {
3622 		ctrl->apst_enabled = id->apsta;
3623 	}
3624 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3625 
3626 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3627 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3628 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3629 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3630 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3631 
3632 		ret = nvme_check_ctrl_fabric_info(ctrl, id);
3633 		if (ret)
3634 			goto out_free;
3635 	} else {
3636 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3637 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3638 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3639 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3640 	}
3641 
3642 	ret = nvme_mpath_init_identify(ctrl, id);
3643 	if (ret < 0)
3644 		goto out_free;
3645 
3646 	if (ctrl->apst_enabled && !prev_apst_enabled)
3647 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3648 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3649 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3650 	ctrl->awupf = le16_to_cpu(id->awupf);
3651 out_free:
3652 	kfree(id);
3653 	return ret;
3654 }
3655 
3656 /*
3657  * Initialize the cached copies of the Identify data and various controller
3658  * register in our nvme_ctrl structure.  This should be called as soon as
3659  * the admin queue is fully up and running.
3660  */
3661 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3662 {
3663 	int ret;
3664 
3665 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3666 	if (ret) {
3667 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3668 		return ret;
3669 	}
3670 
3671 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3672 
3673 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3674 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3675 
3676 	ret = nvme_init_identify(ctrl);
3677 	if (ret)
3678 		return ret;
3679 
3680 	ret = nvme_configure_apst(ctrl);
3681 	if (ret < 0)
3682 		return ret;
3683 
3684 	ret = nvme_configure_timestamp(ctrl);
3685 	if (ret < 0)
3686 		return ret;
3687 
3688 	ret = nvme_configure_host_options(ctrl);
3689 	if (ret < 0)
3690 		return ret;
3691 
3692 	nvme_configure_opal(ctrl, was_suspended);
3693 
3694 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3695 		/*
3696 		 * Do not return errors unless we are in a controller reset,
3697 		 * the controller works perfectly fine without hwmon.
3698 		 */
3699 		ret = nvme_hwmon_init(ctrl);
3700 		if (ret == -EINTR)
3701 			return ret;
3702 	}
3703 
3704 	clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3705 	ctrl->identified = true;
3706 
3707 	nvme_start_keep_alive(ctrl);
3708 
3709 	return 0;
3710 }
3711 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3712 
3713 static int nvme_dev_open(struct inode *inode, struct file *file)
3714 {
3715 	struct nvme_ctrl *ctrl =
3716 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3717 
3718 	switch (nvme_ctrl_state(ctrl)) {
3719 	case NVME_CTRL_LIVE:
3720 		break;
3721 	default:
3722 		return -EWOULDBLOCK;
3723 	}
3724 
3725 	nvme_get_ctrl(ctrl);
3726 	if (!try_module_get(ctrl->ops->module)) {
3727 		nvme_put_ctrl(ctrl);
3728 		return -EINVAL;
3729 	}
3730 
3731 	file->private_data = ctrl;
3732 	return 0;
3733 }
3734 
3735 static int nvme_dev_release(struct inode *inode, struct file *file)
3736 {
3737 	struct nvme_ctrl *ctrl =
3738 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3739 
3740 	module_put(ctrl->ops->module);
3741 	nvme_put_ctrl(ctrl);
3742 	return 0;
3743 }
3744 
3745 static const struct file_operations nvme_dev_fops = {
3746 	.owner		= THIS_MODULE,
3747 	.open		= nvme_dev_open,
3748 	.release	= nvme_dev_release,
3749 	.unlocked_ioctl	= nvme_dev_ioctl,
3750 	.compat_ioctl	= compat_ptr_ioctl,
3751 	.uring_cmd	= nvme_dev_uring_cmd,
3752 };
3753 
3754 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3755 		unsigned nsid)
3756 {
3757 	struct nvme_ns_head *h;
3758 
3759 	lockdep_assert_held(&ctrl->subsys->lock);
3760 
3761 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3762 		/*
3763 		 * Private namespaces can share NSIDs under some conditions.
3764 		 * In that case we can't use the same ns_head for namespaces
3765 		 * with the same NSID.
3766 		 */
3767 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3768 			continue;
3769 		if (nvme_tryget_ns_head(h))
3770 			return h;
3771 	}
3772 
3773 	return NULL;
3774 }
3775 
3776 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3777 		struct nvme_ns_ids *ids)
3778 {
3779 	bool has_uuid = !uuid_is_null(&ids->uuid);
3780 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3781 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3782 	struct nvme_ns_head *h;
3783 
3784 	lockdep_assert_held(&subsys->lock);
3785 
3786 	list_for_each_entry(h, &subsys->nsheads, entry) {
3787 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3788 			return -EINVAL;
3789 		if (has_nguid &&
3790 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3791 			return -EINVAL;
3792 		if (has_eui64 &&
3793 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3794 			return -EINVAL;
3795 	}
3796 
3797 	return 0;
3798 }
3799 
3800 static void nvme_cdev_rel(struct device *dev)
3801 {
3802 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3803 }
3804 
3805 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3806 {
3807 	cdev_device_del(cdev, cdev_device);
3808 	put_device(cdev_device);
3809 }
3810 
3811 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3812 		const struct file_operations *fops, struct module *owner)
3813 {
3814 	int minor, ret;
3815 
3816 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3817 	if (minor < 0)
3818 		return minor;
3819 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3820 	cdev_device->class = &nvme_ns_chr_class;
3821 	cdev_device->release = nvme_cdev_rel;
3822 	device_initialize(cdev_device);
3823 	cdev_init(cdev, fops);
3824 	cdev->owner = owner;
3825 	ret = cdev_device_add(cdev, cdev_device);
3826 	if (ret)
3827 		put_device(cdev_device);
3828 
3829 	return ret;
3830 }
3831 
3832 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3833 {
3834 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3835 }
3836 
3837 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3838 {
3839 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3840 	return 0;
3841 }
3842 
3843 static const struct file_operations nvme_ns_chr_fops = {
3844 	.owner		= THIS_MODULE,
3845 	.open		= nvme_ns_chr_open,
3846 	.release	= nvme_ns_chr_release,
3847 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
3848 	.compat_ioctl	= compat_ptr_ioctl,
3849 	.uring_cmd	= nvme_ns_chr_uring_cmd,
3850 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3851 };
3852 
3853 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3854 {
3855 	int ret;
3856 
3857 	ns->cdev_device.parent = ns->ctrl->device;
3858 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3859 			   ns->ctrl->instance, ns->head->instance);
3860 	if (ret)
3861 		return ret;
3862 
3863 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3864 			     ns->ctrl->ops->module);
3865 }
3866 
3867 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3868 		struct nvme_ns_info *info)
3869 {
3870 	struct nvme_ns_head *head;
3871 	size_t size = sizeof(*head);
3872 	int ret = -ENOMEM;
3873 
3874 #ifdef CONFIG_NVME_MULTIPATH
3875 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
3876 #endif
3877 
3878 	head = kzalloc(size, GFP_KERNEL);
3879 	if (!head)
3880 		goto out;
3881 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3882 	if (ret < 0)
3883 		goto out_free_head;
3884 	head->instance = ret;
3885 	INIT_LIST_HEAD(&head->list);
3886 	ret = init_srcu_struct(&head->srcu);
3887 	if (ret)
3888 		goto out_ida_remove;
3889 	head->subsys = ctrl->subsys;
3890 	head->ns_id = info->nsid;
3891 	head->ids = info->ids;
3892 	head->shared = info->is_shared;
3893 	head->rotational = info->is_rotational;
3894 	ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3895 	ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3896 	kref_init(&head->ref);
3897 
3898 	if (head->ids.csi) {
3899 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3900 		if (ret)
3901 			goto out_cleanup_srcu;
3902 	} else
3903 		head->effects = ctrl->effects;
3904 
3905 	ret = nvme_mpath_alloc_disk(ctrl, head);
3906 	if (ret)
3907 		goto out_cleanup_srcu;
3908 
3909 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3910 
3911 	kref_get(&ctrl->subsys->ref);
3912 
3913 	return head;
3914 out_cleanup_srcu:
3915 	cleanup_srcu_struct(&head->srcu);
3916 out_ida_remove:
3917 	ida_free(&ctrl->subsys->ns_ida, head->instance);
3918 out_free_head:
3919 	kfree(head);
3920 out:
3921 	if (ret > 0)
3922 		ret = blk_status_to_errno(nvme_error_status(ret));
3923 	return ERR_PTR(ret);
3924 }
3925 
3926 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3927 		struct nvme_ns_ids *ids)
3928 {
3929 	struct nvme_subsystem *s;
3930 	int ret = 0;
3931 
3932 	/*
3933 	 * Note that this check is racy as we try to avoid holding the global
3934 	 * lock over the whole ns_head creation.  But it is only intended as
3935 	 * a sanity check anyway.
3936 	 */
3937 	mutex_lock(&nvme_subsystems_lock);
3938 	list_for_each_entry(s, &nvme_subsystems, entry) {
3939 		if (s == this)
3940 			continue;
3941 		mutex_lock(&s->lock);
3942 		ret = nvme_subsys_check_duplicate_ids(s, ids);
3943 		mutex_unlock(&s->lock);
3944 		if (ret)
3945 			break;
3946 	}
3947 	mutex_unlock(&nvme_subsystems_lock);
3948 
3949 	return ret;
3950 }
3951 
3952 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3953 {
3954 	struct nvme_ctrl *ctrl = ns->ctrl;
3955 	struct nvme_ns_head *head = NULL;
3956 	int ret;
3957 
3958 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3959 	if (ret) {
3960 		/*
3961 		 * We've found two different namespaces on two different
3962 		 * subsystems that report the same ID.  This is pretty nasty
3963 		 * for anything that actually requires unique device
3964 		 * identification.  In the kernel we need this for multipathing,
3965 		 * and in user space the /dev/disk/by-id/ links rely on it.
3966 		 *
3967 		 * If the device also claims to be multi-path capable back off
3968 		 * here now and refuse the probe the second device as this is a
3969 		 * recipe for data corruption.  If not this is probably a
3970 		 * cheap consumer device if on the PCIe bus, so let the user
3971 		 * proceed and use the shiny toy, but warn that with changing
3972 		 * probing order (which due to our async probing could just be
3973 		 * device taking longer to startup) the other device could show
3974 		 * up at any time.
3975 		 */
3976 		nvme_print_device_info(ctrl);
3977 		if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3978 		    ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3979 		     info->is_shared)) {
3980 			dev_err(ctrl->device,
3981 				"ignoring nsid %d because of duplicate IDs\n",
3982 				info->nsid);
3983 			return ret;
3984 		}
3985 
3986 		dev_err(ctrl->device,
3987 			"clearing duplicate IDs for nsid %d\n", info->nsid);
3988 		dev_err(ctrl->device,
3989 			"use of /dev/disk/by-id/ may cause data corruption\n");
3990 		memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3991 		memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3992 		memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3993 		ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3994 	}
3995 
3996 	mutex_lock(&ctrl->subsys->lock);
3997 	head = nvme_find_ns_head(ctrl, info->nsid);
3998 	if (!head) {
3999 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
4000 		if (ret) {
4001 			dev_err(ctrl->device,
4002 				"duplicate IDs in subsystem for nsid %d\n",
4003 				info->nsid);
4004 			goto out_unlock;
4005 		}
4006 		head = nvme_alloc_ns_head(ctrl, info);
4007 		if (IS_ERR(head)) {
4008 			ret = PTR_ERR(head);
4009 			goto out_unlock;
4010 		}
4011 	} else {
4012 		ret = -EINVAL;
4013 		if ((!info->is_shared || !head->shared) &&
4014 		    !list_empty(&head->list)) {
4015 			dev_err(ctrl->device,
4016 				"Duplicate unshared namespace %d\n",
4017 				info->nsid);
4018 			goto out_put_ns_head;
4019 		}
4020 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
4021 			dev_err(ctrl->device,
4022 				"IDs don't match for shared namespace %d\n",
4023 					info->nsid);
4024 			goto out_put_ns_head;
4025 		}
4026 
4027 		if (!multipath) {
4028 			dev_warn(ctrl->device,
4029 				"Found shared namespace %d, but multipathing not supported.\n",
4030 				info->nsid);
4031 			dev_warn_once(ctrl->device,
4032 				"Shared namespace support requires core_nvme.multipath=Y.\n");
4033 		}
4034 	}
4035 
4036 	list_add_tail_rcu(&ns->siblings, &head->list);
4037 	ns->head = head;
4038 	mutex_unlock(&ctrl->subsys->lock);
4039 	return 0;
4040 
4041 out_put_ns_head:
4042 	nvme_put_ns_head(head);
4043 out_unlock:
4044 	mutex_unlock(&ctrl->subsys->lock);
4045 	return ret;
4046 }
4047 
4048 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4049 {
4050 	struct nvme_ns *ns, *ret = NULL;
4051 	int srcu_idx;
4052 
4053 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4054 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4055 				 srcu_read_lock_held(&ctrl->srcu)) {
4056 		if (ns->head->ns_id == nsid) {
4057 			if (!nvme_get_ns(ns))
4058 				continue;
4059 			ret = ns;
4060 			break;
4061 		}
4062 		if (ns->head->ns_id > nsid)
4063 			break;
4064 	}
4065 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4066 	return ret;
4067 }
4068 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU");
4069 
4070 /*
4071  * Add the namespace to the controller list while keeping the list ordered.
4072  */
4073 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
4074 {
4075 	struct nvme_ns *tmp;
4076 
4077 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
4078 		if (tmp->head->ns_id < ns->head->ns_id) {
4079 			list_add_rcu(&ns->list, &tmp->list);
4080 			return;
4081 		}
4082 	}
4083 	list_add(&ns->list, &ns->ctrl->namespaces);
4084 }
4085 
4086 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
4087 {
4088 	struct queue_limits lim = { };
4089 	struct nvme_ns *ns;
4090 	struct gendisk *disk;
4091 	int node = ctrl->numa_node;
4092 
4093 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
4094 	if (!ns)
4095 		return;
4096 
4097 	if (ctrl->opts && ctrl->opts->data_digest)
4098 		lim.features |= BLK_FEAT_STABLE_WRITES;
4099 	if (ctrl->ops->supports_pci_p2pdma &&
4100 	    ctrl->ops->supports_pci_p2pdma(ctrl))
4101 		lim.features |= BLK_FEAT_PCI_P2PDMA;
4102 
4103 	disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns);
4104 	if (IS_ERR(disk))
4105 		goto out_free_ns;
4106 	disk->fops = &nvme_bdev_ops;
4107 	disk->private_data = ns;
4108 
4109 	ns->disk = disk;
4110 	ns->queue = disk->queue;
4111 	ns->ctrl = ctrl;
4112 	kref_init(&ns->kref);
4113 
4114 	if (nvme_init_ns_head(ns, info))
4115 		goto out_cleanup_disk;
4116 
4117 	/*
4118 	 * If multipathing is enabled, the device name for all disks and not
4119 	 * just those that represent shared namespaces needs to be based on the
4120 	 * subsystem instance.  Using the controller instance for private
4121 	 * namespaces could lead to naming collisions between shared and private
4122 	 * namespaces if they don't use a common numbering scheme.
4123 	 *
4124 	 * If multipathing is not enabled, disk names must use the controller
4125 	 * instance as shared namespaces will show up as multiple block
4126 	 * devices.
4127 	 */
4128 	if (nvme_ns_head_multipath(ns->head)) {
4129 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
4130 			ctrl->instance, ns->head->instance);
4131 		disk->flags |= GENHD_FL_HIDDEN;
4132 	} else if (multipath) {
4133 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
4134 			ns->head->instance);
4135 	} else {
4136 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
4137 			ns->head->instance);
4138 	}
4139 
4140 	if (nvme_update_ns_info(ns, info))
4141 		goto out_unlink_ns;
4142 
4143 	mutex_lock(&ctrl->namespaces_lock);
4144 	/*
4145 	 * Ensure that no namespaces are added to the ctrl list after the queues
4146 	 * are frozen, thereby avoiding a deadlock between scan and reset.
4147 	 */
4148 	if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
4149 		mutex_unlock(&ctrl->namespaces_lock);
4150 		goto out_unlink_ns;
4151 	}
4152 	nvme_ns_add_to_ctrl_list(ns);
4153 	mutex_unlock(&ctrl->namespaces_lock);
4154 	synchronize_srcu(&ctrl->srcu);
4155 	nvme_get_ctrl(ctrl);
4156 
4157 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
4158 		goto out_cleanup_ns_from_list;
4159 
4160 	if (!nvme_ns_head_multipath(ns->head))
4161 		nvme_add_ns_cdev(ns);
4162 
4163 	nvme_mpath_add_disk(ns, info->anagrpid);
4164 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
4165 
4166 	/*
4167 	 * Set ns->disk->device->driver_data to ns so we can access
4168 	 * ns->head->passthru_err_log_enabled in
4169 	 * nvme_io_passthru_err_log_enabled_[store | show]().
4170 	 */
4171 	dev_set_drvdata(disk_to_dev(ns->disk), ns);
4172 
4173 	return;
4174 
4175  out_cleanup_ns_from_list:
4176 	nvme_put_ctrl(ctrl);
4177 	mutex_lock(&ctrl->namespaces_lock);
4178 	list_del_rcu(&ns->list);
4179 	mutex_unlock(&ctrl->namespaces_lock);
4180 	synchronize_srcu(&ctrl->srcu);
4181  out_unlink_ns:
4182 	mutex_lock(&ctrl->subsys->lock);
4183 	list_del_rcu(&ns->siblings);
4184 	if (list_empty(&ns->head->list))
4185 		list_del_init(&ns->head->entry);
4186 	mutex_unlock(&ctrl->subsys->lock);
4187 	nvme_put_ns_head(ns->head);
4188  out_cleanup_disk:
4189 	put_disk(disk);
4190  out_free_ns:
4191 	kfree(ns);
4192 }
4193 
4194 static void nvme_ns_remove(struct nvme_ns *ns)
4195 {
4196 	bool last_path = false;
4197 
4198 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
4199 		return;
4200 
4201 	clear_bit(NVME_NS_READY, &ns->flags);
4202 	set_capacity(ns->disk, 0);
4203 	nvme_fault_inject_fini(&ns->fault_inject);
4204 
4205 	/*
4206 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
4207 	 * this ns going back into current_path.
4208 	 */
4209 	synchronize_srcu(&ns->head->srcu);
4210 
4211 	/* wait for concurrent submissions */
4212 	if (nvme_mpath_clear_current_path(ns))
4213 		synchronize_srcu(&ns->head->srcu);
4214 
4215 	mutex_lock(&ns->ctrl->subsys->lock);
4216 	list_del_rcu(&ns->siblings);
4217 	if (list_empty(&ns->head->list)) {
4218 		if (!nvme_mpath_queue_if_no_path(ns->head))
4219 			list_del_init(&ns->head->entry);
4220 		last_path = true;
4221 	}
4222 	mutex_unlock(&ns->ctrl->subsys->lock);
4223 
4224 	/* guarantee not available in head->list */
4225 	synchronize_srcu(&ns->head->srcu);
4226 
4227 	if (!nvme_ns_head_multipath(ns->head))
4228 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4229 
4230 	nvme_mpath_remove_sysfs_link(ns);
4231 
4232 	del_gendisk(ns->disk);
4233 
4234 	mutex_lock(&ns->ctrl->namespaces_lock);
4235 	list_del_rcu(&ns->list);
4236 	mutex_unlock(&ns->ctrl->namespaces_lock);
4237 	synchronize_srcu(&ns->ctrl->srcu);
4238 
4239 	if (last_path)
4240 		nvme_mpath_remove_disk(ns->head);
4241 	nvme_put_ns(ns);
4242 }
4243 
4244 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4245 {
4246 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4247 
4248 	if (ns) {
4249 		nvme_ns_remove(ns);
4250 		nvme_put_ns(ns);
4251 	}
4252 }
4253 
4254 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4255 {
4256 	int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
4257 
4258 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4259 		dev_err(ns->ctrl->device,
4260 			"identifiers changed for nsid %d\n", ns->head->ns_id);
4261 		goto out;
4262 	}
4263 
4264 	ret = nvme_update_ns_info(ns, info);
4265 out:
4266 	/*
4267 	 * Only remove the namespace if we got a fatal error back from the
4268 	 * device, otherwise ignore the error and just move on.
4269 	 *
4270 	 * TODO: we should probably schedule a delayed retry here.
4271 	 */
4272 	if (ret > 0 && (ret & NVME_STATUS_DNR))
4273 		nvme_ns_remove(ns);
4274 }
4275 
4276 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4277 {
4278 	struct nvme_ns_info info = { .nsid = nsid };
4279 	struct nvme_ns *ns;
4280 	int ret = 1;
4281 
4282 	if (nvme_identify_ns_descs(ctrl, &info))
4283 		return;
4284 
4285 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4286 		dev_warn(ctrl->device,
4287 			"command set not reported for nsid: %d\n", nsid);
4288 		return;
4289 	}
4290 
4291 	/*
4292 	 * If available try to use the Command Set Idependent Identify Namespace
4293 	 * data structure to find all the generic information that is needed to
4294 	 * set up a namespace.  If not fall back to the legacy version.
4295 	 */
4296 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4297 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) ||
4298 	    ctrl->vs >= NVME_VS(2, 0, 0))
4299 		ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4300 	if (ret > 0)
4301 		ret = nvme_ns_info_from_identify(ctrl, &info);
4302 
4303 	if (info.is_removed)
4304 		nvme_ns_remove_by_nsid(ctrl, nsid);
4305 
4306 	/*
4307 	 * Ignore the namespace if it is not ready. We will get an AEN once it
4308 	 * becomes ready and restart the scan.
4309 	 */
4310 	if (ret || !info.is_ready)
4311 		return;
4312 
4313 	ns = nvme_find_get_ns(ctrl, nsid);
4314 	if (ns) {
4315 		nvme_validate_ns(ns, &info);
4316 		nvme_put_ns(ns);
4317 	} else {
4318 		nvme_alloc_ns(ctrl, &info);
4319 	}
4320 }
4321 
4322 /**
4323  * struct async_scan_info - keeps track of controller & NSIDs to scan
4324  * @ctrl:	Controller on which namespaces are being scanned
4325  * @next_nsid:	Index of next NSID to scan in ns_list
4326  * @ns_list:	Pointer to list of NSIDs to scan
4327  *
4328  * Note: There is a single async_scan_info structure shared by all instances
4329  * of nvme_scan_ns_async() scanning a given controller, so the atomic
4330  * operations on next_nsid are critical to ensure each instance scans a unique
4331  * NSID.
4332  */
4333 struct async_scan_info {
4334 	struct nvme_ctrl *ctrl;
4335 	atomic_t next_nsid;
4336 	__le32 *ns_list;
4337 };
4338 
4339 static void nvme_scan_ns_async(void *data, async_cookie_t cookie)
4340 {
4341 	struct async_scan_info *scan_info = data;
4342 	int idx;
4343 	u32 nsid;
4344 
4345 	idx = (u32)atomic_fetch_inc(&scan_info->next_nsid);
4346 	nsid = le32_to_cpu(scan_info->ns_list[idx]);
4347 
4348 	nvme_scan_ns(scan_info->ctrl, nsid);
4349 }
4350 
4351 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4352 					unsigned nsid)
4353 {
4354 	struct nvme_ns *ns, *next;
4355 	LIST_HEAD(rm_list);
4356 
4357 	mutex_lock(&ctrl->namespaces_lock);
4358 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4359 		if (ns->head->ns_id > nsid) {
4360 			list_del_rcu(&ns->list);
4361 			synchronize_srcu(&ctrl->srcu);
4362 			list_add_tail_rcu(&ns->list, &rm_list);
4363 		}
4364 	}
4365 	mutex_unlock(&ctrl->namespaces_lock);
4366 
4367 	list_for_each_entry_safe(ns, next, &rm_list, list)
4368 		nvme_ns_remove(ns);
4369 }
4370 
4371 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4372 {
4373 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4374 	__le32 *ns_list;
4375 	u32 prev = 0;
4376 	int ret = 0, i;
4377 	ASYNC_DOMAIN(domain);
4378 	struct async_scan_info scan_info;
4379 
4380 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4381 	if (!ns_list)
4382 		return -ENOMEM;
4383 
4384 	scan_info.ctrl = ctrl;
4385 	scan_info.ns_list = ns_list;
4386 	for (;;) {
4387 		struct nvme_command cmd = {
4388 			.identify.opcode	= nvme_admin_identify,
4389 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
4390 			.identify.nsid		= cpu_to_le32(prev),
4391 		};
4392 
4393 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4394 					    NVME_IDENTIFY_DATA_SIZE);
4395 		if (ret) {
4396 			dev_warn(ctrl->device,
4397 				"Identify NS List failed (status=0x%x)\n", ret);
4398 			goto free;
4399 		}
4400 
4401 		atomic_set(&scan_info.next_nsid, 0);
4402 		for (i = 0; i < nr_entries; i++) {
4403 			u32 nsid = le32_to_cpu(ns_list[i]);
4404 
4405 			if (!nsid)	/* end of the list? */
4406 				goto out;
4407 			async_schedule_domain(nvme_scan_ns_async, &scan_info,
4408 						&domain);
4409 			while (++prev < nsid)
4410 				nvme_ns_remove_by_nsid(ctrl, prev);
4411 		}
4412 		async_synchronize_full_domain(&domain);
4413 	}
4414  out:
4415 	nvme_remove_invalid_namespaces(ctrl, prev);
4416  free:
4417 	async_synchronize_full_domain(&domain);
4418 	kfree(ns_list);
4419 	return ret;
4420 }
4421 
4422 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4423 {
4424 	struct nvme_id_ctrl *id;
4425 	u32 nn, i;
4426 
4427 	if (nvme_identify_ctrl(ctrl, &id))
4428 		return;
4429 	nn = le32_to_cpu(id->nn);
4430 	kfree(id);
4431 
4432 	for (i = 1; i <= nn; i++)
4433 		nvme_scan_ns(ctrl, i);
4434 
4435 	nvme_remove_invalid_namespaces(ctrl, nn);
4436 }
4437 
4438 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4439 {
4440 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4441 	__le32 *log;
4442 	int error;
4443 
4444 	log = kzalloc(log_size, GFP_KERNEL);
4445 	if (!log)
4446 		return;
4447 
4448 	/*
4449 	 * We need to read the log to clear the AEN, but we don't want to rely
4450 	 * on it for the changed namespace information as userspace could have
4451 	 * raced with us in reading the log page, which could cause us to miss
4452 	 * updates.
4453 	 */
4454 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4455 			NVME_CSI_NVM, log, log_size, 0);
4456 	if (error)
4457 		dev_warn(ctrl->device,
4458 			"reading changed ns log failed: %d\n", error);
4459 
4460 	kfree(log);
4461 }
4462 
4463 static void nvme_scan_work(struct work_struct *work)
4464 {
4465 	struct nvme_ctrl *ctrl =
4466 		container_of(work, struct nvme_ctrl, scan_work);
4467 	int ret;
4468 
4469 	/* No tagset on a live ctrl means IO queues could not created */
4470 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4471 		return;
4472 
4473 	/*
4474 	 * Identify controller limits can change at controller reset due to
4475 	 * new firmware download, even though it is not common we cannot ignore
4476 	 * such scenario. Controller's non-mdts limits are reported in the unit
4477 	 * of logical blocks that is dependent on the format of attached
4478 	 * namespace. Hence re-read the limits at the time of ns allocation.
4479 	 */
4480 	ret = nvme_init_non_mdts_limits(ctrl);
4481 	if (ret < 0) {
4482 		dev_warn(ctrl->device,
4483 			"reading non-mdts-limits failed: %d\n", ret);
4484 		return;
4485 	}
4486 
4487 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4488 		dev_info(ctrl->device, "rescanning namespaces.\n");
4489 		nvme_clear_changed_ns_log(ctrl);
4490 	}
4491 
4492 	mutex_lock(&ctrl->scan_lock);
4493 	if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) {
4494 		nvme_scan_ns_sequential(ctrl);
4495 	} else {
4496 		/*
4497 		 * Fall back to sequential scan if DNR is set to handle broken
4498 		 * devices which should support Identify NS List (as per the VS
4499 		 * they report) but don't actually support it.
4500 		 */
4501 		ret = nvme_scan_ns_list(ctrl);
4502 		if (ret > 0 && ret & NVME_STATUS_DNR)
4503 			nvme_scan_ns_sequential(ctrl);
4504 	}
4505 	mutex_unlock(&ctrl->scan_lock);
4506 
4507 	/* Requeue if we have missed AENs */
4508 	if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4509 		nvme_queue_scan(ctrl);
4510 #ifdef CONFIG_NVME_MULTIPATH
4511 	else if (ctrl->ana_log_buf)
4512 		/* Re-read the ANA log page to not miss updates */
4513 		queue_work(nvme_wq, &ctrl->ana_work);
4514 #endif
4515 }
4516 
4517 /*
4518  * This function iterates the namespace list unlocked to allow recovery from
4519  * controller failure. It is up to the caller to ensure the namespace list is
4520  * not modified by scan work while this function is executing.
4521  */
4522 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4523 {
4524 	struct nvme_ns *ns, *next;
4525 	LIST_HEAD(ns_list);
4526 
4527 	/*
4528 	 * make sure to requeue I/O to all namespaces as these
4529 	 * might result from the scan itself and must complete
4530 	 * for the scan_work to make progress
4531 	 */
4532 	nvme_mpath_clear_ctrl_paths(ctrl);
4533 
4534 	/*
4535 	 * Unquiesce io queues so any pending IO won't hang, especially
4536 	 * those submitted from scan work
4537 	 */
4538 	nvme_unquiesce_io_queues(ctrl);
4539 
4540 	/* prevent racing with ns scanning */
4541 	flush_work(&ctrl->scan_work);
4542 
4543 	/*
4544 	 * The dead states indicates the controller was not gracefully
4545 	 * disconnected. In that case, we won't be able to flush any data while
4546 	 * removing the namespaces' disks; fail all the queues now to avoid
4547 	 * potentially having to clean up the failed sync later.
4548 	 */
4549 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4550 		nvme_mark_namespaces_dead(ctrl);
4551 
4552 	/* this is a no-op when called from the controller reset handler */
4553 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4554 
4555 	mutex_lock(&ctrl->namespaces_lock);
4556 	list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4557 	mutex_unlock(&ctrl->namespaces_lock);
4558 	synchronize_srcu(&ctrl->srcu);
4559 
4560 	list_for_each_entry_safe(ns, next, &ns_list, list)
4561 		nvme_ns_remove(ns);
4562 }
4563 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4564 
4565 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4566 {
4567 	const struct nvme_ctrl *ctrl =
4568 		container_of(dev, struct nvme_ctrl, ctrl_device);
4569 	struct nvmf_ctrl_options *opts = ctrl->opts;
4570 	int ret;
4571 
4572 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4573 	if (ret)
4574 		return ret;
4575 
4576 	if (opts) {
4577 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4578 		if (ret)
4579 			return ret;
4580 
4581 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4582 				opts->trsvcid ?: "none");
4583 		if (ret)
4584 			return ret;
4585 
4586 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4587 				opts->host_traddr ?: "none");
4588 		if (ret)
4589 			return ret;
4590 
4591 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4592 				opts->host_iface ?: "none");
4593 	}
4594 	return ret;
4595 }
4596 
4597 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4598 {
4599 	char *envp[2] = { envdata, NULL };
4600 
4601 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4602 }
4603 
4604 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4605 {
4606 	char *envp[2] = { NULL, NULL };
4607 	u32 aen_result = ctrl->aen_result;
4608 
4609 	ctrl->aen_result = 0;
4610 	if (!aen_result)
4611 		return;
4612 
4613 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4614 	if (!envp[0])
4615 		return;
4616 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4617 	kfree(envp[0]);
4618 }
4619 
4620 static void nvme_async_event_work(struct work_struct *work)
4621 {
4622 	struct nvme_ctrl *ctrl =
4623 		container_of(work, struct nvme_ctrl, async_event_work);
4624 
4625 	nvme_aen_uevent(ctrl);
4626 
4627 	/*
4628 	 * The transport drivers must guarantee AER submission here is safe by
4629 	 * flushing ctrl async_event_work after changing the controller state
4630 	 * from LIVE and before freeing the admin queue.
4631 	*/
4632 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4633 		ctrl->ops->submit_async_event(ctrl);
4634 }
4635 
4636 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4637 {
4638 
4639 	u32 csts;
4640 
4641 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4642 		return false;
4643 
4644 	if (csts == ~0)
4645 		return false;
4646 
4647 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4648 }
4649 
4650 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4651 {
4652 	struct nvme_fw_slot_info_log *log;
4653 	u8 next_fw_slot, cur_fw_slot;
4654 
4655 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4656 	if (!log)
4657 		return;
4658 
4659 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4660 			 log, sizeof(*log), 0)) {
4661 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4662 		goto out_free_log;
4663 	}
4664 
4665 	cur_fw_slot = log->afi & 0x7;
4666 	next_fw_slot = (log->afi & 0x70) >> 4;
4667 	if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
4668 		dev_info(ctrl->device,
4669 			 "Firmware is activated after next Controller Level Reset\n");
4670 		goto out_free_log;
4671 	}
4672 
4673 	memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
4674 		sizeof(ctrl->subsys->firmware_rev));
4675 
4676 out_free_log:
4677 	kfree(log);
4678 }
4679 
4680 static void nvme_fw_act_work(struct work_struct *work)
4681 {
4682 	struct nvme_ctrl *ctrl = container_of(work,
4683 				struct nvme_ctrl, fw_act_work);
4684 	unsigned long fw_act_timeout;
4685 
4686 	nvme_auth_stop(ctrl);
4687 
4688 	if (ctrl->mtfa)
4689 		fw_act_timeout = jiffies + msecs_to_jiffies(ctrl->mtfa * 100);
4690 	else
4691 		fw_act_timeout = jiffies + secs_to_jiffies(admin_timeout);
4692 
4693 	nvme_quiesce_io_queues(ctrl);
4694 	while (nvme_ctrl_pp_status(ctrl)) {
4695 		if (time_after(jiffies, fw_act_timeout)) {
4696 			dev_warn(ctrl->device,
4697 				"Fw activation timeout, reset controller\n");
4698 			nvme_try_sched_reset(ctrl);
4699 			return;
4700 		}
4701 		msleep(100);
4702 	}
4703 
4704 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) ||
4705 	    !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4706 		return;
4707 
4708 	nvme_unquiesce_io_queues(ctrl);
4709 	/* read FW slot information to clear the AER */
4710 	nvme_get_fw_slot_info(ctrl);
4711 
4712 	queue_work(nvme_wq, &ctrl->async_event_work);
4713 }
4714 
4715 static u32 nvme_aer_type(u32 result)
4716 {
4717 	return result & 0x7;
4718 }
4719 
4720 static u32 nvme_aer_subtype(u32 result)
4721 {
4722 	return (result & 0xff00) >> 8;
4723 }
4724 
4725 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4726 {
4727 	u32 aer_notice_type = nvme_aer_subtype(result);
4728 	bool requeue = true;
4729 
4730 	switch (aer_notice_type) {
4731 	case NVME_AER_NOTICE_NS_CHANGED:
4732 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4733 		nvme_queue_scan(ctrl);
4734 		break;
4735 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4736 		/*
4737 		 * We are (ab)using the RESETTING state to prevent subsequent
4738 		 * recovery actions from interfering with the controller's
4739 		 * firmware activation.
4740 		 */
4741 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4742 			requeue = false;
4743 			queue_work(nvme_wq, &ctrl->fw_act_work);
4744 		}
4745 		break;
4746 #ifdef CONFIG_NVME_MULTIPATH
4747 	case NVME_AER_NOTICE_ANA:
4748 		if (!ctrl->ana_log_buf)
4749 			break;
4750 		queue_work(nvme_wq, &ctrl->ana_work);
4751 		break;
4752 #endif
4753 	case NVME_AER_NOTICE_DISC_CHANGED:
4754 		ctrl->aen_result = result;
4755 		break;
4756 	default:
4757 		dev_warn(ctrl->device, "async event result %08x\n", result);
4758 	}
4759 	return requeue;
4760 }
4761 
4762 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4763 {
4764 	dev_warn(ctrl->device,
4765 		"resetting controller due to persistent internal error\n");
4766 	nvme_reset_ctrl(ctrl);
4767 }
4768 
4769 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4770 		volatile union nvme_result *res)
4771 {
4772 	u32 result = le32_to_cpu(res->u32);
4773 	u32 aer_type = nvme_aer_type(result);
4774 	u32 aer_subtype = nvme_aer_subtype(result);
4775 	bool requeue = true;
4776 
4777 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4778 		return;
4779 
4780 	trace_nvme_async_event(ctrl, result);
4781 	switch (aer_type) {
4782 	case NVME_AER_NOTICE:
4783 		requeue = nvme_handle_aen_notice(ctrl, result);
4784 		break;
4785 	case NVME_AER_ERROR:
4786 		/*
4787 		 * For a persistent internal error, don't run async_event_work
4788 		 * to submit a new AER. The controller reset will do it.
4789 		 */
4790 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4791 			nvme_handle_aer_persistent_error(ctrl);
4792 			return;
4793 		}
4794 		fallthrough;
4795 	case NVME_AER_SMART:
4796 	case NVME_AER_CSS:
4797 	case NVME_AER_VS:
4798 		ctrl->aen_result = result;
4799 		break;
4800 	default:
4801 		break;
4802 	}
4803 
4804 	if (requeue)
4805 		queue_work(nvme_wq, &ctrl->async_event_work);
4806 }
4807 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4808 
4809 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4810 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4811 {
4812 	struct queue_limits lim = {};
4813 	int ret;
4814 
4815 	memset(set, 0, sizeof(*set));
4816 	set->ops = ops;
4817 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4818 	if (ctrl->ops->flags & NVME_F_FABRICS)
4819 		/* Reserved for fabric connect and keep alive */
4820 		set->reserved_tags = 2;
4821 	set->numa_node = ctrl->numa_node;
4822 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4823 		set->flags |= BLK_MQ_F_BLOCKING;
4824 	set->cmd_size = cmd_size;
4825 	set->driver_data = ctrl;
4826 	set->nr_hw_queues = 1;
4827 	set->timeout = NVME_ADMIN_TIMEOUT;
4828 	ret = blk_mq_alloc_tag_set(set);
4829 	if (ret)
4830 		return ret;
4831 
4832 	ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4833 	if (IS_ERR(ctrl->admin_q)) {
4834 		ret = PTR_ERR(ctrl->admin_q);
4835 		goto out_free_tagset;
4836 	}
4837 
4838 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4839 		ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4840 		if (IS_ERR(ctrl->fabrics_q)) {
4841 			ret = PTR_ERR(ctrl->fabrics_q);
4842 			goto out_cleanup_admin_q;
4843 		}
4844 	}
4845 
4846 	ctrl->admin_tagset = set;
4847 	return 0;
4848 
4849 out_cleanup_admin_q:
4850 	blk_mq_destroy_queue(ctrl->admin_q);
4851 	blk_put_queue(ctrl->admin_q);
4852 out_free_tagset:
4853 	blk_mq_free_tag_set(set);
4854 	ctrl->admin_q = NULL;
4855 	ctrl->fabrics_q = NULL;
4856 	return ret;
4857 }
4858 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4859 
4860 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4861 {
4862 	/*
4863 	 * As we're about to destroy the queue and free tagset
4864 	 * we can not have keep-alive work running.
4865 	 */
4866 	nvme_stop_keep_alive(ctrl);
4867 	blk_mq_destroy_queue(ctrl->admin_q);
4868 	blk_put_queue(ctrl->admin_q);
4869 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4870 		blk_mq_destroy_queue(ctrl->fabrics_q);
4871 		blk_put_queue(ctrl->fabrics_q);
4872 	}
4873 	blk_mq_free_tag_set(ctrl->admin_tagset);
4874 }
4875 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4876 
4877 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4878 		const struct blk_mq_ops *ops, unsigned int nr_maps,
4879 		unsigned int cmd_size)
4880 {
4881 	int ret;
4882 
4883 	memset(set, 0, sizeof(*set));
4884 	set->ops = ops;
4885 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4886 	/*
4887 	 * Some Apple controllers requires tags to be unique across admin and
4888 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4889 	 */
4890 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4891 		set->reserved_tags = NVME_AQ_DEPTH;
4892 	else if (ctrl->ops->flags & NVME_F_FABRICS)
4893 		/* Reserved for fabric connect */
4894 		set->reserved_tags = 1;
4895 	set->numa_node = ctrl->numa_node;
4896 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4897 		set->flags |= BLK_MQ_F_BLOCKING;
4898 	set->cmd_size = cmd_size;
4899 	set->driver_data = ctrl;
4900 	set->nr_hw_queues = ctrl->queue_count - 1;
4901 	set->timeout = NVME_IO_TIMEOUT;
4902 	set->nr_maps = nr_maps;
4903 	ret = blk_mq_alloc_tag_set(set);
4904 	if (ret)
4905 		return ret;
4906 
4907 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4908 		struct queue_limits lim = {
4909 			.features	= BLK_FEAT_SKIP_TAGSET_QUIESCE,
4910 		};
4911 
4912 		ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL);
4913         	if (IS_ERR(ctrl->connect_q)) {
4914 			ret = PTR_ERR(ctrl->connect_q);
4915 			goto out_free_tag_set;
4916 		}
4917 	}
4918 
4919 	ctrl->tagset = set;
4920 	return 0;
4921 
4922 out_free_tag_set:
4923 	blk_mq_free_tag_set(set);
4924 	ctrl->connect_q = NULL;
4925 	return ret;
4926 }
4927 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4928 
4929 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4930 {
4931 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4932 		blk_mq_destroy_queue(ctrl->connect_q);
4933 		blk_put_queue(ctrl->connect_q);
4934 	}
4935 	blk_mq_free_tag_set(ctrl->tagset);
4936 }
4937 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4938 
4939 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4940 {
4941 	nvme_mpath_stop(ctrl);
4942 	nvme_auth_stop(ctrl);
4943 	nvme_stop_failfast_work(ctrl);
4944 	flush_work(&ctrl->async_event_work);
4945 	cancel_work_sync(&ctrl->fw_act_work);
4946 	if (ctrl->ops->stop_ctrl)
4947 		ctrl->ops->stop_ctrl(ctrl);
4948 }
4949 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4950 
4951 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4952 {
4953 	nvme_enable_aen(ctrl);
4954 
4955 	/*
4956 	 * persistent discovery controllers need to send indication to userspace
4957 	 * to re-read the discovery log page to learn about possible changes
4958 	 * that were missed. We identify persistent discovery controllers by
4959 	 * checking that they started once before, hence are reconnecting back.
4960 	 */
4961 	if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4962 	    nvme_discovery_ctrl(ctrl))
4963 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4964 
4965 	if (ctrl->queue_count > 1) {
4966 		nvme_queue_scan(ctrl);
4967 		nvme_unquiesce_io_queues(ctrl);
4968 		nvme_mpath_update(ctrl);
4969 	}
4970 
4971 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4972 	set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4973 }
4974 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4975 
4976 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4977 {
4978 	nvme_stop_keep_alive(ctrl);
4979 	nvme_hwmon_exit(ctrl);
4980 	nvme_fault_inject_fini(&ctrl->fault_inject);
4981 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4982 	cdev_device_del(&ctrl->cdev, ctrl->device);
4983 	nvme_put_ctrl(ctrl);
4984 }
4985 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4986 
4987 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4988 {
4989 	struct nvme_effects_log	*cel;
4990 	unsigned long i;
4991 
4992 	xa_for_each(&ctrl->cels, i, cel) {
4993 		xa_erase(&ctrl->cels, i);
4994 		kfree(cel);
4995 	}
4996 
4997 	xa_destroy(&ctrl->cels);
4998 }
4999 
5000 static void nvme_free_ctrl(struct device *dev)
5001 {
5002 	struct nvme_ctrl *ctrl =
5003 		container_of(dev, struct nvme_ctrl, ctrl_device);
5004 	struct nvme_subsystem *subsys = ctrl->subsys;
5005 
5006 	if (!subsys || ctrl->instance != subsys->instance)
5007 		ida_free(&nvme_instance_ida, ctrl->instance);
5008 	nvme_free_cels(ctrl);
5009 	nvme_mpath_uninit(ctrl);
5010 	cleanup_srcu_struct(&ctrl->srcu);
5011 	nvme_auth_stop(ctrl);
5012 	nvme_auth_free(ctrl);
5013 	__free_page(ctrl->discard_page);
5014 	free_opal_dev(ctrl->opal_dev);
5015 
5016 	if (subsys) {
5017 		mutex_lock(&nvme_subsystems_lock);
5018 		list_del(&ctrl->subsys_entry);
5019 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
5020 		mutex_unlock(&nvme_subsystems_lock);
5021 	}
5022 
5023 	ctrl->ops->free_ctrl(ctrl);
5024 
5025 	if (subsys)
5026 		nvme_put_subsystem(subsys);
5027 }
5028 
5029 /*
5030  * Initialize a NVMe controller structures.  This needs to be called during
5031  * earliest initialization so that we have the initialized structured around
5032  * during probing.
5033  *
5034  * On success, the caller must use the nvme_put_ctrl() to release this when
5035  * needed, which also invokes the ops->free_ctrl() callback.
5036  */
5037 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
5038 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
5039 {
5040 	int ret;
5041 
5042 	WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
5043 	ctrl->passthru_err_log_enabled = false;
5044 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
5045 	spin_lock_init(&ctrl->lock);
5046 	mutex_init(&ctrl->namespaces_lock);
5047 
5048 	ret = init_srcu_struct(&ctrl->srcu);
5049 	if (ret)
5050 		return ret;
5051 
5052 	mutex_init(&ctrl->scan_lock);
5053 	INIT_LIST_HEAD(&ctrl->namespaces);
5054 	xa_init(&ctrl->cels);
5055 	ctrl->dev = dev;
5056 	ctrl->ops = ops;
5057 	ctrl->quirks = quirks;
5058 	ctrl->numa_node = NUMA_NO_NODE;
5059 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
5060 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
5061 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
5062 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
5063 	init_waitqueue_head(&ctrl->state_wq);
5064 
5065 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
5066 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
5067 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
5068 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
5069 	ctrl->ka_last_check_time = jiffies;
5070 
5071 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
5072 			PAGE_SIZE);
5073 	ctrl->discard_page = alloc_page(GFP_KERNEL);
5074 	if (!ctrl->discard_page) {
5075 		ret = -ENOMEM;
5076 		goto out;
5077 	}
5078 
5079 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
5080 	if (ret < 0)
5081 		goto out;
5082 	ctrl->instance = ret;
5083 
5084 	ret = nvme_auth_init_ctrl(ctrl);
5085 	if (ret)
5086 		goto out_release_instance;
5087 
5088 	nvme_mpath_init_ctrl(ctrl);
5089 
5090 	device_initialize(&ctrl->ctrl_device);
5091 	ctrl->device = &ctrl->ctrl_device;
5092 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
5093 			ctrl->instance);
5094 	ctrl->device->class = &nvme_class;
5095 	ctrl->device->parent = ctrl->dev;
5096 	if (ops->dev_attr_groups)
5097 		ctrl->device->groups = ops->dev_attr_groups;
5098 	else
5099 		ctrl->device->groups = nvme_dev_attr_groups;
5100 	ctrl->device->release = nvme_free_ctrl;
5101 	dev_set_drvdata(ctrl->device, ctrl);
5102 
5103 	return ret;
5104 
5105 out_release_instance:
5106 	ida_free(&nvme_instance_ida, ctrl->instance);
5107 out:
5108 	if (ctrl->discard_page)
5109 		__free_page(ctrl->discard_page);
5110 	cleanup_srcu_struct(&ctrl->srcu);
5111 	return ret;
5112 }
5113 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
5114 
5115 /*
5116  * On success, returns with an elevated controller reference and caller must
5117  * use nvme_uninit_ctrl() to properly free resources associated with the ctrl.
5118  */
5119 int nvme_add_ctrl(struct nvme_ctrl *ctrl)
5120 {
5121 	int ret;
5122 
5123 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
5124 	if (ret)
5125 		return ret;
5126 
5127 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
5128 	ctrl->cdev.owner = ctrl->ops->module;
5129 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
5130 	if (ret)
5131 		return ret;
5132 
5133 	/*
5134 	 * Initialize latency tolerance controls.  The sysfs files won't
5135 	 * be visible to userspace unless the device actually supports APST.
5136 	 */
5137 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
5138 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
5139 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
5140 
5141 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
5142 	nvme_get_ctrl(ctrl);
5143 
5144 	return 0;
5145 }
5146 EXPORT_SYMBOL_GPL(nvme_add_ctrl);
5147 
5148 /* let I/O to all namespaces fail in preparation for surprise removal */
5149 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
5150 {
5151 	struct nvme_ns *ns;
5152 	int srcu_idx;
5153 
5154 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5155 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5156 				 srcu_read_lock_held(&ctrl->srcu))
5157 		blk_mark_disk_dead(ns->disk);
5158 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5159 }
5160 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
5161 
5162 void nvme_unfreeze(struct nvme_ctrl *ctrl)
5163 {
5164 	struct nvme_ns *ns;
5165 	int srcu_idx;
5166 
5167 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5168 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5169 				 srcu_read_lock_held(&ctrl->srcu))
5170 		blk_mq_unfreeze_queue_non_owner(ns->queue);
5171 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5172 	clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
5173 }
5174 EXPORT_SYMBOL_GPL(nvme_unfreeze);
5175 
5176 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
5177 {
5178 	struct nvme_ns *ns;
5179 	int srcu_idx;
5180 
5181 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5182 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5183 				 srcu_read_lock_held(&ctrl->srcu)) {
5184 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
5185 		if (timeout <= 0)
5186 			break;
5187 	}
5188 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5189 	return timeout;
5190 }
5191 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
5192 
5193 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
5194 {
5195 	struct nvme_ns *ns;
5196 	int srcu_idx;
5197 
5198 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5199 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5200 				 srcu_read_lock_held(&ctrl->srcu))
5201 		blk_mq_freeze_queue_wait(ns->queue);
5202 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5203 }
5204 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
5205 
5206 void nvme_start_freeze(struct nvme_ctrl *ctrl)
5207 {
5208 	struct nvme_ns *ns;
5209 	int srcu_idx;
5210 
5211 	set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
5212 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5213 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5214 				 srcu_read_lock_held(&ctrl->srcu))
5215 		/*
5216 		 * Typical non_owner use case is from pci driver, in which
5217 		 * start_freeze is called from timeout work function, but
5218 		 * unfreeze is done in reset work context
5219 		 */
5220 		blk_freeze_queue_start_non_owner(ns->queue);
5221 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5222 }
5223 EXPORT_SYMBOL_GPL(nvme_start_freeze);
5224 
5225 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5226 {
5227 	if (!ctrl->tagset)
5228 		return;
5229 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5230 		blk_mq_quiesce_tagset(ctrl->tagset);
5231 	else
5232 		blk_mq_wait_quiesce_done(ctrl->tagset);
5233 }
5234 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5235 
5236 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5237 {
5238 	if (!ctrl->tagset)
5239 		return;
5240 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5241 		blk_mq_unquiesce_tagset(ctrl->tagset);
5242 }
5243 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5244 
5245 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5246 {
5247 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5248 		blk_mq_quiesce_queue(ctrl->admin_q);
5249 	else
5250 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5251 }
5252 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5253 
5254 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5255 {
5256 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5257 		blk_mq_unquiesce_queue(ctrl->admin_q);
5258 }
5259 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5260 
5261 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5262 {
5263 	struct nvme_ns *ns;
5264 	int srcu_idx;
5265 
5266 	srcu_idx = srcu_read_lock(&ctrl->srcu);
5267 	list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5268 				 srcu_read_lock_held(&ctrl->srcu))
5269 		blk_sync_queue(ns->queue);
5270 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
5271 }
5272 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5273 
5274 void nvme_sync_queues(struct nvme_ctrl *ctrl)
5275 {
5276 	nvme_sync_io_queues(ctrl);
5277 	if (ctrl->admin_q)
5278 		blk_sync_queue(ctrl->admin_q);
5279 }
5280 EXPORT_SYMBOL_GPL(nvme_sync_queues);
5281 
5282 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5283 {
5284 	if (file->f_op != &nvme_dev_fops)
5285 		return NULL;
5286 	return file->private_data;
5287 }
5288 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU");
5289 
5290 /*
5291  * Check we didn't inadvertently grow the command structure sizes:
5292  */
5293 static inline void _nvme_check_size(void)
5294 {
5295 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5296 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5297 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5298 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5299 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5300 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5301 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5302 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5303 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5304 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5305 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5306 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5307 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5308 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5309 			NVME_IDENTIFY_DATA_SIZE);
5310 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5311 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5312 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5313 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5314 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5315 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5316 	BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512);
5317 	BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512);
5318 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5319 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5320 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5321 }
5322 
5323 
5324 static int __init nvme_core_init(void)
5325 {
5326 	unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS;
5327 	int result = -ENOMEM;
5328 
5329 	_nvme_check_size();
5330 
5331 	nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0);
5332 	if (!nvme_wq)
5333 		goto out;
5334 
5335 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0);
5336 	if (!nvme_reset_wq)
5337 		goto destroy_wq;
5338 
5339 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0);
5340 	if (!nvme_delete_wq)
5341 		goto destroy_reset_wq;
5342 
5343 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5344 			NVME_MINORS, "nvme");
5345 	if (result < 0)
5346 		goto destroy_delete_wq;
5347 
5348 	result = class_register(&nvme_class);
5349 	if (result)
5350 		goto unregister_chrdev;
5351 
5352 	result = class_register(&nvme_subsys_class);
5353 	if (result)
5354 		goto destroy_class;
5355 
5356 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5357 				     "nvme-generic");
5358 	if (result < 0)
5359 		goto destroy_subsys_class;
5360 
5361 	result = class_register(&nvme_ns_chr_class);
5362 	if (result)
5363 		goto unregister_generic_ns;
5364 
5365 	result = nvme_init_auth();
5366 	if (result)
5367 		goto destroy_ns_chr;
5368 	return 0;
5369 
5370 destroy_ns_chr:
5371 	class_unregister(&nvme_ns_chr_class);
5372 unregister_generic_ns:
5373 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5374 destroy_subsys_class:
5375 	class_unregister(&nvme_subsys_class);
5376 destroy_class:
5377 	class_unregister(&nvme_class);
5378 unregister_chrdev:
5379 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5380 destroy_delete_wq:
5381 	destroy_workqueue(nvme_delete_wq);
5382 destroy_reset_wq:
5383 	destroy_workqueue(nvme_reset_wq);
5384 destroy_wq:
5385 	destroy_workqueue(nvme_wq);
5386 out:
5387 	return result;
5388 }
5389 
5390 static void __exit nvme_core_exit(void)
5391 {
5392 	nvme_exit_auth();
5393 	class_unregister(&nvme_ns_chr_class);
5394 	class_unregister(&nvme_subsys_class);
5395 	class_unregister(&nvme_class);
5396 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5397 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5398 	destroy_workqueue(nvme_delete_wq);
5399 	destroy_workqueue(nvme_reset_wq);
5400 	destroy_workqueue(nvme_wq);
5401 	ida_destroy(&nvme_ns_chr_minor_ida);
5402 	ida_destroy(&nvme_instance_ida);
5403 }
5404 
5405 MODULE_LICENSE("GPL");
5406 MODULE_VERSION("1.0");
5407 MODULE_DESCRIPTION("NVMe host core framework");
5408 module_init(nvme_core_init);
5409 module_exit(nvme_core_exit);
5410