1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 4 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 5 */ 6 7 #ifndef _ENIC_H_ 8 #define _ENIC_H_ 9 10 #include "vnic_enet.h" 11 #include "vnic_dev.h" 12 #include "vnic_wq.h" 13 #include "vnic_rq.h" 14 #include "vnic_cq.h" 15 #include "vnic_intr.h" 16 #include "vnic_stats.h" 17 #include "vnic_nic.h" 18 #include "vnic_rss.h" 19 #include <linux/irq.h> 20 #include <net/page_pool/helpers.h> 21 22 #define DRV_NAME "enic" 23 #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" 24 25 #define ENIC_BARS_MAX 6 26 27 #define ENIC_WQ_MAX 256 28 #define ENIC_RQ_MAX 256 29 #define ENIC_RQ_MIN_DEFAULT 8 30 31 #define ENIC_WQ_NAPI_BUDGET 256 32 33 #define ENIC_AIC_LARGE_PKT_DIFF 3 34 35 enum ext_cq { 36 ENIC_RQ_CQ_ENTRY_SIZE_16, 37 ENIC_RQ_CQ_ENTRY_SIZE_32, 38 ENIC_RQ_CQ_ENTRY_SIZE_64, 39 ENIC_RQ_CQ_ENTRY_SIZE_MAX, 40 }; 41 42 struct enic_msix_entry { 43 int requested; 44 char devname[IFNAMSIZ + 8]; 45 irqreturn_t (*isr)(int, void *); 46 void *devid; 47 cpumask_var_t affinity_mask; 48 }; 49 50 /* Store only the lower range. Higher range is given by fw. */ 51 struct enic_intr_mod_range { 52 u32 small_pkt_range_start; 53 u32 large_pkt_range_start; 54 }; 55 56 struct enic_intr_mod_table { 57 u32 rx_rate; 58 u32 range_percent; 59 }; 60 61 #define ENIC_MAX_LINK_SPEEDS 3 62 #define ENIC_LINK_SPEED_10G 10000 63 #define ENIC_LINK_SPEED_4G 4000 64 #define ENIC_LINK_40G_INDEX 2 65 #define ENIC_LINK_10G_INDEX 1 66 #define ENIC_LINK_4G_INDEX 0 67 #define ENIC_RX_COALESCE_RANGE_END 125 68 #define ENIC_AIC_TS_BREAK 100 69 70 struct enic_rx_coal { 71 u32 small_pkt_range_start; 72 u32 large_pkt_range_start; 73 u32 range_end; 74 u32 use_adaptive_rx_coalesce; 75 }; 76 77 /* priv_flags */ 78 #define ENIC_SRIOV_ENABLED (1 << 0) 79 80 /* enic port profile set flags */ 81 #define ENIC_PORT_REQUEST_APPLIED (1 << 0) 82 #define ENIC_SET_REQUEST (1 << 1) 83 #define ENIC_SET_NAME (1 << 2) 84 #define ENIC_SET_INSTANCE (1 << 3) 85 #define ENIC_SET_HOST (1 << 4) 86 87 #define MAX_TSO BIT(16) 88 #define WQ_ENET_MAX_DESC_LEN BIT(WQ_ENET_LEN_BITS) 89 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 90 91 struct enic_port_profile { 92 u32 set; 93 u8 request; 94 char name[PORT_PROFILE_MAX]; 95 u8 instance_uuid[PORT_UUID_MAX]; 96 u8 host_uuid[PORT_UUID_MAX]; 97 u8 vf_mac[ETH_ALEN]; 98 u8 mac_addr[ETH_ALEN]; 99 }; 100 101 /* enic_rfs_fltr_node - rfs filter node in hash table 102 * @@keys: IPv4 5 tuple 103 * @flow_id: flow_id of clsf filter provided by kernel 104 * @fltr_id: filter id of clsf filter returned by adaptor 105 * @rq_id: desired rq index 106 * @node: hlist_node 107 */ 108 struct enic_rfs_fltr_node { 109 struct flow_keys keys; 110 u32 flow_id; 111 u16 fltr_id; 112 u16 rq_id; 113 struct hlist_node node; 114 }; 115 116 /* enic_rfs_flw_tbl - rfs flow table 117 * @max: Maximum number of filters vNIC supports 118 * @free: Number of free filters available 119 * @toclean: hash table index to clean next 120 * @ht_head: hash table list head 121 * @lock: spin lock 122 * @rfs_may_expire: timer function for enic_rps_may_expire_flow 123 */ 124 struct enic_rfs_flw_tbl { 125 u16 max; 126 int free; 127 128 #define ENIC_RFS_FLW_BITSHIFT (10) 129 #define ENIC_RFS_FLW_MASK ((1 << ENIC_RFS_FLW_BITSHIFT) - 1) 130 u16 toclean:ENIC_RFS_FLW_BITSHIFT; 131 struct hlist_head ht_head[1 << ENIC_RFS_FLW_BITSHIFT]; 132 spinlock_t lock; 133 struct timer_list rfs_may_expire; 134 }; 135 136 struct vxlan_offload { 137 u16 vxlan_udp_port_number; 138 u8 patch_level; 139 u8 flags; 140 }; 141 142 struct enic_wq_stats { 143 u64 packets; /* pkts queued for Tx */ 144 u64 stopped; /* Tx ring almost full, queue stopped */ 145 u64 wake; /* Tx ring no longer full, queue woken up*/ 146 u64 tso; /* non-encap tso pkt */ 147 u64 encap_tso; /* encap tso pkt */ 148 u64 encap_csum; /* encap HW csum */ 149 u64 csum_partial; /* skb->ip_summed = CHECKSUM_PARTIAL */ 150 u64 csum_none; /* HW csum not required */ 151 u64 bytes; /* bytes queued for Tx */ 152 u64 add_vlan; /* HW adds vlan tag */ 153 u64 cq_work; /* Tx completions processed */ 154 u64 cq_bytes; /* Tx bytes processed */ 155 u64 null_pkt; /* skb length <= 0 */ 156 u64 skb_linear_fail; /* linearize failures */ 157 u64 desc_full_awake; /* TX ring full while queue awake */ 158 }; 159 160 struct enic_rq_stats { 161 u64 packets; /* pkts received */ 162 u64 bytes; /* bytes received */ 163 u64 l4_rss_hash; /* hashed on l4 */ 164 u64 l3_rss_hash; /* hashed on l3 */ 165 u64 csum_unnecessary; /* HW verified csum */ 166 u64 csum_unnecessary_encap; /* HW verified csum on encap packet */ 167 u64 vlan_stripped; /* HW stripped vlan */ 168 u64 napi_complete; /* napi complete intr reenabled */ 169 u64 napi_repoll; /* napi poll again */ 170 u64 bad_fcs; /* bad pkts */ 171 u64 pkt_truncated; /* truncated pkts */ 172 u64 no_skb; /* out of skbs */ 173 u64 desc_skip; /* Rx pkt went into later buffer */ 174 u64 pp_alloc_fail; /* page pool alloc failure */ 175 }; 176 177 struct enic_wq { 178 spinlock_t lock; /* spinlock for wq */ 179 struct vnic_wq vwq; 180 struct enic_wq_stats stats; 181 } ____cacheline_aligned; 182 183 struct enic_rq { 184 struct vnic_rq vrq; 185 struct enic_rq_stats stats; 186 struct page_pool *pool; 187 } ____cacheline_aligned; 188 189 /* Per-instance private data structure */ 190 struct enic { 191 struct net_device *netdev; 192 struct pci_dev *pdev; 193 struct vnic_enet_config config; 194 struct vnic_dev_bar bar[ENIC_BARS_MAX]; 195 struct vnic_dev *vdev; 196 struct timer_list notify_timer; 197 struct work_struct reset; 198 struct work_struct tx_hang_reset; 199 struct work_struct change_mtu_work; 200 struct msix_entry *msix_entry; 201 struct enic_msix_entry *msix; 202 u32 msg_enable; 203 spinlock_t devcmd_lock; 204 u8 mac_addr[ETH_ALEN]; 205 unsigned int flags; 206 unsigned int priv_flags; 207 unsigned int mc_count; 208 unsigned int uc_count; 209 u32 port_mtu; 210 struct enic_rx_coal rx_coalesce_setting; 211 u32 rx_coalesce_usecs; 212 u32 tx_coalesce_usecs; 213 #ifdef CONFIG_PCI_IOV 214 u16 num_vfs; 215 #endif 216 spinlock_t enic_api_lock; 217 bool enic_api_busy; 218 struct enic_port_profile *pp; 219 220 struct enic_wq *wq; 221 unsigned int wq_avail; 222 unsigned int wq_count; 223 u16 loop_enable; 224 u16 loop_tag; 225 226 struct enic_rq *rq; 227 unsigned int rq_avail; 228 unsigned int rq_count; 229 struct vxlan_offload vxlan; 230 struct napi_struct *napi; 231 232 struct vnic_intr *intr; 233 unsigned int intr_avail; 234 unsigned int intr_count; 235 u32 __iomem *legacy_pba; /* memory-mapped */ 236 237 struct vnic_cq *cq; 238 unsigned int cq_avail; 239 unsigned int cq_count; 240 struct enic_rfs_flw_tbl rfs_h; 241 u8 rss_key[ENIC_RSS_LEN]; 242 struct vnic_gen_stats gen_stats; 243 enum ext_cq ext_cq; 244 }; 245 246 static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev) 247 { 248 struct enic *enic = vdev->priv; 249 250 return enic->netdev; 251 } 252 253 /* wrappers function for kernel log 254 */ 255 #define vdev_err(vdev, fmt, ...) \ 256 dev_err(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__) 257 #define vdev_warn(vdev, fmt, ...) \ 258 dev_warn(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__) 259 #define vdev_info(vdev, fmt, ...) \ 260 dev_info(&(vdev)->pdev->dev, fmt, ##__VA_ARGS__) 261 262 #define vdev_neterr(vdev, fmt, ...) \ 263 netdev_err(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__) 264 #define vdev_netwarn(vdev, fmt, ...) \ 265 netdev_warn(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__) 266 #define vdev_netinfo(vdev, fmt, ...) \ 267 netdev_info(vnic_get_netdev(vdev), fmt, ##__VA_ARGS__) 268 269 static inline struct device *enic_get_dev(struct enic *enic) 270 { 271 return &(enic->pdev->dev); 272 } 273 274 static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq) 275 { 276 return rq; 277 } 278 279 static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq) 280 { 281 return enic->rq_count + wq; 282 } 283 284 static inline unsigned int enic_msix_rq_intr(struct enic *enic, 285 unsigned int rq) 286 { 287 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset; 288 } 289 290 static inline unsigned int enic_msix_wq_intr(struct enic *enic, 291 unsigned int wq) 292 { 293 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset; 294 } 295 296 /* MSIX interrupts are organized as the error interrupt, then the notify 297 * interrupt followed by all the I/O interrupts. The error interrupt needs 298 * to fit in 7 bits due to hardware constraints 299 */ 300 #define ENIC_MSIX_RESERVED_INTR 2 301 #define ENIC_MSIX_ERR_INTR 0 302 #define ENIC_MSIX_NOTIFY_INTR 1 303 #define ENIC_MSIX_IO_INTR_BASE ENIC_MSIX_RESERVED_INTR 304 #define ENIC_MSIX_MIN_INTR (ENIC_MSIX_RESERVED_INTR + 2) 305 306 #define ENIC_LEGACY_IO_INTR 0 307 #define ENIC_LEGACY_ERR_INTR 1 308 #define ENIC_LEGACY_NOTIFY_INTR 2 309 310 static inline unsigned int enic_msix_err_intr(struct enic *enic) 311 { 312 return ENIC_MSIX_ERR_INTR; 313 } 314 315 static inline unsigned int enic_msix_notify_intr(struct enic *enic) 316 { 317 return ENIC_MSIX_NOTIFY_INTR; 318 } 319 320 static inline bool enic_is_err_intr(struct enic *enic, int intr) 321 { 322 switch (vnic_dev_get_intr_mode(enic->vdev)) { 323 case VNIC_DEV_INTR_MODE_INTX: 324 return intr == ENIC_LEGACY_ERR_INTR; 325 case VNIC_DEV_INTR_MODE_MSIX: 326 return intr == enic_msix_err_intr(enic); 327 case VNIC_DEV_INTR_MODE_MSI: 328 default: 329 return false; 330 } 331 } 332 333 static inline bool enic_is_notify_intr(struct enic *enic, int intr) 334 { 335 switch (vnic_dev_get_intr_mode(enic->vdev)) { 336 case VNIC_DEV_INTR_MODE_INTX: 337 return intr == ENIC_LEGACY_NOTIFY_INTR; 338 case VNIC_DEV_INTR_MODE_MSIX: 339 return intr == enic_msix_notify_intr(enic); 340 case VNIC_DEV_INTR_MODE_MSI: 341 default: 342 return false; 343 } 344 } 345 346 static inline int enic_dma_map_check(struct enic *enic, dma_addr_t dma_addr) 347 { 348 if (unlikely(dma_mapping_error(&enic->pdev->dev, dma_addr))) { 349 net_warn_ratelimited("%s: PCI dma mapping failed!\n", 350 enic->netdev->name); 351 enic->gen_stats.dma_map_error++; 352 353 return -ENOMEM; 354 } 355 356 return 0; 357 } 358 359 void enic_reset_addr_lists(struct enic *enic); 360 int enic_sriov_enabled(struct enic *enic); 361 int enic_is_valid_vf(struct enic *enic, int vf); 362 int enic_is_dynamic(struct enic *enic); 363 void enic_set_ethtool_ops(struct net_device *netdev); 364 int __enic_set_rsskey(struct enic *enic); 365 void enic_ext_cq(struct enic *enic); 366 367 #endif /* _ENIC_H_ */ 368