1c94fb639SRandy Dunlapmenu "IRQ chip support" 2c94fb639SRandy Dunlap 3f6e916b8SThomas Petazzoniconfig IRQCHIP 4f6e916b8SThomas Petazzoni def_bool y 5f6e916b8SThomas Petazzoni depends on OF_IRQ 6f6e916b8SThomas Petazzoni 781243e44SRob Herringconfig ARM_GIC 881243e44SRob Herring bool 981243e44SRob Herring select IRQ_DOMAIN 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 11*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 120c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter select PM_CLK 199c8edddfSJon Hunter 20a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 21a27d21e0SLinus Walleij int 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 36021f6537SMarc Zyngier select IRQ_DOMAIN 37*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 38443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 39e3825ba1SMarc Zyngier select PARTITION_PERCPU 40956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 41021f6537SMarc Zyngier 4219812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4319812729SMarc Zyngier bool 4429f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4529f41139SMarc Zyngier default ARM_GIC_V3 4629f41139SMarc Zyngier 4729f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4829f41139SMarc Zyngier bool 4929f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 503ee80364SArnd Bergmann depends on PCI 513ee80364SArnd Bergmann depends on PCI_MSI 5229f41139SMarc Zyngier default ARM_GIC_V3_ITS 53292ec080SUwe Kleine-König 547afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 557afe031cSBogdan Purcareata bool 567afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 577afe031cSBogdan Purcareata depends on FSL_MC_BUS 587afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 597afe031cSBogdan Purcareata 6044430ec0SRob Herringconfig ARM_NVIC 6144430ec0SRob Herring bool 6244430ec0SRob Herring select IRQ_DOMAIN 632d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6444430ec0SRob Herring select GENERIC_IRQ_CHIP 6544430ec0SRob Herring 6644430ec0SRob Herringconfig ARM_VIC 6744430ec0SRob Herring bool 6844430ec0SRob Herring select IRQ_DOMAIN 69*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 7044430ec0SRob Herring 7144430ec0SRob Herringconfig ARM_VIC_NR 7244430ec0SRob Herring int 7344430ec0SRob Herring default 4 if ARCH_S5PV210 7444430ec0SRob Herring default 2 7544430ec0SRob Herring depends on ARM_VIC 7644430ec0SRob Herring help 7744430ec0SRob Herring The maximum number of VICs available in the system, for 7844430ec0SRob Herring power management. 7944430ec0SRob Herring 80fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 81fed6d336SThomas Petazzoni bool 82fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 833ee80364SArnd Bergmann select PCI_MSI if PCI 84e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 85fed6d336SThomas Petazzoni 86e6b78f2cSAntoine Tenartconfig ALPINE_MSI 87e6b78f2cSAntoine Tenart bool 883ee80364SArnd Bergmann depends on PCI 893ee80364SArnd Bergmann select PCI_MSI 90e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 91e6b78f2cSAntoine Tenart 92b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 93b1479ebbSBoris BREZILLON bool 94b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 95b1479ebbSBoris BREZILLON select IRQ_DOMAIN 96*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 97b1479ebbSBoris BREZILLON select SPARSE_IRQ 98b1479ebbSBoris BREZILLON 99b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 100b1479ebbSBoris BREZILLON bool 101b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 102b1479ebbSBoris BREZILLON select IRQ_DOMAIN 103*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 104b1479ebbSBoris BREZILLON select SPARSE_IRQ 105b1479ebbSBoris BREZILLON 1060509cfdeSRalf Baechleconfig I8259 1070509cfdeSRalf Baechle bool 1080509cfdeSRalf Baechle select IRQ_DOMAIN 1090509cfdeSRalf Baechle 110c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 111c7c42ec2SSimon Arlott bool 112c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 113c7c42ec2SSimon Arlott select IRQ_DOMAIN 114d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 115c7c42ec2SSimon Arlott 1165f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1175f7f0317SKevin Cernekee bool 1185f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1195f7f0317SKevin Cernekee select IRQ_DOMAIN 120b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1215f7f0317SKevin Cernekee 122a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 123a4fcbb86SKevin Cernekee bool 124a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 125a4fcbb86SKevin Cernekee select IRQ_DOMAIN 126a4fcbb86SKevin Cernekee 1277f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1287f646e92SFlorian Fainelli bool 1297f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1307f646e92SFlorian Fainelli select IRQ_DOMAIN 1317f646e92SFlorian Fainelli 132350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 133350d71b9SSebastian Hesselbarth bool 134e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 135350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 136350d71b9SSebastian Hesselbarth 1376ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1386ee532e2SLinus Walleij bool 1396ee532e2SLinus Walleij select IRQ_DOMAIN 140*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1416ee532e2SLinus Walleij select SPARSE_IRQ 1426ee532e2SLinus Walleij 1439a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1449a7c4abdSMaJun bool 1459a7c4abdSMaJun select ARM_GIC_V3 1469a7c4abdSMaJun select ARM_GIC_V3_ITS 1479a7c4abdSMaJun 148b6ef9161SJames Hoganconfig IMGPDC_IRQ 149b6ef9161SJames Hogan bool 150b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 151b6ef9161SJames Hogan select IRQ_DOMAIN 152b6ef9161SJames Hogan 15367e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 15467e38cf2SRalf Baechle bool 15567e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1563838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 15767e38cf2SRalf Baechle select IRQ_DOMAIN 1583838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 15918416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 16067e38cf2SRalf Baechle 161afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 162afc98d90SAlexander Shiyan bool 163afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 164afc98d90SAlexander Shiyan select IRQ_DOMAIN 165*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 166afc98d90SAlexander Shiyan select SPARSE_IRQ 167afc98d90SAlexander Shiyan default y 168afc98d90SAlexander Shiyan 1699b54470aSStafford Horneconfig OMPIC 1709b54470aSStafford Horne bool 1719b54470aSStafford Horne 1724db8e6d2SStefan Kristianssonconfig OR1K_PIC 1734db8e6d2SStefan Kristiansson bool 1744db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1754db8e6d2SStefan Kristiansson 1768598066cSFelipe Balbiconfig OMAP_IRQCHIP 1778598066cSFelipe Balbi bool 1788598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1798598066cSFelipe Balbi select IRQ_DOMAIN 1808598066cSFelipe Balbi 1819dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1829dbd90f1SSebastian Hesselbarth bool 1839dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 184*4f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1859dbd90f1SSebastian Hesselbarth 186aaa8666aSCristian Birsanconfig PIC32_EVIC 187aaa8666aSCristian Birsan bool 188aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 189aaa8666aSCristian Birsan select IRQ_DOMAIN 190aaa8666aSCristian Birsan 191981b58f6SRich Felkerconfig JCORE_AIC 1923602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 1933602ffdeSRich Felker depends on OF 194981b58f6SRich Felker select IRQ_DOMAIN 195981b58f6SRich Felker help 196981b58f6SRich Felker Support for the J-Core integrated AIC. 197981b58f6SRich Felker 19844358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 19944358048SMagnus Damm bool 20044358048SMagnus Damm select IRQ_DOMAIN 20144358048SMagnus Damm 202fbc83b7fSMagnus Dammconfig RENESAS_IRQC 203fbc83b7fSMagnus Damm bool 20499c221dfSMagnus Damm select GENERIC_IRQ_CHIP 205fbc83b7fSMagnus Damm select IRQ_DOMAIN 206fbc83b7fSMagnus Damm 20707088484SLee Jonesconfig ST_IRQCHIP 20807088484SLee Jones bool 20907088484SLee Jones select REGMAP 21007088484SLee Jones select MFD_SYSCON 21107088484SLee Jones help 21207088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 21307088484SLee Jones 2144bba6689SMans Rullgardconfig TANGO_IRQ 2154bba6689SMans Rullgard bool 2164bba6689SMans Rullgard select IRQ_DOMAIN 2174bba6689SMans Rullgard select GENERIC_IRQ_CHIP 2184bba6689SMans Rullgard 219b06eb017SChristian Ruppertconfig TB10X_IRQC 220b06eb017SChristian Ruppert bool 221b06eb017SChristian Ruppert select IRQ_DOMAIN 222b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 223b06eb017SChristian Ruppert 224d01f8633SDamien Riegelconfig TS4800_IRQ 225d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 226d01f8633SDamien Riegel select IRQ_DOMAIN 2270df337cfSRichard Weinberger depends on HAS_IOMEM 228d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 229d01f8633SDamien Riegel help 230d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 231d01f8633SDamien Riegel 2322389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2332389d501SLinus Walleij bool 2342389d501SLinus Walleij select IRQ_DOMAIN 2352389d501SLinus Walleij 2362389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2372389d501SLinus Walleij int 2382389d501SLinus Walleij default 4 2392389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 24026a8e96aSMax Filippov 24126a8e96aSMax Filippovconfig XTENSA_MX 24226a8e96aSMax Filippov bool 24326a8e96aSMax Filippov select IRQ_DOMAIN 24450091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 24596ca848eSSricharan R 2460547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2470547dc78SZubair Lutfullah Kakakhel bool 2480547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2490547dc78SZubair Lutfullah Kakakhel 25096ca848eSSricharan Rconfig IRQ_CROSSBAR 25196ca848eSSricharan R bool 25296ca848eSSricharan R help 253f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 25496ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 25596ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 25696ca848eSSricharan R routed to one of the free irqchip interrupt lines. 25789323f8cSGrygorii Strashko 25889323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 25989323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 26089323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 26189323f8cSGrygorii Strashko help 26289323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 26389323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2648a19b8f1SAndrew Bresticker 2658a19b8f1SAndrew Brestickerconfig MIPS_GIC 2668a19b8f1SAndrew Bresticker bool 267bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2682af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2698a19b8f1SAndrew Bresticker select MIPS_CM 2708a764482SYoshinori Sato 27144e08e70SPaul Burtonconfig INGENIC_IRQ 27244e08e70SPaul Burton bool 27344e08e70SPaul Burton depends on MACH_INGENIC 27444e08e70SPaul Burton default y 27578c10e55SLinus Torvalds 2768a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2778a764482SYoshinori Sato bool 2788a764482SYoshinori Sato select IRQ_DOMAIN 2798a764482SYoshinori Sato 2808a764482SYoshinori Satoconfig RENESAS_H8S_INTC 2818a764482SYoshinori Sato bool 2828a764482SYoshinori Sato select IRQ_DOMAIN 283e324c4dcSShenwei Wang 284e324c4dcSShenwei Wangconfig IMX_GPCV2 285e324c4dcSShenwei Wang bool 286e324c4dcSShenwei Wang select IRQ_DOMAIN 287e324c4dcSShenwei Wang help 288e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 2897e4ac676SOleksij Rempel 2907e4ac676SOleksij Rempelconfig IRQ_MXS 2917e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 2927e4ac676SOleksij Rempel select IRQ_DOMAIN 2937e4ac676SOleksij Rempel select STMP_DEVICE 294c27f29bbSThomas Petazzoni 29519d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 29619d99164SAlexandre Belloni bool 29719d99164SAlexandre Belloni select IRQ_DOMAIN 29819d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 29919d99164SAlexandre Belloni 300a68a63cbSThomas Petazzoniconfig MVEBU_GICP 301a68a63cbSThomas Petazzoni bool 302a68a63cbSThomas Petazzoni 303e0de91a9SThomas Petazzoniconfig MVEBU_ICU 304e0de91a9SThomas Petazzoni bool 305e0de91a9SThomas Petazzoni 306c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 307c27f29bbSThomas Petazzoni bool 308fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3099e2c986cSMarc Zyngier 310a109893bSThomas Petazzoniconfig MVEBU_PIC 311a109893bSThomas Petazzoni bool 312a109893bSThomas Petazzoni 313b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 314b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 315b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 316b8f3ebe6SMinghuan Lian 3179e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3189e2c986cSMarc Zyngier bool 3190efacbbaSLinus Torvalds 32044df427cSNoam Camusconfig EZNPS_GIC 32144df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 322ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 32344df427cSNoam Camus select IRQ_DOMAIN 32444df427cSNoam Camus help 32544df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 326e0720416SAlexandre TORGUE 327e0720416SAlexandre TORGUEconfig STM32_EXTI 328e0720416SAlexandre TORGUE bool 329e0720416SAlexandre TORGUE select IRQ_DOMAIN 3300e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 331f20cc9b0SAgustin Vega-Frias 332f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 333f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 334f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 335f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN 336f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 337f20cc9b0SAgustin Vega-Frias help 338f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 339f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 3405ed34d3aSMasahiro Yamada 3415ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 3425ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 3435ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 3445ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 3455ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 3465ed34d3aSMasahiro Yamada help 3475ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 348c94fb639SRandy Dunlap 349215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 350215f4cc0SJerome Brunet bool "Meson GPIO Interrupt Multiplexer" 351d9ee91c1SThomas Gleixner depends on ARCH_MESON 352215f4cc0SJerome Brunet select IRQ_DOMAIN 353215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 354215f4cc0SJerome Brunet help 355215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 356215f4cc0SJerome Brunet 3574235ff50SMiodrag Dinicconfig GOLDFISH_PIC 3584235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 3594235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 3604235ff50SMiodrag Dinic select IRQ_DOMAIN 3614235ff50SMiodrag Dinic help 3624235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 3634235ff50SMiodrag Dinic for Goldfish based virtual platforms. 3644235ff50SMiodrag Dinic 365f55c73aeSArchana Sathyakumarconfig QCOM_PDC 366f55c73aeSArchana Sathyakumar bool "QCOM PDC" 367f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 368f55c73aeSArchana Sathyakumar select IRQ_DOMAIN 369f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 370f55c73aeSArchana Sathyakumar help 371f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 372f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 373f55c73aeSArchana Sathyakumar 374c94fb639SRandy Dunlapendmenu 375