1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Support for Lite-On LTR501 and similar ambient light and proximity sensors.
4  *
5  * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6  *
7  * 7-bit I2C slave address 0x23
8  *
9  * TODO: IR LED characteristics
10  */
11 
12 #include <linux/module.h>
13 #include <linux/mod_devicetable.h>
14 #include <linux/i2c.h>
15 #include <linux/err.h>
16 #include <linux/delay.h>
17 #include <linux/regmap.h>
18 #include <linux/regulator/consumer.h>
19 
20 #include <linux/iio/iio.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/triggered_buffer.h>
26 
27 #define LTR501_DRV_NAME "ltr501"
28 
29 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
30 #define LTR501_PS_CONTR 0x81 /* PS operation mode */
31 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
32 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
33 #define LTR501_PART_ID 0x86
34 #define LTR501_MANUFAC_ID 0x87
35 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
36 #define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */
37 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
38 #define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */
39 #define LTR501_ALS_PS_STATUS 0x8c
40 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
41 #define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */
42 #define LTR501_INTR 0x8f /* output mode, polarity, mode */
43 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
44 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
45 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
46 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
47 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
48 #define LTR501_MAX_REG 0x9f
49 
50 #define LTR501_ALS_CONTR_SW_RESET BIT(2)
51 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
52 #define LTR501_CONTR_PS_GAIN_SHIFT 2
53 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
54 #define LTR501_CONTR_ACTIVE BIT(1)
55 
56 #define LTR501_STATUS_ALS_INTR BIT(3)
57 #define LTR501_STATUS_ALS_RDY BIT(2)
58 #define LTR501_STATUS_PS_INTR BIT(1)
59 #define LTR501_STATUS_PS_RDY BIT(0)
60 
61 #define LTR501_PS_DATA_MASK 0x7ff
62 #define LTR501_PS_THRESH_MASK 0x7ff
63 #define LTR501_ALS_THRESH_MASK 0xffff
64 
65 #define LTR501_ALS_DEF_PERIOD 500000
66 #define LTR501_PS_DEF_PERIOD 100000
67 
68 #define LTR501_REGMAP_NAME "ltr501_regmap"
69 
70 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
71 			((vis_coeff * vis_data) - (ir_coeff * ir_data))
72 
73 static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
74 
75 static const struct reg_field reg_field_it =
76 				REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
77 static const struct reg_field reg_field_als_intr =
78 				REG_FIELD(LTR501_INTR, 1, 1);
79 static const struct reg_field reg_field_ps_intr =
80 				REG_FIELD(LTR501_INTR, 0, 0);
81 static const struct reg_field reg_field_als_rate =
82 				REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
83 static const struct reg_field reg_field_ps_rate =
84 				REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
85 static const struct reg_field reg_field_als_prst =
86 				REG_FIELD(LTR501_INTR_PRST, 0, 3);
87 static const struct reg_field reg_field_ps_prst =
88 				REG_FIELD(LTR501_INTR_PRST, 4, 7);
89 
90 struct ltr501_samp_table {
91 	int freq_val;  /* repetition frequency in micro HZ*/
92 	int time_val; /* repetition rate in micro seconds */
93 };
94 
95 #define LTR501_RESERVED_GAIN -1
96 
97 enum {
98 	ltr501 = 0,
99 	ltr559,
100 	ltr301,
101 	ltr303,
102 };
103 
104 struct ltr501_gain {
105 	int scale;
106 	int uscale;
107 };
108 
109 static const struct ltr501_gain ltr501_als_gain_tbl[] = {
110 	{1, 0},
111 	{0, 5000},
112 };
113 
114 static const struct ltr501_gain ltr559_als_gain_tbl[] = {
115 	{1, 0},
116 	{0, 500000},
117 	{0, 250000},
118 	{0, 125000},
119 	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
120 	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
121 	{0, 20000},
122 	{0, 10000},
123 };
124 
125 static const struct ltr501_gain ltr501_ps_gain_tbl[] = {
126 	{1, 0},
127 	{0, 250000},
128 	{0, 125000},
129 	{0, 62500},
130 };
131 
132 static const struct ltr501_gain ltr559_ps_gain_tbl[] = {
133 	{0, 62500}, /* x16 gain */
134 	{0, 31250}, /* x32 gain */
135 	{0, 15625}, /* bits X1 are for x64 gain */
136 	{0, 15624},
137 };
138 
139 struct ltr501_chip_info {
140 	u8 partid;
141 	const struct ltr501_gain *als_gain;
142 	int als_gain_tbl_size;
143 	const struct ltr501_gain *ps_gain;
144 	int ps_gain_tbl_size;
145 	u8 als_mode_active;
146 	u8 als_gain_mask;
147 	u8 als_gain_shift;
148 	struct iio_chan_spec const *channels;
149 	const int no_channels;
150 	const struct iio_info *info;
151 	const struct iio_info *info_no_irq;
152 };
153 
154 struct ltr501_data {
155 	struct i2c_client *client;
156 	struct mutex lock_als, lock_ps;
157 	const struct ltr501_chip_info *chip_info;
158 	u8 als_contr, ps_contr;
159 	int als_period, ps_period; /* period in micro seconds */
160 	struct regmap *regmap;
161 	struct regmap_field *reg_it;
162 	struct regmap_field *reg_als_intr;
163 	struct regmap_field *reg_ps_intr;
164 	struct regmap_field *reg_als_rate;
165 	struct regmap_field *reg_ps_rate;
166 	struct regmap_field *reg_als_prst;
167 	struct regmap_field *reg_ps_prst;
168 	uint32_t near_level;
169 };
170 
171 static const struct ltr501_samp_table ltr501_als_samp_table[] = {
172 			{20000000, 50000}, {10000000, 100000},
173 			{5000000, 200000}, {2000000, 500000},
174 			{1000000, 1000000}, {500000, 2000000},
175 			{500000, 2000000}, {500000, 2000000}
176 };
177 
178 static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
179 			{20000000, 50000}, {14285714, 70000},
180 			{10000000, 100000}, {5000000, 200000},
181 			{2000000, 500000}, {1000000, 1000000},
182 			{500000, 2000000}, {500000, 2000000},
183 			{500000, 2000000}
184 };
185 
186 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
187 					   int len, int val, int val2)
188 {
189 	int i, freq;
190 
191 	freq = val * 1000000 + val2;
192 
193 	for (i = 0; i < len; i++) {
194 		if (tab[i].freq_val == freq)
195 			return i;
196 	}
197 
198 	return -EINVAL;
199 }
200 
201 static int ltr501_als_read_samp_freq(const struct ltr501_data *data,
202 				     int *val, int *val2)
203 {
204 	int ret, i;
205 
206 	ret = regmap_field_read(data->reg_als_rate, &i);
207 	if (ret < 0)
208 		return ret;
209 
210 	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
211 		return -EINVAL;
212 
213 	*val = ltr501_als_samp_table[i].freq_val / 1000000;
214 	*val2 = ltr501_als_samp_table[i].freq_val % 1000000;
215 
216 	return IIO_VAL_INT_PLUS_MICRO;
217 }
218 
219 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data,
220 				    int *val, int *val2)
221 {
222 	int ret, i;
223 
224 	ret = regmap_field_read(data->reg_ps_rate, &i);
225 	if (ret < 0)
226 		return ret;
227 
228 	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
229 		return -EINVAL;
230 
231 	*val = ltr501_ps_samp_table[i].freq_val / 1000000;
232 	*val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
233 
234 	return IIO_VAL_INT_PLUS_MICRO;
235 }
236 
237 static int ltr501_als_write_samp_freq(struct ltr501_data *data,
238 				      int val, int val2)
239 {
240 	int i, ret;
241 
242 	i = ltr501_match_samp_freq(ltr501_als_samp_table,
243 				   ARRAY_SIZE(ltr501_als_samp_table),
244 				   val, val2);
245 
246 	if (i < 0)
247 		return i;
248 
249 	mutex_lock(&data->lock_als);
250 	ret = regmap_field_write(data->reg_als_rate, i);
251 	mutex_unlock(&data->lock_als);
252 
253 	return ret;
254 }
255 
256 static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
257 				     int val, int val2)
258 {
259 	int i, ret;
260 
261 	i = ltr501_match_samp_freq(ltr501_ps_samp_table,
262 				   ARRAY_SIZE(ltr501_ps_samp_table),
263 				   val, val2);
264 
265 	if (i < 0)
266 		return i;
267 
268 	mutex_lock(&data->lock_ps);
269 	ret = regmap_field_write(data->reg_ps_rate, i);
270 	mutex_unlock(&data->lock_ps);
271 
272 	return ret;
273 }
274 
275 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val)
276 {
277 	int ret, i;
278 
279 	ret = regmap_field_read(data->reg_als_rate, &i);
280 	if (ret < 0)
281 		return ret;
282 
283 	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
284 		return -EINVAL;
285 
286 	*val = ltr501_als_samp_table[i].time_val;
287 
288 	return IIO_VAL_INT;
289 }
290 
291 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val)
292 {
293 	int ret, i;
294 
295 	ret = regmap_field_read(data->reg_ps_rate, &i);
296 	if (ret < 0)
297 		return ret;
298 
299 	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
300 		return -EINVAL;
301 
302 	*val = ltr501_ps_samp_table[i].time_val;
303 
304 	return IIO_VAL_INT;
305 }
306 
307 /* IR and visible spectrum coeff's are given in data sheet */
308 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
309 {
310 	unsigned long ratio, lux;
311 
312 	if (vis_data == 0)
313 		return 0;
314 
315 	/* multiply numerator by 100 to avoid handling ratio < 1 */
316 	ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
317 
318 	if (ratio < 45)
319 		lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
320 	else if (ratio >= 45 && ratio < 64)
321 		lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
322 	else if (ratio >= 64 && ratio < 85)
323 		lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
324 	else
325 		lux = 0;
326 
327 	return lux / 1000;
328 }
329 
330 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask)
331 {
332 	int tries = 100;
333 	int ret, status;
334 
335 	while (tries--) {
336 		ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
337 		if (ret < 0)
338 			return ret;
339 		if ((status & drdy_mask) == drdy_mask)
340 			return 0;
341 		msleep(25);
342 	}
343 
344 	dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
345 	return -EIO;
346 }
347 
348 static int ltr501_set_it_time(struct ltr501_data *data, int it)
349 {
350 	int ret, i, index = -1, status;
351 
352 	for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
353 		if (int_time_mapping[i] == it) {
354 			index = i;
355 			break;
356 		}
357 	}
358 	/* Make sure integ time index is valid */
359 	if (index < 0)
360 		return -EINVAL;
361 
362 	ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
363 	if (ret < 0)
364 		return ret;
365 
366 	if (status & LTR501_CONTR_ALS_GAIN_MASK) {
367 		/*
368 		 * 200 ms and 400 ms integ time can only be
369 		 * used in dynamic range 1
370 		 */
371 		if (index > 1)
372 			return -EINVAL;
373 	} else
374 		/* 50 ms integ time can only be used in dynamic range 2 */
375 		if (index == 1)
376 			return -EINVAL;
377 
378 	return regmap_field_write(data->reg_it, index);
379 }
380 
381 /* read int time in micro seconds */
382 static int ltr501_read_it_time(const struct ltr501_data *data,
383 			       int *val, int *val2)
384 {
385 	int ret, index;
386 
387 	ret = regmap_field_read(data->reg_it, &index);
388 	if (ret < 0)
389 		return ret;
390 
391 	/* Make sure integ time index is valid */
392 	if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
393 		return -EINVAL;
394 
395 	*val2 = int_time_mapping[index];
396 	*val = 0;
397 
398 	return IIO_VAL_INT_PLUS_MICRO;
399 }
400 
401 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2])
402 {
403 	int ret;
404 
405 	ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
406 	if (ret < 0)
407 		return ret;
408 	/* always read both ALS channels in given order */
409 	return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
410 				buf, 2 * sizeof(__le16));
411 }
412 
413 static int ltr501_read_ps(const struct ltr501_data *data)
414 {
415 	__le16 status;
416 	int ret;
417 
418 	ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
419 	if (ret < 0)
420 		return ret;
421 
422 	ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
423 			       &status, sizeof(status));
424 	if (ret < 0)
425 		return ret;
426 
427 	return le16_to_cpu(status);
428 }
429 
430 static int ltr501_read_intr_prst(const struct ltr501_data *data,
431 				 enum iio_chan_type type,
432 				 int *val2)
433 {
434 	int ret, samp_period, prst;
435 
436 	switch (type) {
437 	case IIO_INTENSITY:
438 		ret = regmap_field_read(data->reg_als_prst, &prst);
439 		if (ret < 0)
440 			return ret;
441 
442 		ret = ltr501_als_read_samp_period(data, &samp_period);
443 
444 		if (ret < 0)
445 			return ret;
446 		*val2 = samp_period * prst;
447 		return IIO_VAL_INT_PLUS_MICRO;
448 	case IIO_PROXIMITY:
449 		ret = regmap_field_read(data->reg_ps_prst, &prst);
450 		if (ret < 0)
451 			return ret;
452 
453 		ret = ltr501_ps_read_samp_period(data, &samp_period);
454 
455 		if (ret < 0)
456 			return ret;
457 
458 		*val2 = samp_period * prst;
459 		return IIO_VAL_INT_PLUS_MICRO;
460 	default:
461 		return -EINVAL;
462 	}
463 
464 	return -EINVAL;
465 }
466 
467 static int ltr501_write_intr_prst(struct ltr501_data *data,
468 				  enum iio_chan_type type,
469 				  int val, int val2)
470 {
471 	int ret, samp_period, new_val;
472 	unsigned long period;
473 
474 	if (val < 0 || val2 < 0)
475 		return -EINVAL;
476 
477 	/* period in microseconds */
478 	period = ((val * 1000000) + val2);
479 
480 	switch (type) {
481 	case IIO_INTENSITY:
482 		ret = ltr501_als_read_samp_period(data, &samp_period);
483 		if (ret < 0)
484 			return ret;
485 
486 		/* period should be atleast equal to sampling period */
487 		if (period < samp_period)
488 			return -EINVAL;
489 
490 		new_val = DIV_ROUND_UP(period, samp_period);
491 		if (new_val < 0 || new_val > 0x0f)
492 			return -EINVAL;
493 
494 		mutex_lock(&data->lock_als);
495 		ret = regmap_field_write(data->reg_als_prst, new_val);
496 		mutex_unlock(&data->lock_als);
497 		if (ret >= 0)
498 			data->als_period = period;
499 
500 		return ret;
501 	case IIO_PROXIMITY:
502 		ret = ltr501_ps_read_samp_period(data, &samp_period);
503 		if (ret < 0)
504 			return ret;
505 
506 		/* period should be atleast equal to rate */
507 		if (period < samp_period)
508 			return -EINVAL;
509 
510 		new_val = DIV_ROUND_UP(period, samp_period);
511 		if (new_val < 0 || new_val > 0x0f)
512 			return -EINVAL;
513 
514 		mutex_lock(&data->lock_ps);
515 		ret = regmap_field_write(data->reg_ps_prst, new_val);
516 		mutex_unlock(&data->lock_ps);
517 		if (ret >= 0)
518 			data->ps_period = period;
519 
520 		return ret;
521 	default:
522 		return -EINVAL;
523 	}
524 
525 	return -EINVAL;
526 }
527 
528 static ssize_t ltr501_read_near_level(struct iio_dev *indio_dev,
529 				      uintptr_t priv,
530 				      const struct iio_chan_spec *chan,
531 				      char *buf)
532 {
533 	struct ltr501_data *data = iio_priv(indio_dev);
534 
535 	return sprintf(buf, "%u\n", data->near_level);
536 }
537 
538 static const struct iio_chan_spec_ext_info ltr501_ext_info[] = {
539 	{
540 		.name = "nearlevel",
541 		.shared = IIO_SEPARATE,
542 		.read = ltr501_read_near_level,
543 	},
544 	{ }
545 };
546 
547 static const struct iio_event_spec ltr501_als_event_spec[] = {
548 	{
549 		.type = IIO_EV_TYPE_THRESH,
550 		.dir = IIO_EV_DIR_RISING,
551 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
552 	}, {
553 		.type = IIO_EV_TYPE_THRESH,
554 		.dir = IIO_EV_DIR_FALLING,
555 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
556 	}, {
557 		.type = IIO_EV_TYPE_THRESH,
558 		.dir = IIO_EV_DIR_EITHER,
559 		.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
560 				 BIT(IIO_EV_INFO_PERIOD),
561 	},
562 
563 };
564 
565 static const struct iio_event_spec ltr501_pxs_event_spec[] = {
566 	{
567 		.type = IIO_EV_TYPE_THRESH,
568 		.dir = IIO_EV_DIR_RISING,
569 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
570 	}, {
571 		.type = IIO_EV_TYPE_THRESH,
572 		.dir = IIO_EV_DIR_FALLING,
573 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
574 	}, {
575 		.type = IIO_EV_TYPE_THRESH,
576 		.dir = IIO_EV_DIR_EITHER,
577 		.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
578 				 BIT(IIO_EV_INFO_PERIOD),
579 	},
580 };
581 
582 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
583 				 _evspec, _evsize) { \
584 	.type = IIO_INTENSITY, \
585 	.modified = 1, \
586 	.address = (_addr), \
587 	.channel2 = (_mod), \
588 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
589 	.info_mask_shared_by_type = (_shared), \
590 	.scan_index = (_idx), \
591 	.scan_type = { \
592 		.sign = 'u', \
593 		.realbits = 16, \
594 		.storagebits = 16, \
595 		.endianness = IIO_CPU, \
596 	}, \
597 	.event_spec = _evspec,\
598 	.num_event_specs = _evsize,\
599 }
600 
601 #define LTR501_LIGHT_CHANNEL() { \
602 	.type = IIO_LIGHT, \
603 	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
604 	.scan_index = -1, \
605 }
606 
607 static const struct iio_chan_spec ltr501_channels[] = {
608 	LTR501_LIGHT_CHANNEL(),
609 	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
610 				 ltr501_als_event_spec,
611 				 ARRAY_SIZE(ltr501_als_event_spec)),
612 	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
613 				 BIT(IIO_CHAN_INFO_SCALE) |
614 				 BIT(IIO_CHAN_INFO_INT_TIME) |
615 				 BIT(IIO_CHAN_INFO_SAMP_FREQ),
616 				 NULL, 0),
617 	{
618 		.type = IIO_PROXIMITY,
619 		.address = LTR501_PS_DATA,
620 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
621 			BIT(IIO_CHAN_INFO_SCALE),
622 		.scan_index = 2,
623 		.scan_type = {
624 			.sign = 'u',
625 			.realbits = 11,
626 			.storagebits = 16,
627 			.endianness = IIO_CPU,
628 		},
629 		.event_spec = ltr501_pxs_event_spec,
630 		.num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
631 		.ext_info = ltr501_ext_info,
632 	},
633 	IIO_CHAN_SOFT_TIMESTAMP(3),
634 };
635 
636 static const struct iio_chan_spec ltr301_channels[] = {
637 	LTR501_LIGHT_CHANNEL(),
638 	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
639 				 ltr501_als_event_spec,
640 				 ARRAY_SIZE(ltr501_als_event_spec)),
641 	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
642 				 BIT(IIO_CHAN_INFO_SCALE) |
643 				 BIT(IIO_CHAN_INFO_INT_TIME) |
644 				 BIT(IIO_CHAN_INFO_SAMP_FREQ),
645 				 NULL, 0),
646 	IIO_CHAN_SOFT_TIMESTAMP(2),
647 };
648 
649 static int ltr501_read_info_raw(struct ltr501_data *data,
650 				struct iio_chan_spec const *chan,
651 				int *val)
652 {
653 	__le16 buf[2];
654 	int ret;
655 
656 	switch (chan->type) {
657 	case IIO_INTENSITY:
658 		mutex_lock(&data->lock_als);
659 		ret = ltr501_read_als(data, buf);
660 		mutex_unlock(&data->lock_als);
661 		if (ret < 0)
662 			return ret;
663 		*val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
664 				   buf[0] : buf[1]);
665 		return IIO_VAL_INT;
666 	case IIO_PROXIMITY:
667 		mutex_lock(&data->lock_ps);
668 		ret = ltr501_read_ps(data);
669 		mutex_unlock(&data->lock_ps);
670 		if (ret < 0)
671 			return ret;
672 		*val = ret & LTR501_PS_DATA_MASK;
673 		return IIO_VAL_INT;
674 	default:
675 		return -EINVAL;
676 	}
677 }
678 
679 static int ltr501_read_raw(struct iio_dev *indio_dev,
680 			   struct iio_chan_spec const *chan,
681 			   int *val, int *val2, long mask)
682 {
683 	struct ltr501_data *data = iio_priv(indio_dev);
684 	__le16 buf[2];
685 	int ret, i;
686 
687 	switch (mask) {
688 	case IIO_CHAN_INFO_PROCESSED:
689 		switch (chan->type) {
690 		case IIO_LIGHT:
691 			if (!iio_device_claim_direct(indio_dev))
692 				return -EBUSY;
693 
694 			mutex_lock(&data->lock_als);
695 			ret = ltr501_read_als(data, buf);
696 			mutex_unlock(&data->lock_als);
697 			iio_device_release_direct(indio_dev);
698 			if (ret < 0)
699 				return ret;
700 			*val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
701 						    le16_to_cpu(buf[0]));
702 			return IIO_VAL_INT;
703 		default:
704 			return -EINVAL;
705 		}
706 	case IIO_CHAN_INFO_RAW:
707 		if (!iio_device_claim_direct(indio_dev))
708 			return -EBUSY;
709 
710 		ret = ltr501_read_info_raw(data, chan, val);
711 
712 		iio_device_release_direct(indio_dev);
713 		return ret;
714 
715 	case IIO_CHAN_INFO_SCALE:
716 		switch (chan->type) {
717 		case IIO_INTENSITY:
718 			i = (data->als_contr & data->chip_info->als_gain_mask)
719 			     >> data->chip_info->als_gain_shift;
720 			*val = data->chip_info->als_gain[i].scale;
721 			*val2 = data->chip_info->als_gain[i].uscale;
722 			return IIO_VAL_INT_PLUS_MICRO;
723 		case IIO_PROXIMITY:
724 			i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
725 				LTR501_CONTR_PS_GAIN_SHIFT;
726 			*val = data->chip_info->ps_gain[i].scale;
727 			*val2 = data->chip_info->ps_gain[i].uscale;
728 			return IIO_VAL_INT_PLUS_MICRO;
729 		default:
730 			return -EINVAL;
731 		}
732 	case IIO_CHAN_INFO_INT_TIME:
733 		switch (chan->type) {
734 		case IIO_INTENSITY:
735 			return ltr501_read_it_time(data, val, val2);
736 		default:
737 			return -EINVAL;
738 		}
739 	case IIO_CHAN_INFO_SAMP_FREQ:
740 		switch (chan->type) {
741 		case IIO_INTENSITY:
742 			return ltr501_als_read_samp_freq(data, val, val2);
743 		case IIO_PROXIMITY:
744 			return ltr501_ps_read_samp_freq(data, val, val2);
745 		default:
746 			return -EINVAL;
747 		}
748 	}
749 	return -EINVAL;
750 }
751 
752 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size,
753 				 int val, int val2)
754 {
755 	int i;
756 
757 	for (i = 0; i < size; i++)
758 		if (val == gain[i].scale && val2 == gain[i].uscale)
759 			return i;
760 
761 	return -1;
762 }
763 
764 static int __ltr501_write_raw(struct iio_dev *indio_dev,
765 			      struct iio_chan_spec const *chan,
766 			      int val, int val2, long mask)
767 {
768 	struct ltr501_data *data = iio_priv(indio_dev);
769 	int i, ret, freq_val, freq_val2;
770 	const struct ltr501_chip_info *info = data->chip_info;
771 
772 	switch (mask) {
773 	case IIO_CHAN_INFO_SCALE:
774 		switch (chan->type) {
775 		case IIO_INTENSITY:
776 			i = ltr501_get_gain_index(info->als_gain,
777 						  info->als_gain_tbl_size,
778 						  val, val2);
779 			if (i < 0)
780 				return -EINVAL;
781 
782 			data->als_contr &= ~info->als_gain_mask;
783 			data->als_contr |= i << info->als_gain_shift;
784 
785 			return regmap_write(data->regmap, LTR501_ALS_CONTR,
786 					    data->als_contr);
787 		case IIO_PROXIMITY:
788 			i = ltr501_get_gain_index(info->ps_gain,
789 						  info->ps_gain_tbl_size,
790 						  val, val2);
791 			if (i < 0)
792 				return -EINVAL;
793 
794 			data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
795 			data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
796 
797 			return regmap_write(data->regmap, LTR501_PS_CONTR,
798 					    data->ps_contr);
799 		default:
800 			return -EINVAL;
801 		}
802 
803 	case IIO_CHAN_INFO_INT_TIME:
804 		switch (chan->type) {
805 		case IIO_INTENSITY:
806 			if (val != 0)
807 				return -EINVAL;
808 
809 			mutex_lock(&data->lock_als);
810 			ret = ltr501_set_it_time(data, val2);
811 			mutex_unlock(&data->lock_als);
812 			return ret;
813 		default:
814 			return -EINVAL;
815 		}
816 
817 	case IIO_CHAN_INFO_SAMP_FREQ:
818 		switch (chan->type) {
819 		case IIO_INTENSITY:
820 			ret = ltr501_als_read_samp_freq(data, &freq_val,
821 							&freq_val2);
822 			if (ret < 0)
823 				return ret;
824 
825 			ret = ltr501_als_write_samp_freq(data, val, val2);
826 			if (ret < 0)
827 				return ret;
828 
829 			/* update persistence count when changing frequency */
830 			ret = ltr501_write_intr_prst(data, chan->type,
831 						     0, data->als_period);
832 
833 			if (ret < 0)
834 				/* Do not ovewrite error */
835 				ltr501_als_write_samp_freq(data, freq_val,
836 							   freq_val2);
837 			return ret;
838 		case IIO_PROXIMITY:
839 			ret = ltr501_ps_read_samp_freq(data, &freq_val,
840 						       &freq_val2);
841 			if (ret < 0)
842 				return ret;
843 
844 			ret = ltr501_ps_write_samp_freq(data, val, val2);
845 			if (ret < 0)
846 				return ret;
847 
848 			/* update persistence count when changing frequency */
849 			ret = ltr501_write_intr_prst(data, chan->type,
850 						     0, data->ps_period);
851 
852 			if (ret < 0)
853 				/* Do not overwrite error */
854 				ltr501_ps_write_samp_freq(data, freq_val,
855 							  freq_val2);
856 			return ret;
857 		default:
858 			return -EINVAL;
859 		}
860 	default:
861 		return -EINVAL;
862 	}
863 }
864 
865 static int ltr501_write_raw(struct iio_dev *indio_dev,
866 			    struct iio_chan_spec const *chan,
867 			    int val, int val2, long mask)
868 {
869 	int ret;
870 
871 	if (!iio_device_claim_direct(indio_dev))
872 		return -EBUSY;
873 
874 	ret = __ltr501_write_raw(indio_dev, chan, val, val2, mask);
875 
876 	iio_device_release_direct(indio_dev);
877 
878 	return ret;
879 }
880 
881 static int ltr501_read_thresh(const struct iio_dev *indio_dev,
882 			      const struct iio_chan_spec *chan,
883 			      enum iio_event_type type,
884 			      enum iio_event_direction dir,
885 			      enum iio_event_info info,
886 			      int *val, int *val2)
887 {
888 	const struct ltr501_data *data = iio_priv(indio_dev);
889 	int ret, thresh_data;
890 
891 	switch (chan->type) {
892 	case IIO_INTENSITY:
893 		switch (dir) {
894 		case IIO_EV_DIR_RISING:
895 			ret = regmap_bulk_read(data->regmap,
896 					       LTR501_ALS_THRESH_UP,
897 					       &thresh_data, 2);
898 			if (ret < 0)
899 				return ret;
900 			*val = thresh_data & LTR501_ALS_THRESH_MASK;
901 			return IIO_VAL_INT;
902 		case IIO_EV_DIR_FALLING:
903 			ret = regmap_bulk_read(data->regmap,
904 					       LTR501_ALS_THRESH_LOW,
905 					       &thresh_data, 2);
906 			if (ret < 0)
907 				return ret;
908 			*val = thresh_data & LTR501_ALS_THRESH_MASK;
909 			return IIO_VAL_INT;
910 		default:
911 			return -EINVAL;
912 		}
913 	case IIO_PROXIMITY:
914 		switch (dir) {
915 		case IIO_EV_DIR_RISING:
916 			ret = regmap_bulk_read(data->regmap,
917 					       LTR501_PS_THRESH_UP,
918 					       &thresh_data, 2);
919 			if (ret < 0)
920 				return ret;
921 			*val = thresh_data & LTR501_PS_THRESH_MASK;
922 			return IIO_VAL_INT;
923 		case IIO_EV_DIR_FALLING:
924 			ret = regmap_bulk_read(data->regmap,
925 					       LTR501_PS_THRESH_LOW,
926 					       &thresh_data, 2);
927 			if (ret < 0)
928 				return ret;
929 			*val = thresh_data & LTR501_PS_THRESH_MASK;
930 			return IIO_VAL_INT;
931 		default:
932 			return -EINVAL;
933 		}
934 	default:
935 		return -EINVAL;
936 	}
937 
938 	return -EINVAL;
939 }
940 
941 static int ltr501_write_thresh(struct iio_dev *indio_dev,
942 			       const struct iio_chan_spec *chan,
943 			       enum iio_event_type type,
944 			       enum iio_event_direction dir,
945 			       enum iio_event_info info,
946 			       int val, int val2)
947 {
948 	struct ltr501_data *data = iio_priv(indio_dev);
949 	int ret;
950 
951 	if (val < 0)
952 		return -EINVAL;
953 
954 	switch (chan->type) {
955 	case IIO_INTENSITY:
956 		if (val > LTR501_ALS_THRESH_MASK)
957 			return -EINVAL;
958 		switch (dir) {
959 		case IIO_EV_DIR_RISING:
960 			mutex_lock(&data->lock_als);
961 			ret = regmap_bulk_write(data->regmap,
962 						LTR501_ALS_THRESH_UP,
963 						&val, 2);
964 			mutex_unlock(&data->lock_als);
965 			return ret;
966 		case IIO_EV_DIR_FALLING:
967 			mutex_lock(&data->lock_als);
968 			ret = regmap_bulk_write(data->regmap,
969 						LTR501_ALS_THRESH_LOW,
970 						&val, 2);
971 			mutex_unlock(&data->lock_als);
972 			return ret;
973 		default:
974 			return -EINVAL;
975 		}
976 	case IIO_PROXIMITY:
977 		if (val > LTR501_PS_THRESH_MASK)
978 			return -EINVAL;
979 		switch (dir) {
980 		case IIO_EV_DIR_RISING:
981 			mutex_lock(&data->lock_ps);
982 			ret = regmap_bulk_write(data->regmap,
983 						LTR501_PS_THRESH_UP,
984 						&val, 2);
985 			mutex_unlock(&data->lock_ps);
986 			return ret;
987 		case IIO_EV_DIR_FALLING:
988 			mutex_lock(&data->lock_ps);
989 			ret = regmap_bulk_write(data->regmap,
990 						LTR501_PS_THRESH_LOW,
991 						&val, 2);
992 			mutex_unlock(&data->lock_ps);
993 			return ret;
994 		default:
995 			return -EINVAL;
996 		}
997 	default:
998 		return -EINVAL;
999 	}
1000 
1001 	return -EINVAL;
1002 }
1003 
1004 static int ltr501_read_event(struct iio_dev *indio_dev,
1005 			     const struct iio_chan_spec *chan,
1006 			     enum iio_event_type type,
1007 			     enum iio_event_direction dir,
1008 			     enum iio_event_info info,
1009 			     int *val, int *val2)
1010 {
1011 	int ret;
1012 
1013 	switch (info) {
1014 	case IIO_EV_INFO_VALUE:
1015 		return ltr501_read_thresh(indio_dev, chan, type, dir,
1016 					  info, val, val2);
1017 	case IIO_EV_INFO_PERIOD:
1018 		ret = ltr501_read_intr_prst(iio_priv(indio_dev),
1019 					    chan->type, val2);
1020 		*val = *val2 / 1000000;
1021 		*val2 = *val2 % 1000000;
1022 		return ret;
1023 	default:
1024 		return -EINVAL;
1025 	}
1026 
1027 	return -EINVAL;
1028 }
1029 
1030 static int ltr501_write_event(struct iio_dev *indio_dev,
1031 			      const struct iio_chan_spec *chan,
1032 			      enum iio_event_type type,
1033 			      enum iio_event_direction dir,
1034 			      enum iio_event_info info,
1035 			      int val, int val2)
1036 {
1037 	switch (info) {
1038 	case IIO_EV_INFO_VALUE:
1039 		if (val2 != 0)
1040 			return -EINVAL;
1041 		return ltr501_write_thresh(indio_dev, chan, type, dir,
1042 					   info, val, val2);
1043 	case IIO_EV_INFO_PERIOD:
1044 		return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1045 					      val, val2);
1046 	default:
1047 		return -EINVAL;
1048 	}
1049 
1050 	return -EINVAL;
1051 }
1052 
1053 static int ltr501_read_event_config(struct iio_dev *indio_dev,
1054 				    const struct iio_chan_spec *chan,
1055 				    enum iio_event_type type,
1056 				    enum iio_event_direction dir)
1057 {
1058 	struct ltr501_data *data = iio_priv(indio_dev);
1059 	int ret, status;
1060 
1061 	switch (chan->type) {
1062 	case IIO_INTENSITY:
1063 		ret = regmap_field_read(data->reg_als_intr, &status);
1064 		if (ret < 0)
1065 			return ret;
1066 		return status;
1067 	case IIO_PROXIMITY:
1068 		ret = regmap_field_read(data->reg_ps_intr, &status);
1069 		if (ret < 0)
1070 			return ret;
1071 		return status;
1072 	default:
1073 		return -EINVAL;
1074 	}
1075 
1076 	return -EINVAL;
1077 }
1078 
1079 static int ltr501_write_event_config(struct iio_dev *indio_dev,
1080 				     const struct iio_chan_spec *chan,
1081 				     enum iio_event_type type,
1082 				     enum iio_event_direction dir, bool state)
1083 {
1084 	struct ltr501_data *data = iio_priv(indio_dev);
1085 	int ret;
1086 
1087 	switch (chan->type) {
1088 	case IIO_INTENSITY:
1089 		mutex_lock(&data->lock_als);
1090 		ret = regmap_field_write(data->reg_als_intr, state);
1091 		mutex_unlock(&data->lock_als);
1092 		return ret;
1093 	case IIO_PROXIMITY:
1094 		mutex_lock(&data->lock_ps);
1095 		ret = regmap_field_write(data->reg_ps_intr, state);
1096 		mutex_unlock(&data->lock_ps);
1097 		return ret;
1098 	default:
1099 		return -EINVAL;
1100 	}
1101 
1102 	return -EINVAL;
1103 }
1104 
1105 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1106 						 struct device_attribute *attr,
1107 						 char *buf)
1108 {
1109 	struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1110 	const struct ltr501_chip_info *info = data->chip_info;
1111 	ssize_t len = 0;
1112 	int i;
1113 
1114 	for (i = 0; i < info->ps_gain_tbl_size; i++) {
1115 		if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1116 			continue;
1117 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1118 				 info->ps_gain[i].scale,
1119 				 info->ps_gain[i].uscale);
1120 	}
1121 
1122 	buf[len - 1] = '\n';
1123 
1124 	return len;
1125 }
1126 
1127 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1128 						 struct device_attribute *attr,
1129 						 char *buf)
1130 {
1131 	struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1132 	const struct ltr501_chip_info *info = data->chip_info;
1133 	ssize_t len = 0;
1134 	int i;
1135 
1136 	for (i = 0; i < info->als_gain_tbl_size; i++) {
1137 		if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1138 			continue;
1139 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1140 				 info->als_gain[i].scale,
1141 				 info->als_gain[i].uscale);
1142 	}
1143 
1144 	buf[len - 1] = '\n';
1145 
1146 	return len;
1147 }
1148 
1149 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1150 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1151 
1152 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1153 		       ltr501_show_proximity_scale_avail, NULL, 0);
1154 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1155 		       ltr501_show_intensity_scale_avail, NULL, 0);
1156 
1157 static struct attribute *ltr501_attributes[] = {
1158 	&iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1159 	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1160 	&iio_const_attr_integration_time_available.dev_attr.attr,
1161 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1162 	NULL
1163 };
1164 
1165 static struct attribute *ltr301_attributes[] = {
1166 	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1167 	&iio_const_attr_integration_time_available.dev_attr.attr,
1168 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1169 	NULL
1170 };
1171 
1172 static const struct attribute_group ltr501_attribute_group = {
1173 	.attrs = ltr501_attributes,
1174 };
1175 
1176 static const struct attribute_group ltr301_attribute_group = {
1177 	.attrs = ltr301_attributes,
1178 };
1179 
1180 static const struct iio_info ltr501_info_no_irq = {
1181 	.read_raw = ltr501_read_raw,
1182 	.write_raw = ltr501_write_raw,
1183 	.attrs = &ltr501_attribute_group,
1184 };
1185 
1186 static const struct iio_info ltr501_info = {
1187 	.read_raw = ltr501_read_raw,
1188 	.write_raw = ltr501_write_raw,
1189 	.attrs = &ltr501_attribute_group,
1190 	.read_event_value	= &ltr501_read_event,
1191 	.write_event_value	= &ltr501_write_event,
1192 	.read_event_config	= &ltr501_read_event_config,
1193 	.write_event_config	= &ltr501_write_event_config,
1194 };
1195 
1196 static const struct iio_info ltr301_info_no_irq = {
1197 	.read_raw = ltr501_read_raw,
1198 	.write_raw = ltr501_write_raw,
1199 	.attrs = &ltr301_attribute_group,
1200 };
1201 
1202 static const struct iio_info ltr301_info = {
1203 	.read_raw = ltr501_read_raw,
1204 	.write_raw = ltr501_write_raw,
1205 	.attrs = &ltr301_attribute_group,
1206 	.read_event_value	= &ltr501_read_event,
1207 	.write_event_value	= &ltr501_write_event,
1208 	.read_event_config	= &ltr501_read_event_config,
1209 	.write_event_config	= &ltr501_write_event_config,
1210 };
1211 
1212 static const struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1213 	[ltr501] = {
1214 		.partid = 0x08,
1215 		.als_gain = ltr501_als_gain_tbl,
1216 		.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1217 		.ps_gain = ltr501_ps_gain_tbl,
1218 		.ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1219 		.als_mode_active = BIT(0) | BIT(1),
1220 		.als_gain_mask = BIT(3),
1221 		.als_gain_shift = 3,
1222 		.info = &ltr501_info,
1223 		.info_no_irq = &ltr501_info_no_irq,
1224 		.channels = ltr501_channels,
1225 		.no_channels = ARRAY_SIZE(ltr501_channels),
1226 	},
1227 	[ltr559] = {
1228 		.partid = 0x09,
1229 		.als_gain = ltr559_als_gain_tbl,
1230 		.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1231 		.ps_gain = ltr559_ps_gain_tbl,
1232 		.ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1233 		.als_mode_active = BIT(0),
1234 		.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1235 		.als_gain_shift = 2,
1236 		.info = &ltr501_info,
1237 		.info_no_irq = &ltr501_info_no_irq,
1238 		.channels = ltr501_channels,
1239 		.no_channels = ARRAY_SIZE(ltr501_channels),
1240 	},
1241 	[ltr301] = {
1242 		.partid = 0x08,
1243 		.als_gain = ltr501_als_gain_tbl,
1244 		.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1245 		.als_mode_active = BIT(0) | BIT(1),
1246 		.als_gain_mask = BIT(3),
1247 		.als_gain_shift = 3,
1248 		.info = &ltr301_info,
1249 		.info_no_irq = &ltr301_info_no_irq,
1250 		.channels = ltr301_channels,
1251 		.no_channels = ARRAY_SIZE(ltr301_channels),
1252 	},
1253 	[ltr303] = {
1254 		.partid = 0x0A,
1255 		.als_gain = ltr559_als_gain_tbl,
1256 		.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1257 		.als_mode_active = BIT(0),
1258 		.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1259 		.als_gain_shift = 2,
1260 		.info = &ltr301_info,
1261 		.info_no_irq = &ltr301_info_no_irq,
1262 		.channels = ltr301_channels,
1263 		.no_channels = ARRAY_SIZE(ltr301_channels),
1264 	},
1265 };
1266 
1267 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1268 {
1269 	int ret;
1270 
1271 	ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1272 	if (ret < 0)
1273 		return ret;
1274 
1275 	return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1276 }
1277 
1278 static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1279 {
1280 	struct iio_poll_func *pf = p;
1281 	struct iio_dev *indio_dev = pf->indio_dev;
1282 	struct ltr501_data *data = iio_priv(indio_dev);
1283 	struct {
1284 		u16 channels[3];
1285 		aligned_s64 ts;
1286 	} scan;
1287 	__le16 als_buf[2];
1288 	u8 mask = 0;
1289 	int j = 0;
1290 	int ret, psdata;
1291 
1292 	memset(&scan, 0, sizeof(scan));
1293 
1294 	/* figure out which data needs to be ready */
1295 	if (test_bit(0, indio_dev->active_scan_mask) ||
1296 	    test_bit(1, indio_dev->active_scan_mask))
1297 		mask |= LTR501_STATUS_ALS_RDY;
1298 	if (test_bit(2, indio_dev->active_scan_mask))
1299 		mask |= LTR501_STATUS_PS_RDY;
1300 
1301 	ret = ltr501_drdy(data, mask);
1302 	if (ret < 0)
1303 		goto done;
1304 
1305 	if (mask & LTR501_STATUS_ALS_RDY) {
1306 		ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1307 				       als_buf, sizeof(als_buf));
1308 		if (ret < 0)
1309 			goto done;
1310 		if (test_bit(0, indio_dev->active_scan_mask))
1311 			scan.channels[j++] = le16_to_cpu(als_buf[1]);
1312 		if (test_bit(1, indio_dev->active_scan_mask))
1313 			scan.channels[j++] = le16_to_cpu(als_buf[0]);
1314 	}
1315 
1316 	if (mask & LTR501_STATUS_PS_RDY) {
1317 		ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1318 				       &psdata, 2);
1319 		if (ret < 0)
1320 			goto done;
1321 		scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
1322 	}
1323 
1324 	iio_push_to_buffers_with_timestamp(indio_dev, &scan,
1325 					   iio_get_time_ns(indio_dev));
1326 
1327 done:
1328 	iio_trigger_notify_done(indio_dev->trig);
1329 
1330 	return IRQ_HANDLED;
1331 }
1332 
1333 static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1334 {
1335 	struct iio_dev *indio_dev = private;
1336 	struct ltr501_data *data = iio_priv(indio_dev);
1337 	int ret, status;
1338 
1339 	ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1340 	if (ret < 0) {
1341 		dev_err(&data->client->dev,
1342 			"irq read int reg failed\n");
1343 		return IRQ_HANDLED;
1344 	}
1345 
1346 	if (status & LTR501_STATUS_ALS_INTR)
1347 		iio_push_event(indio_dev,
1348 			       IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1349 						    IIO_EV_TYPE_THRESH,
1350 						    IIO_EV_DIR_EITHER),
1351 			       iio_get_time_ns(indio_dev));
1352 
1353 	if (status & LTR501_STATUS_PS_INTR)
1354 		iio_push_event(indio_dev,
1355 			       IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1356 						    IIO_EV_TYPE_THRESH,
1357 						    IIO_EV_DIR_EITHER),
1358 			       iio_get_time_ns(indio_dev));
1359 
1360 	return IRQ_HANDLED;
1361 }
1362 
1363 static int ltr501_init(struct ltr501_data *data)
1364 {
1365 	int ret, status;
1366 
1367 	ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1368 	if (ret < 0)
1369 		return ret;
1370 
1371 	data->als_contr = status | data->chip_info->als_mode_active;
1372 
1373 	ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1374 	if (ret < 0)
1375 		return ret;
1376 
1377 	data->ps_contr = status | LTR501_CONTR_ACTIVE;
1378 
1379 	ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1380 	if (ret < 0)
1381 		return ret;
1382 
1383 	ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1384 	if (ret < 0)
1385 		return ret;
1386 
1387 	return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1388 }
1389 
1390 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1391 {
1392 	switch (reg) {
1393 	case LTR501_ALS_DATA1:
1394 	case LTR501_ALS_DATA1_UPPER:
1395 	case LTR501_ALS_DATA0:
1396 	case LTR501_ALS_DATA0_UPPER:
1397 	case LTR501_ALS_PS_STATUS:
1398 	case LTR501_PS_DATA:
1399 	case LTR501_PS_DATA_UPPER:
1400 		return true;
1401 	default:
1402 		return false;
1403 	}
1404 }
1405 
1406 static const struct regmap_config ltr501_regmap_config = {
1407 	.name =  LTR501_REGMAP_NAME,
1408 	.reg_bits = 8,
1409 	.val_bits = 8,
1410 	.max_register = LTR501_MAX_REG,
1411 	.cache_type = REGCACHE_RBTREE,
1412 	.volatile_reg = ltr501_is_volatile_reg,
1413 };
1414 
1415 static int ltr501_powerdown(struct ltr501_data *data)
1416 {
1417 	return ltr501_write_contr(data, data->als_contr &
1418 				  ~data->chip_info->als_mode_active,
1419 				  data->ps_contr & ~LTR501_CONTR_ACTIVE);
1420 }
1421 
1422 static int ltr501_probe(struct i2c_client *client)
1423 {
1424 	const struct i2c_device_id *id = i2c_client_get_device_id(client);
1425 	static const char * const regulator_names[] = { "vdd", "vddio" };
1426 	struct ltr501_data *data;
1427 	struct iio_dev *indio_dev;
1428 	struct regmap *regmap;
1429 	const void *ddata = NULL;
1430 	int partid, chip_idx;
1431 	const char *name;
1432 	int ret;
1433 
1434 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1435 	if (!indio_dev)
1436 		return -ENOMEM;
1437 
1438 	regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
1439 	if (IS_ERR(regmap)) {
1440 		dev_err(&client->dev, "Regmap initialization failed.\n");
1441 		return PTR_ERR(regmap);
1442 	}
1443 
1444 	data = iio_priv(indio_dev);
1445 	i2c_set_clientdata(client, indio_dev);
1446 	data->client = client;
1447 	data->regmap = regmap;
1448 	mutex_init(&data->lock_als);
1449 	mutex_init(&data->lock_ps);
1450 
1451 	ret = devm_regulator_bulk_get_enable(&client->dev,
1452 					     ARRAY_SIZE(regulator_names),
1453 					     regulator_names);
1454 	if (ret)
1455 		return dev_err_probe(&client->dev, ret,
1456 				     "Failed to get regulators\n");
1457 
1458 	data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1459 					       reg_field_it);
1460 	if (IS_ERR(data->reg_it)) {
1461 		dev_err(&client->dev, "Integ time reg field init failed.\n");
1462 		return PTR_ERR(data->reg_it);
1463 	}
1464 
1465 	data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1466 						     reg_field_als_intr);
1467 	if (IS_ERR(data->reg_als_intr)) {
1468 		dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1469 		return PTR_ERR(data->reg_als_intr);
1470 	}
1471 
1472 	data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1473 						    reg_field_ps_intr);
1474 	if (IS_ERR(data->reg_ps_intr)) {
1475 		dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1476 		return PTR_ERR(data->reg_ps_intr);
1477 	}
1478 
1479 	data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1480 						     reg_field_als_rate);
1481 	if (IS_ERR(data->reg_als_rate)) {
1482 		dev_err(&client->dev, "ALS samp rate field init failed.\n");
1483 		return PTR_ERR(data->reg_als_rate);
1484 	}
1485 
1486 	data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1487 						    reg_field_ps_rate);
1488 	if (IS_ERR(data->reg_ps_rate)) {
1489 		dev_err(&client->dev, "PS samp rate field init failed.\n");
1490 		return PTR_ERR(data->reg_ps_rate);
1491 	}
1492 
1493 	data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1494 						     reg_field_als_prst);
1495 	if (IS_ERR(data->reg_als_prst)) {
1496 		dev_err(&client->dev, "ALS prst reg field init failed\n");
1497 		return PTR_ERR(data->reg_als_prst);
1498 	}
1499 
1500 	data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1501 						    reg_field_ps_prst);
1502 	if (IS_ERR(data->reg_ps_prst)) {
1503 		dev_err(&client->dev, "PS prst reg field init failed.\n");
1504 		return PTR_ERR(data->reg_ps_prst);
1505 	}
1506 
1507 	ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1508 	if (ret < 0)
1509 		return ret;
1510 
1511 	if (id) {
1512 		name = id->name;
1513 		chip_idx = id->driver_data;
1514 	} else {
1515 		name = iio_get_acpi_device_name_and_data(&client->dev, &ddata);
1516 		chip_idx = (intptr_t)ddata;
1517 	}
1518 	if (!name)
1519 		return -ENODEV;
1520 
1521 	data->chip_info = &ltr501_chip_info_tbl[chip_idx];
1522 
1523 	if ((partid >> 4) != data->chip_info->partid)
1524 		return -ENODEV;
1525 
1526 	if (device_property_read_u32(&client->dev, "proximity-near-level",
1527 				     &data->near_level))
1528 		data->near_level = 0;
1529 
1530 	indio_dev->info = data->chip_info->info;
1531 	indio_dev->channels = data->chip_info->channels;
1532 	indio_dev->num_channels = data->chip_info->no_channels;
1533 	indio_dev->name = name;
1534 	indio_dev->modes = INDIO_DIRECT_MODE;
1535 
1536 	ret = ltr501_init(data);
1537 	if (ret < 0)
1538 		return ret;
1539 
1540 	if (client->irq > 0) {
1541 		ret = devm_request_threaded_irq(&client->dev, client->irq,
1542 						NULL, ltr501_interrupt_handler,
1543 						IRQF_TRIGGER_FALLING |
1544 						IRQF_ONESHOT,
1545 						"ltr501_thresh_event",
1546 						indio_dev);
1547 		if (ret) {
1548 			dev_err(&client->dev, "request irq (%d) failed\n",
1549 				client->irq);
1550 			return ret;
1551 		}
1552 	} else {
1553 		indio_dev->info = data->chip_info->info_no_irq;
1554 	}
1555 
1556 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
1557 					 ltr501_trigger_handler, NULL);
1558 	if (ret)
1559 		goto powerdown_on_error;
1560 
1561 	ret = iio_device_register(indio_dev);
1562 	if (ret)
1563 		goto error_unreg_buffer;
1564 
1565 	return 0;
1566 
1567 error_unreg_buffer:
1568 	iio_triggered_buffer_cleanup(indio_dev);
1569 powerdown_on_error:
1570 	ltr501_powerdown(data);
1571 	return ret;
1572 }
1573 
1574 static void ltr501_remove(struct i2c_client *client)
1575 {
1576 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1577 
1578 	iio_device_unregister(indio_dev);
1579 	iio_triggered_buffer_cleanup(indio_dev);
1580 	ltr501_powerdown(iio_priv(indio_dev));
1581 }
1582 
1583 static int ltr501_suspend(struct device *dev)
1584 {
1585 	struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1586 					    to_i2c_client(dev)));
1587 	return ltr501_powerdown(data);
1588 }
1589 
1590 static int ltr501_resume(struct device *dev)
1591 {
1592 	struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1593 					    to_i2c_client(dev)));
1594 
1595 	return ltr501_write_contr(data, data->als_contr,
1596 		data->ps_contr);
1597 }
1598 
1599 static DEFINE_SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1600 
1601 static const struct acpi_device_id ltr_acpi_match[] = {
1602 	{ "LTER0301", ltr301 },
1603 	/* https://www.catalog.update.microsoft.com/Search.aspx?q=lter0303 */
1604 	{ "LTER0303", ltr303 },
1605 	{ }
1606 };
1607 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1608 
1609 static const struct i2c_device_id ltr501_id[] = {
1610 	{ "ltr501", ltr501 },
1611 	{ "ltr559", ltr559 },
1612 	{ "ltr301", ltr301 },
1613 	{ "ltr303", ltr303 },
1614 	{ }
1615 };
1616 MODULE_DEVICE_TABLE(i2c, ltr501_id);
1617 
1618 static const struct of_device_id ltr501_of_match[] = {
1619 	{ .compatible = "liteon,ltr501", },
1620 	{ .compatible = "liteon,ltr559", },
1621 	{ .compatible = "liteon,ltr301", },
1622 	{ .compatible = "liteon,ltr303", },
1623 	{ }
1624 };
1625 MODULE_DEVICE_TABLE(of, ltr501_of_match);
1626 
1627 static struct i2c_driver ltr501_driver = {
1628 	.driver = {
1629 		.name   = LTR501_DRV_NAME,
1630 		.of_match_table = ltr501_of_match,
1631 		.pm	= pm_sleep_ptr(&ltr501_pm_ops),
1632 		.acpi_match_table = ltr_acpi_match,
1633 	},
1634 	.probe = ltr501_probe,
1635 	.remove	= ltr501_remove,
1636 	.id_table = ltr501_id,
1637 };
1638 
1639 module_i2c_driver(ltr501_driver);
1640 
1641 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1642 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1643 MODULE_LICENSE("GPL");
1644