1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ADXRS290 SPI Gyroscope Driver 4 * 5 * Copyright (C) 2020 Nishant Malpani <nish.malpani25@gmail.com> 6 * Copyright (C) 2020 Analog Devices, Inc. 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/bitops.h> 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/spi/spi.h> 16 17 #include <linux/iio/buffer.h> 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 #include <linux/iio/trigger.h> 21 #include <linux/iio/triggered_buffer.h> 22 #include <linux/iio/trigger_consumer.h> 23 24 #define ADXRS290_ADI_ID 0xAD 25 #define ADXRS290_MEMS_ID 0x1D 26 #define ADXRS290_DEV_ID 0x92 27 28 #define ADXRS290_REG_ADI_ID 0x00 29 #define ADXRS290_REG_MEMS_ID 0x01 30 #define ADXRS290_REG_DEV_ID 0x02 31 #define ADXRS290_REG_REV_ID 0x03 32 #define ADXRS290_REG_SN0 0x04 /* Serial Number Registers, 4 bytes */ 33 #define ADXRS290_REG_DATAX0 0x08 /* Roll Rate o/p Data Regs, 2 bytes */ 34 #define ADXRS290_REG_DATAY0 0x0A /* Pitch Rate o/p Data Regs, 2 bytes */ 35 #define ADXRS290_REG_TEMP0 0x0C 36 #define ADXRS290_REG_POWER_CTL 0x10 37 #define ADXRS290_REG_FILTER 0x11 38 #define ADXRS290_REG_DATA_RDY 0x12 39 40 #define ADXRS290_READ BIT(7) 41 #define ADXRS290_TSM BIT(0) 42 #define ADXRS290_MEASUREMENT BIT(1) 43 #define ADXRS290_DATA_RDY_OUT BIT(0) 44 #define ADXRS290_SYNC_MASK GENMASK(1, 0) 45 #define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x) 46 #define ADXRS290_LPF_MASK GENMASK(2, 0) 47 #define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x) 48 #define ADXRS290_HPF_MASK GENMASK(7, 4) 49 #define ADXRS290_HPF(x) FIELD_PREP(ADXRS290_HPF_MASK, x) 50 51 #define ADXRS290_READ_REG(reg) (ADXRS290_READ | (reg)) 52 53 #define ADXRS290_MAX_TRANSITION_TIME_MS 100 54 55 enum adxrs290_mode { 56 ADXRS290_MODE_STANDBY, 57 ADXRS290_MODE_MEASUREMENT, 58 }; 59 60 enum adxrs290_scan_index { 61 ADXRS290_IDX_X, 62 ADXRS290_IDX_Y, 63 ADXRS290_IDX_TEMP, 64 ADXRS290_IDX_TS, 65 }; 66 67 struct adxrs290_state { 68 struct spi_device *spi; 69 /* Serialize reads and their subsequent processing */ 70 struct mutex lock; 71 enum adxrs290_mode mode; 72 unsigned int lpf_3db_freq_idx; 73 unsigned int hpf_3db_freq_idx; 74 struct iio_trigger *dready_trig; 75 /* Ensure correct alignment of timestamp when present */ 76 struct { 77 s16 channels[3]; 78 aligned_s64 ts; 79 } buffer; 80 }; 81 82 /* 83 * Available cut-off frequencies of the low pass filter in Hz. 84 * The integer part and fractional part are represented separately. 85 */ 86 static const int adxrs290_lpf_3db_freq_hz_table[][2] = { 87 [0] = {480, 0}, 88 [1] = {320, 0}, 89 [2] = {160, 0}, 90 [3] = {80, 0}, 91 [4] = {56, 600000}, 92 [5] = {40, 0}, 93 [6] = {28, 300000}, 94 [7] = {20, 0}, 95 }; 96 97 /* 98 * Available cut-off frequencies of the high pass filter in Hz. 99 * The integer part and fractional part are represented separately. 100 */ 101 static const int adxrs290_hpf_3db_freq_hz_table[][2] = { 102 [0] = {0, 0}, 103 [1] = {0, 11000}, 104 [2] = {0, 22000}, 105 [3] = {0, 44000}, 106 [4] = {0, 87000}, 107 [5] = {0, 175000}, 108 [6] = {0, 350000}, 109 [7] = {0, 700000}, 110 [8] = {1, 400000}, 111 [9] = {2, 800000}, 112 [10] = {11, 300000}, 113 }; 114 115 static int adxrs290_get_rate_data(struct iio_dev *indio_dev, const u8 cmd, int *val) 116 { 117 struct adxrs290_state *st = iio_priv(indio_dev); 118 int ret = 0; 119 int temp; 120 121 mutex_lock(&st->lock); 122 temp = spi_w8r16(st->spi, cmd); 123 if (temp < 0) { 124 ret = temp; 125 goto err_unlock; 126 } 127 128 *val = sign_extend32(temp, 15); 129 130 err_unlock: 131 mutex_unlock(&st->lock); 132 return ret; 133 } 134 135 static int adxrs290_get_temp_data(struct iio_dev *indio_dev, int *val) 136 { 137 const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_TEMP0); 138 struct adxrs290_state *st = iio_priv(indio_dev); 139 int ret = 0; 140 int temp; 141 142 mutex_lock(&st->lock); 143 temp = spi_w8r16(st->spi, cmd); 144 if (temp < 0) { 145 ret = temp; 146 goto err_unlock; 147 } 148 149 /* extract lower 12 bits temperature reading */ 150 *val = sign_extend32(temp, 11); 151 152 err_unlock: 153 mutex_unlock(&st->lock); 154 return ret; 155 } 156 157 static int adxrs290_get_3db_freq(struct iio_dev *indio_dev, u8 *val, u8 *val2) 158 { 159 const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_FILTER); 160 struct adxrs290_state *st = iio_priv(indio_dev); 161 int ret = 0; 162 short temp; 163 164 mutex_lock(&st->lock); 165 temp = spi_w8r8(st->spi, cmd); 166 if (temp < 0) { 167 ret = temp; 168 goto err_unlock; 169 } 170 171 *val = FIELD_GET(ADXRS290_LPF_MASK, temp); 172 *val2 = FIELD_GET(ADXRS290_HPF_MASK, temp); 173 174 err_unlock: 175 mutex_unlock(&st->lock); 176 return ret; 177 } 178 179 static int adxrs290_spi_write_reg(struct spi_device *spi, const u8 reg, 180 const u8 val) 181 { 182 u8 buf[2]; 183 184 buf[0] = reg; 185 buf[1] = val; 186 187 return spi_write_then_read(spi, buf, ARRAY_SIZE(buf), NULL, 0); 188 } 189 190 static int adxrs290_find_match(const int (*freq_tbl)[2], const int n, 191 const int val, const int val2) 192 { 193 int i; 194 195 for (i = 0; i < n; i++) { 196 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2) 197 return i; 198 } 199 200 return -EINVAL; 201 } 202 203 static int adxrs290_set_filter_freq(struct iio_dev *indio_dev, 204 const unsigned int lpf_idx, 205 const unsigned int hpf_idx) 206 { 207 struct adxrs290_state *st = iio_priv(indio_dev); 208 u8 val; 209 210 val = ADXRS290_HPF(hpf_idx) | ADXRS290_LPF(lpf_idx); 211 212 return adxrs290_spi_write_reg(st->spi, ADXRS290_REG_FILTER, val); 213 } 214 215 static int adxrs290_set_mode(struct iio_dev *indio_dev, enum adxrs290_mode mode) 216 { 217 struct adxrs290_state *st = iio_priv(indio_dev); 218 int val, ret; 219 220 if (st->mode == mode) 221 return 0; 222 223 mutex_lock(&st->lock); 224 225 ret = spi_w8r8(st->spi, ADXRS290_READ_REG(ADXRS290_REG_POWER_CTL)); 226 if (ret < 0) 227 goto out_unlock; 228 229 val = ret; 230 231 switch (mode) { 232 case ADXRS290_MODE_STANDBY: 233 val &= ~ADXRS290_MEASUREMENT; 234 break; 235 case ADXRS290_MODE_MEASUREMENT: 236 val |= ADXRS290_MEASUREMENT; 237 break; 238 default: 239 ret = -EINVAL; 240 goto out_unlock; 241 } 242 243 ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_POWER_CTL, val); 244 if (ret < 0) { 245 dev_err(&st->spi->dev, "unable to set mode: %d\n", ret); 246 goto out_unlock; 247 } 248 249 /* update cached mode */ 250 st->mode = mode; 251 252 out_unlock: 253 mutex_unlock(&st->lock); 254 return ret; 255 } 256 257 static void adxrs290_chip_off_action(void *data) 258 { 259 struct iio_dev *indio_dev = data; 260 261 adxrs290_set_mode(indio_dev, ADXRS290_MODE_STANDBY); 262 } 263 264 static int adxrs290_initial_setup(struct iio_dev *indio_dev) 265 { 266 struct adxrs290_state *st = iio_priv(indio_dev); 267 struct spi_device *spi = st->spi; 268 int ret; 269 270 ret = adxrs290_spi_write_reg(spi, ADXRS290_REG_POWER_CTL, 271 ADXRS290_MEASUREMENT | ADXRS290_TSM); 272 if (ret < 0) 273 return ret; 274 275 st->mode = ADXRS290_MODE_MEASUREMENT; 276 277 return devm_add_action_or_reset(&spi->dev, adxrs290_chip_off_action, 278 indio_dev); 279 } 280 281 static int adxrs290_read_raw(struct iio_dev *indio_dev, 282 struct iio_chan_spec const *chan, 283 int *val, 284 int *val2, 285 long mask) 286 { 287 struct adxrs290_state *st = iio_priv(indio_dev); 288 unsigned int t; 289 int ret; 290 291 switch (mask) { 292 case IIO_CHAN_INFO_RAW: 293 if (!iio_device_claim_direct(indio_dev)) 294 return -EBUSY; 295 296 switch (chan->type) { 297 case IIO_ANGL_VEL: 298 ret = adxrs290_get_rate_data(indio_dev, 299 ADXRS290_READ_REG(chan->address), 300 val); 301 if (ret < 0) 302 break; 303 304 ret = IIO_VAL_INT; 305 break; 306 case IIO_TEMP: 307 ret = adxrs290_get_temp_data(indio_dev, val); 308 if (ret < 0) 309 break; 310 311 ret = IIO_VAL_INT; 312 break; 313 default: 314 ret = -EINVAL; 315 break; 316 } 317 318 iio_device_release_direct(indio_dev); 319 return ret; 320 case IIO_CHAN_INFO_SCALE: 321 switch (chan->type) { 322 case IIO_ANGL_VEL: 323 /* 1 LSB = 0.005 degrees/sec */ 324 *val = 0; 325 *val2 = 87266; 326 return IIO_VAL_INT_PLUS_NANO; 327 case IIO_TEMP: 328 /* 1 LSB = 0.1 degrees Celsius */ 329 *val = 100; 330 return IIO_VAL_INT; 331 default: 332 return -EINVAL; 333 } 334 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 335 switch (chan->type) { 336 case IIO_ANGL_VEL: 337 t = st->lpf_3db_freq_idx; 338 *val = adxrs290_lpf_3db_freq_hz_table[t][0]; 339 *val2 = adxrs290_lpf_3db_freq_hz_table[t][1]; 340 return IIO_VAL_INT_PLUS_MICRO; 341 default: 342 return -EINVAL; 343 } 344 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: 345 switch (chan->type) { 346 case IIO_ANGL_VEL: 347 t = st->hpf_3db_freq_idx; 348 *val = adxrs290_hpf_3db_freq_hz_table[t][0]; 349 *val2 = adxrs290_hpf_3db_freq_hz_table[t][1]; 350 return IIO_VAL_INT_PLUS_MICRO; 351 default: 352 return -EINVAL; 353 } 354 } 355 356 return -EINVAL; 357 } 358 359 static int adxrs290_write_raw(struct iio_dev *indio_dev, 360 struct iio_chan_spec const *chan, 361 int val, 362 int val2, 363 long mask) 364 { 365 struct adxrs290_state *st = iio_priv(indio_dev); 366 int ret, lpf_idx, hpf_idx; 367 368 if (!iio_device_claim_direct(indio_dev)) 369 return -EBUSY; 370 371 switch (mask) { 372 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 373 lpf_idx = adxrs290_find_match(adxrs290_lpf_3db_freq_hz_table, 374 ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table), 375 val, val2); 376 if (lpf_idx < 0) { 377 ret = -EINVAL; 378 break; 379 } 380 381 /* caching the updated state of the low-pass filter */ 382 st->lpf_3db_freq_idx = lpf_idx; 383 /* retrieving the current state of the high-pass filter */ 384 hpf_idx = st->hpf_3db_freq_idx; 385 ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx); 386 break; 387 388 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: 389 hpf_idx = adxrs290_find_match(adxrs290_hpf_3db_freq_hz_table, 390 ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table), 391 val, val2); 392 if (hpf_idx < 0) { 393 ret = -EINVAL; 394 break; 395 } 396 397 /* caching the updated state of the high-pass filter */ 398 st->hpf_3db_freq_idx = hpf_idx; 399 /* retrieving the current state of the low-pass filter */ 400 lpf_idx = st->lpf_3db_freq_idx; 401 ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx); 402 break; 403 404 default: 405 ret = -EINVAL; 406 break; 407 } 408 409 iio_device_release_direct(indio_dev); 410 return ret; 411 } 412 413 static int adxrs290_read_avail(struct iio_dev *indio_dev, 414 struct iio_chan_spec const *chan, 415 const int **vals, int *type, int *length, 416 long mask) 417 { 418 switch (mask) { 419 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 420 *vals = (const int *)adxrs290_lpf_3db_freq_hz_table; 421 *type = IIO_VAL_INT_PLUS_MICRO; 422 /* Values are stored in a 2D matrix */ 423 *length = ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table) * 2; 424 425 return IIO_AVAIL_LIST; 426 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: 427 *vals = (const int *)adxrs290_hpf_3db_freq_hz_table; 428 *type = IIO_VAL_INT_PLUS_MICRO; 429 /* Values are stored in a 2D matrix */ 430 *length = ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table) * 2; 431 432 return IIO_AVAIL_LIST; 433 default: 434 return -EINVAL; 435 } 436 } 437 438 static int adxrs290_reg_access_rw(struct spi_device *spi, unsigned int reg, 439 unsigned int *readval) 440 { 441 int ret; 442 443 ret = spi_w8r8(spi, ADXRS290_READ_REG(reg)); 444 if (ret < 0) 445 return ret; 446 447 *readval = ret; 448 449 return 0; 450 } 451 452 static int adxrs290_reg_access(struct iio_dev *indio_dev, unsigned int reg, 453 unsigned int writeval, unsigned int *readval) 454 { 455 struct adxrs290_state *st = iio_priv(indio_dev); 456 457 if (readval) 458 return adxrs290_reg_access_rw(st->spi, reg, readval); 459 else 460 return adxrs290_spi_write_reg(st->spi, reg, writeval); 461 } 462 463 static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig, 464 bool state) 465 { 466 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 467 struct adxrs290_state *st = iio_priv(indio_dev); 468 int ret; 469 u8 val; 470 471 val = state ? ADXRS290_SYNC(ADXRS290_DATA_RDY_OUT) : 0; 472 473 ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_DATA_RDY, val); 474 if (ret < 0) 475 dev_err(&st->spi->dev, "failed to start data rdy interrupt\n"); 476 477 return ret; 478 } 479 480 static void adxrs290_reset_trig(struct iio_trigger *trig) 481 { 482 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 483 int val; 484 485 /* 486 * Data ready interrupt is reset after a read of the data registers. 487 * Here, we only read the 16b DATAY registers as that marks the end of 488 * a read of the data registers and initiates a reset for the interrupt 489 * line. 490 */ 491 adxrs290_get_rate_data(indio_dev, 492 ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val); 493 } 494 495 static const struct iio_trigger_ops adxrs290_trigger_ops = { 496 .set_trigger_state = &adxrs290_data_rdy_trigger_set_state, 497 .validate_device = &iio_trigger_validate_own_device, 498 .reenable = &adxrs290_reset_trig, 499 }; 500 501 static irqreturn_t adxrs290_trigger_handler(int irq, void *p) 502 { 503 struct iio_poll_func *pf = p; 504 struct iio_dev *indio_dev = pf->indio_dev; 505 struct adxrs290_state *st = iio_priv(indio_dev); 506 u8 tx = ADXRS290_READ_REG(ADXRS290_REG_DATAX0); 507 int ret; 508 509 mutex_lock(&st->lock); 510 511 /* exercise a bulk data capture starting from reg DATAX0... */ 512 ret = spi_write_then_read(st->spi, &tx, sizeof(tx), st->buffer.channels, 513 sizeof(st->buffer.channels)); 514 if (ret < 0) 515 goto out_unlock_notify; 516 517 iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer, 518 pf->timestamp); 519 520 out_unlock_notify: 521 mutex_unlock(&st->lock); 522 iio_trigger_notify_done(indio_dev->trig); 523 524 return IRQ_HANDLED; 525 } 526 527 #define ADXRS290_ANGL_VEL_CHANNEL(reg, axis) { \ 528 .type = IIO_ANGL_VEL, \ 529 .address = reg, \ 530 .modified = 1, \ 531 .channel2 = IIO_MOD_##axis, \ 532 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 533 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 534 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ 535 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \ 536 .info_mask_shared_by_type_available = \ 537 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \ 538 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \ 539 .scan_index = ADXRS290_IDX_##axis, \ 540 .scan_type = { \ 541 .sign = 's', \ 542 .realbits = 16, \ 543 .storagebits = 16, \ 544 .endianness = IIO_LE, \ 545 }, \ 546 } 547 548 static const struct iio_chan_spec adxrs290_channels[] = { 549 ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAX0, X), 550 ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAY0, Y), 551 { 552 .type = IIO_TEMP, 553 .address = ADXRS290_REG_TEMP0, 554 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 555 BIT(IIO_CHAN_INFO_SCALE), 556 .scan_index = ADXRS290_IDX_TEMP, 557 .scan_type = { 558 .sign = 's', 559 .realbits = 12, 560 .storagebits = 16, 561 .endianness = IIO_LE, 562 }, 563 }, 564 IIO_CHAN_SOFT_TIMESTAMP(ADXRS290_IDX_TS), 565 }; 566 567 static const unsigned long adxrs290_avail_scan_masks[] = { 568 BIT(ADXRS290_IDX_X) | BIT(ADXRS290_IDX_Y) | BIT(ADXRS290_IDX_TEMP), 569 0 570 }; 571 572 static const struct iio_info adxrs290_info = { 573 .read_raw = &adxrs290_read_raw, 574 .write_raw = &adxrs290_write_raw, 575 .read_avail = &adxrs290_read_avail, 576 .debugfs_reg_access = &adxrs290_reg_access, 577 }; 578 579 static int adxrs290_probe_trigger(struct iio_dev *indio_dev) 580 { 581 struct adxrs290_state *st = iio_priv(indio_dev); 582 int ret; 583 584 if (!st->spi->irq) { 585 dev_info(&st->spi->dev, "no irq, using polling\n"); 586 return 0; 587 } 588 589 st->dready_trig = devm_iio_trigger_alloc(&st->spi->dev, "%s-dev%d", 590 indio_dev->name, 591 iio_device_id(indio_dev)); 592 if (!st->dready_trig) 593 return -ENOMEM; 594 595 st->dready_trig->ops = &adxrs290_trigger_ops; 596 iio_trigger_set_drvdata(st->dready_trig, indio_dev); 597 598 ret = devm_request_irq(&st->spi->dev, st->spi->irq, 599 &iio_trigger_generic_data_rdy_poll, 600 IRQF_ONESHOT, "adxrs290_irq", st->dready_trig); 601 if (ret < 0) 602 return dev_err_probe(&st->spi->dev, ret, 603 "request irq %d failed\n", st->spi->irq); 604 605 ret = devm_iio_trigger_register(&st->spi->dev, st->dready_trig); 606 if (ret) { 607 dev_err(&st->spi->dev, "iio trigger register failed\n"); 608 return ret; 609 } 610 611 indio_dev->trig = iio_trigger_get(st->dready_trig); 612 613 return 0; 614 } 615 616 static int adxrs290_probe(struct spi_device *spi) 617 { 618 struct iio_dev *indio_dev; 619 struct adxrs290_state *st; 620 u8 val, val2; 621 int ret; 622 623 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 624 if (!indio_dev) 625 return -ENOMEM; 626 627 st = iio_priv(indio_dev); 628 st->spi = spi; 629 630 indio_dev->name = "adxrs290"; 631 indio_dev->modes = INDIO_DIRECT_MODE; 632 indio_dev->channels = adxrs290_channels; 633 indio_dev->num_channels = ARRAY_SIZE(adxrs290_channels); 634 indio_dev->info = &adxrs290_info; 635 indio_dev->available_scan_masks = adxrs290_avail_scan_masks; 636 637 mutex_init(&st->lock); 638 639 val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_ADI_ID)); 640 if (val != ADXRS290_ADI_ID) { 641 dev_err(&spi->dev, "Wrong ADI ID 0x%02x\n", val); 642 return -ENODEV; 643 } 644 645 val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_MEMS_ID)); 646 if (val != ADXRS290_MEMS_ID) { 647 dev_err(&spi->dev, "Wrong MEMS ID 0x%02x\n", val); 648 return -ENODEV; 649 } 650 651 val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_DEV_ID)); 652 if (val != ADXRS290_DEV_ID) { 653 dev_err(&spi->dev, "Wrong DEV ID 0x%02x\n", val); 654 return -ENODEV; 655 } 656 657 /* default mode the gyroscope starts in */ 658 st->mode = ADXRS290_MODE_STANDBY; 659 660 /* switch to measurement mode and switch on the temperature sensor */ 661 ret = adxrs290_initial_setup(indio_dev); 662 if (ret < 0) 663 return ret; 664 665 /* max transition time to measurement mode */ 666 msleep(ADXRS290_MAX_TRANSITION_TIME_MS); 667 668 ret = adxrs290_get_3db_freq(indio_dev, &val, &val2); 669 if (ret < 0) 670 return ret; 671 672 st->lpf_3db_freq_idx = val; 673 st->hpf_3db_freq_idx = val2; 674 675 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, 676 &iio_pollfunc_store_time, 677 &adxrs290_trigger_handler, NULL); 678 if (ret < 0) 679 return dev_err_probe(&spi->dev, ret, 680 "iio triggered buffer setup failed\n"); 681 682 ret = adxrs290_probe_trigger(indio_dev); 683 if (ret < 0) 684 return ret; 685 686 return devm_iio_device_register(&spi->dev, indio_dev); 687 } 688 689 static const struct of_device_id adxrs290_of_match[] = { 690 { .compatible = "adi,adxrs290" }, 691 { } 692 }; 693 MODULE_DEVICE_TABLE(of, adxrs290_of_match); 694 695 static struct spi_driver adxrs290_driver = { 696 .driver = { 697 .name = "adxrs290", 698 .of_match_table = adxrs290_of_match, 699 }, 700 .probe = adxrs290_probe, 701 }; 702 module_spi_driver(adxrs290_driver); 703 704 MODULE_AUTHOR("Nishant Malpani <nish.malpani25@gmail.com>"); 705 MODULE_DESCRIPTION("Analog Devices ADXRS290 Gyroscope SPI driver"); 706 MODULE_LICENSE("GPL"); 707