1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ADS7138 - Texas Instruments Analog-to-Digital Converter 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/cleanup.h> 8 #include <linux/err.h> 9 #include <linux/i2c.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/unaligned.h> 17 18 #include <linux/iio/events.h> 19 #include <linux/iio/iio.h> 20 #include <linux/iio/types.h> 21 22 /* 23 * Always assume 16 bits resolution as HW registers are aligned like that and 24 * with enabled oversampling/averaging it actually corresponds to 16 bits. 25 */ 26 #define ADS7138_RES_BITS 16 27 28 /* ADS7138 operation codes */ 29 #define ADS7138_OPCODE_SINGLE_WRITE 0x08 30 #define ADS7138_OPCODE_SET_BIT 0x18 31 #define ADS7138_OPCODE_CLEAR_BIT 0x20 32 #define ADS7138_OPCODE_BLOCK_WRITE 0x28 33 #define ADS7138_OPCODE_BLOCK_READ 0x30 34 35 /* ADS7138 registers */ 36 #define ADS7138_REG_GENERAL_CFG 0x01 37 #define ADS7138_REG_OSR_CFG 0x03 38 #define ADS7138_REG_OPMODE_CFG 0x04 39 #define ADS7138_REG_SEQUENCE_CFG 0x10 40 #define ADS7138_REG_AUTO_SEQ_CH_SEL 0x12 41 #define ADS7138_REG_ALERT_CH_SEL 0x14 42 #define ADS7138_REG_EVENT_FLAG 0x18 43 #define ADS7138_REG_EVENT_HIGH_FLAG 0x1A 44 #define ADS7138_REG_EVENT_LOW_FLAG 0x1C 45 #define ADS7138_REG_HIGH_TH_HYS_CH(x) ((x) * 4 + 0x20) 46 #define ADS7138_REG_LOW_TH_CNT_CH(x) ((x) * 4 + 0x22) 47 #define ADS7138_REG_MAX_LSB_CH(x) ((x) * 2 + 0x60) 48 #define ADS7138_REG_MIN_LSB_CH(x) ((x) * 2 + 0x80) 49 #define ADS7138_REG_RECENT_LSB_CH(x) ((x) * 2 + 0xA0) 50 51 #define ADS7138_GENERAL_CFG_RST BIT(0) 52 #define ADS7138_GENERAL_CFG_DWC_EN BIT(4) 53 #define ADS7138_GENERAL_CFG_STATS_EN BIT(5) 54 #define ADS7138_OSR_CFG_MASK GENMASK(2, 0) 55 #define ADS7138_OPMODE_CFG_CONV_MODE BIT(5) 56 #define ADS7138_OPMODE_CFG_FREQ_MASK GENMASK(4, 0) 57 #define ADS7138_SEQUENCE_CFG_SEQ_MODE BIT(0) 58 #define ADS7138_SEQUENCE_CFG_SEQ_START BIT(4) 59 #define ADS7138_THRESHOLD_LSB_MASK GENMASK(7, 4) 60 61 enum ads7138_modes { 62 ADS7138_MODE_MANUAL, 63 ADS7138_MODE_AUTO, 64 }; 65 66 struct ads7138_chip_data { 67 const char *name; 68 const int channel_num; 69 }; 70 71 struct ads7138_data { 72 /* Protects RMW access to the I2C interface */ 73 struct mutex lock; 74 struct i2c_client *client; 75 struct regulator *vref_regu; 76 const struct ads7138_chip_data *chip_data; 77 }; 78 79 /* 80 * 2D array of available sampling frequencies and the corresponding register 81 * values. Structured like this to be easily usable in read_avail function. 82 */ 83 static const int ads7138_samp_freqs_bits[2][26] = { 84 { 85 163, 244, 326, 488, 651, 977, 1302, 1953, 86 2604, 3906, 5208, 7813, 10417, 15625, 20833, 31250, 87 41667, 62500, 83333, 125000, 166667, 250000, 333333, 500000, 88 666667, 1000000 89 }, { 90 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 91 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 92 /* Here is a hole, due to duplicate frequencies */ 93 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 94 0x01, 0x00 95 } 96 }; 97 98 static const int ads7138_oversampling_ratios[] = { 99 1, 2, 4, 8, 16, 32, 64, 128 100 }; 101 102 static int ads7138_i2c_write_block(const struct i2c_client *client, u8 reg, 103 u8 *values, u8 length) 104 { 105 int ret; 106 int len = length + 2; /* "+ 2" for OPCODE and reg */ 107 108 u8 *buf __free(kfree) = kmalloc(len, GFP_KERNEL); 109 if (!buf) 110 return -ENOMEM; 111 112 buf[0] = ADS7138_OPCODE_BLOCK_WRITE; 113 buf[1] = reg; 114 memcpy(&buf[2], values, length); 115 116 ret = i2c_master_send(client, buf, len); 117 if (ret < 0) 118 return ret; 119 if (ret != len) 120 return -EIO; 121 122 return 0; 123 } 124 125 static int ads7138_i2c_write_with_opcode(const struct i2c_client *client, 126 u8 reg, u8 regval, u8 opcode) 127 { 128 u8 buf[3] = { opcode, reg, regval }; 129 int ret; 130 131 ret = i2c_master_send(client, buf, ARRAY_SIZE(buf)); 132 if (ret < 0) 133 return ret; 134 if (ret != ARRAY_SIZE(buf)) 135 return -EIO; 136 137 return 0; 138 } 139 140 static int ads7138_i2c_write(const struct i2c_client *client, u8 reg, u8 value) 141 { 142 return ads7138_i2c_write_with_opcode(client, reg, value, 143 ADS7138_OPCODE_SINGLE_WRITE); 144 } 145 146 static int ads7138_i2c_set_bit(const struct i2c_client *client, u8 reg, u8 bits) 147 { 148 return ads7138_i2c_write_with_opcode(client, reg, bits, 149 ADS7138_OPCODE_SET_BIT); 150 } 151 152 static int ads7138_i2c_clear_bit(const struct i2c_client *client, u8 reg, u8 bits) 153 { 154 return ads7138_i2c_write_with_opcode(client, reg, bits, 155 ADS7138_OPCODE_CLEAR_BIT); 156 } 157 158 static int ads7138_i2c_read_block(const struct i2c_client *client, u8 reg, 159 u8 *out_values, u8 length) 160 { 161 u8 buf[2] = { ADS7138_OPCODE_BLOCK_READ, reg }; 162 int ret; 163 struct i2c_msg msgs[] = { 164 { 165 .addr = client->addr, 166 .len = ARRAY_SIZE(buf), 167 .buf = buf, 168 }, 169 { 170 .addr = client->addr, 171 .flags = I2C_M_RD, 172 .len = length, 173 .buf = out_values, 174 }, 175 }; 176 177 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 178 if (ret < 0) 179 return ret; 180 if (ret != ARRAY_SIZE(msgs)) 181 return -EIO; 182 183 return 0; 184 } 185 186 static int ads7138_i2c_read(const struct i2c_client *client, u8 reg) 187 { 188 u8 value; 189 int ret; 190 191 ret = ads7138_i2c_read_block(client, reg, &value, sizeof(value)); 192 if (ret) 193 return ret; 194 return value; 195 } 196 197 static int ads7138_freq_to_bits(int freq) 198 { 199 int i; 200 201 for (i = 0; i < ARRAY_SIZE(ads7138_samp_freqs_bits[0]); i++) 202 if (freq == ads7138_samp_freqs_bits[0][i]) 203 return ads7138_samp_freqs_bits[1][i]; 204 205 return -EINVAL; 206 } 207 208 static int ads7138_bits_to_freq(int bits) 209 { 210 int i; 211 212 for (i = 0; i < ARRAY_SIZE(ads7138_samp_freqs_bits[1]); i++) 213 if (bits == ads7138_samp_freqs_bits[1][i]) 214 return ads7138_samp_freqs_bits[0][i]; 215 216 return -EINVAL; 217 } 218 219 static int ads7138_osr_to_bits(int osr) 220 { 221 int i; 222 223 for (i = 0; i < ARRAY_SIZE(ads7138_oversampling_ratios); i++) 224 if (osr == ads7138_oversampling_ratios[i]) 225 return i; 226 227 return -EINVAL; 228 } 229 230 static int ads7138_read_raw(struct iio_dev *indio_dev, 231 struct iio_chan_spec const *chan, int *val, 232 int *val2, long mask) 233 { 234 struct ads7138_data *data = iio_priv(indio_dev); 235 int ret, vref, bits; 236 u8 values[2]; 237 238 switch (mask) { 239 case IIO_CHAN_INFO_RAW: 240 ret = ads7138_i2c_read_block(data->client, 241 ADS7138_REG_RECENT_LSB_CH(chan->channel), 242 values, ARRAY_SIZE(values)); 243 if (ret) 244 return ret; 245 246 *val = get_unaligned_le16(values); 247 return IIO_VAL_INT; 248 case IIO_CHAN_INFO_PEAK: 249 ret = ads7138_i2c_read_block(data->client, 250 ADS7138_REG_MAX_LSB_CH(chan->channel), 251 values, ARRAY_SIZE(values)); 252 if (ret) 253 return ret; 254 255 *val = get_unaligned_le16(values); 256 return IIO_VAL_INT; 257 case IIO_CHAN_INFO_TROUGH: 258 ret = ads7138_i2c_read_block(data->client, 259 ADS7138_REG_MIN_LSB_CH(chan->channel), 260 values, ARRAY_SIZE(values)); 261 if (ret) 262 return ret; 263 264 *val = get_unaligned_le16(values); 265 return IIO_VAL_INT; 266 case IIO_CHAN_INFO_SAMP_FREQ: 267 ret = ads7138_i2c_read(data->client, ADS7138_REG_OPMODE_CFG); 268 if (ret < 0) 269 return ret; 270 271 bits = FIELD_GET(ADS7138_OPMODE_CFG_FREQ_MASK, ret); 272 *val = ads7138_bits_to_freq(bits); 273 return IIO_VAL_INT; 274 case IIO_CHAN_INFO_SCALE: 275 vref = regulator_get_voltage(data->vref_regu); 276 if (vref < 0) 277 return vref; 278 *val = vref / 1000; 279 *val2 = ADS7138_RES_BITS; 280 return IIO_VAL_FRACTIONAL_LOG2; 281 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 282 ret = ads7138_i2c_read(data->client, ADS7138_REG_OSR_CFG); 283 if (ret < 0) 284 return ret; 285 286 bits = FIELD_GET(ADS7138_OSR_CFG_MASK, ret); 287 *val = ads7138_oversampling_ratios[bits]; 288 return IIO_VAL_INT; 289 default: 290 return -EINVAL; 291 } 292 } 293 294 static int ads7138_write_raw(struct iio_dev *indio_dev, 295 struct iio_chan_spec const *chan, int val, 296 int val2, long mask) 297 { 298 struct ads7138_data *data = iio_priv(indio_dev); 299 int bits, ret; 300 u8 value; 301 302 switch (mask) { 303 case IIO_CHAN_INFO_SAMP_FREQ: { 304 bits = ads7138_freq_to_bits(val); 305 if (bits < 0) 306 return bits; 307 308 guard(mutex)(&data->lock); 309 ret = ads7138_i2c_read(data->client, ADS7138_REG_OPMODE_CFG); 310 if (ret < 0) 311 return ret; 312 313 value = ret & ~ADS7138_OPMODE_CFG_FREQ_MASK; 314 value |= FIELD_PREP(ADS7138_OPMODE_CFG_FREQ_MASK, bits); 315 return ads7138_i2c_write(data->client, ADS7138_REG_OPMODE_CFG, 316 value); 317 } 318 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 319 bits = ads7138_osr_to_bits(val); 320 if (bits < 0) 321 return bits; 322 323 return ads7138_i2c_write(data->client, ADS7138_REG_OSR_CFG, 324 bits); 325 default: 326 return -EINVAL; 327 } 328 } 329 330 static int ads7138_read_event(struct iio_dev *indio_dev, 331 const struct iio_chan_spec *chan, 332 enum iio_event_type type, 333 enum iio_event_direction dir, 334 enum iio_event_info info, int *val, int *val2) 335 { 336 struct ads7138_data *data = iio_priv(indio_dev); 337 u8 reg, values[2]; 338 int ret; 339 340 switch (info) { 341 case IIO_EV_INFO_VALUE: 342 reg = (dir == IIO_EV_DIR_RISING) ? 343 ADS7138_REG_HIGH_TH_HYS_CH(chan->channel) : 344 ADS7138_REG_LOW_TH_CNT_CH(chan->channel); 345 ret = ads7138_i2c_read_block(data->client, reg, values, 346 ARRAY_SIZE(values)); 347 if (ret) 348 return ret; 349 350 *val = ((values[1] << 4) | (values[0] >> 4)); 351 return IIO_VAL_INT; 352 case IIO_EV_INFO_HYSTERESIS: 353 ret = ads7138_i2c_read(data->client, 354 ADS7138_REG_HIGH_TH_HYS_CH(chan->channel)); 355 if (ret < 0) 356 return ret; 357 358 *val = ret & ~ADS7138_THRESHOLD_LSB_MASK; 359 return IIO_VAL_INT; 360 default: 361 return -EINVAL; 362 } 363 } 364 365 static int ads7138_write_event(struct iio_dev *indio_dev, 366 const struct iio_chan_spec *chan, 367 enum iio_event_type type, 368 enum iio_event_direction dir, 369 enum iio_event_info info, int val, int val2) 370 { 371 struct ads7138_data *data = iio_priv(indio_dev); 372 u8 reg, values[2]; 373 int ret; 374 375 switch (info) { 376 case IIO_EV_INFO_VALUE: { 377 if (val >= BIT(12) || val < 0) 378 return -EINVAL; 379 380 reg = (dir == IIO_EV_DIR_RISING) ? 381 ADS7138_REG_HIGH_TH_HYS_CH(chan->channel) : 382 ADS7138_REG_LOW_TH_CNT_CH(chan->channel); 383 384 guard(mutex)(&data->lock); 385 ret = ads7138_i2c_read(data->client, reg); 386 if (ret < 0) 387 return ret; 388 389 values[0] = ret & ~ADS7138_THRESHOLD_LSB_MASK; 390 values[0] |= FIELD_PREP(ADS7138_THRESHOLD_LSB_MASK, val); 391 values[1] = (val >> 4); 392 return ads7138_i2c_write_block(data->client, reg, values, 393 ARRAY_SIZE(values)); 394 } 395 case IIO_EV_INFO_HYSTERESIS: { 396 if (val >= BIT(4) || val < 0) 397 return -EINVAL; 398 399 reg = ADS7138_REG_HIGH_TH_HYS_CH(chan->channel); 400 401 guard(mutex)(&data->lock); 402 ret = ads7138_i2c_read(data->client, reg); 403 if (ret < 0) 404 return ret; 405 406 values[0] = val & ~ADS7138_THRESHOLD_LSB_MASK; 407 values[0] |= FIELD_PREP(ADS7138_THRESHOLD_LSB_MASK, ret >> 4); 408 return ads7138_i2c_write(data->client, reg, values[0]); 409 } 410 default: 411 return -EINVAL; 412 } 413 } 414 415 static int ads7138_read_event_config(struct iio_dev *indio_dev, 416 const struct iio_chan_spec *chan, 417 enum iio_event_type type, 418 enum iio_event_direction dir) 419 { 420 struct ads7138_data *data = iio_priv(indio_dev); 421 int ret; 422 423 if (dir != IIO_EV_DIR_EITHER) 424 return -EINVAL; 425 426 ret = ads7138_i2c_read(data->client, ADS7138_REG_ALERT_CH_SEL); 427 if (ret < 0) 428 return ret; 429 430 return (ret & BIT(chan->channel)) ? 1 : 0; 431 } 432 433 static int ads7138_write_event_config(struct iio_dev *indio_dev, 434 const struct iio_chan_spec *chan, 435 enum iio_event_type type, 436 enum iio_event_direction dir, bool state) 437 { 438 struct ads7138_data *data = iio_priv(indio_dev); 439 440 if (dir != IIO_EV_DIR_EITHER) 441 return -EINVAL; 442 443 if (state) 444 return ads7138_i2c_set_bit(data->client, 445 ADS7138_REG_ALERT_CH_SEL, 446 BIT(chan->channel)); 447 else 448 return ads7138_i2c_clear_bit(data->client, 449 ADS7138_REG_ALERT_CH_SEL, 450 BIT(chan->channel)); 451 } 452 453 static int ads7138_read_avail(struct iio_dev *indio_dev, 454 struct iio_chan_spec const *chan, 455 const int **vals, int *type, int *length, 456 long mask) 457 { 458 switch (mask) { 459 case IIO_CHAN_INFO_SAMP_FREQ: 460 *vals = ads7138_samp_freqs_bits[0]; 461 *length = ARRAY_SIZE(ads7138_samp_freqs_bits[0]); 462 *type = IIO_VAL_INT; 463 464 return IIO_AVAIL_LIST; 465 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 466 *vals = ads7138_oversampling_ratios; 467 *length = ARRAY_SIZE(ads7138_oversampling_ratios); 468 *type = IIO_VAL_INT; 469 470 return IIO_AVAIL_LIST; 471 default: 472 return -EINVAL; 473 } 474 } 475 476 static const struct iio_info ti_ads7138_info = { 477 .read_raw = &ads7138_read_raw, 478 .read_avail = &ads7138_read_avail, 479 .write_raw = &ads7138_write_raw, 480 .read_event_value = &ads7138_read_event, 481 .write_event_value = &ads7138_write_event, 482 .read_event_config = &ads7138_read_event_config, 483 .write_event_config = &ads7138_write_event_config, 484 }; 485 486 static const struct iio_event_spec ads7138_events[] = { 487 { 488 .type = IIO_EV_TYPE_THRESH, 489 .dir = IIO_EV_DIR_RISING, 490 .mask_separate = BIT(IIO_EV_INFO_VALUE) 491 }, { 492 .type = IIO_EV_TYPE_THRESH, 493 .dir = IIO_EV_DIR_FALLING, 494 .mask_separate = BIT(IIO_EV_INFO_VALUE), 495 }, { 496 .type = IIO_EV_TYPE_THRESH, 497 .dir = IIO_EV_DIR_EITHER, 498 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS) | 499 BIT(IIO_EV_INFO_ENABLE), 500 }, 501 }; 502 503 #define ADS7138_V_CHAN(_chan) { \ 504 .type = IIO_VOLTAGE, \ 505 .indexed = 1, \ 506 .channel = _chan, \ 507 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 508 BIT(IIO_CHAN_INFO_PEAK) | \ 509 BIT(IIO_CHAN_INFO_TROUGH), \ 510 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 511 BIT(IIO_CHAN_INFO_SCALE) | \ 512 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 513 .info_mask_shared_by_type_available = \ 514 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 515 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 516 .datasheet_name = "AIN"#_chan, \ 517 .event_spec = ads7138_events, \ 518 .num_event_specs = ARRAY_SIZE(ads7138_events), \ 519 } 520 521 static const struct iio_chan_spec ads7138_channels[] = { 522 ADS7138_V_CHAN(0), 523 ADS7138_V_CHAN(1), 524 ADS7138_V_CHAN(2), 525 ADS7138_V_CHAN(3), 526 ADS7138_V_CHAN(4), 527 ADS7138_V_CHAN(5), 528 ADS7138_V_CHAN(6), 529 ADS7138_V_CHAN(7), 530 }; 531 532 static irqreturn_t ads7138_event_handler(int irq, void *priv) 533 { 534 struct iio_dev *indio_dev = priv; 535 struct ads7138_data *data = iio_priv(indio_dev); 536 struct device *dev = &data->client->dev; 537 u8 i, events_high, events_low; 538 u64 code; 539 int ret; 540 541 /* Check if interrupt was trigger by us */ 542 ret = ads7138_i2c_read(data->client, ADS7138_REG_EVENT_FLAG); 543 if (ret <= 0) 544 return IRQ_NONE; 545 546 ret = ads7138_i2c_read(data->client, ADS7138_REG_EVENT_HIGH_FLAG); 547 if (ret < 0) { 548 dev_warn(dev, "Failed to read event high flags: %d\n", ret); 549 return IRQ_HANDLED; 550 } 551 events_high = ret; 552 553 ret = ads7138_i2c_read(data->client, ADS7138_REG_EVENT_LOW_FLAG); 554 if (ret < 0) { 555 dev_warn(dev, "Failed to read event low flags: %d\n", ret); 556 return IRQ_HANDLED; 557 } 558 events_low = ret; 559 560 for (i = 0; i < data->chip_data->channel_num; i++) { 561 if (events_high & BIT(i)) { 562 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i, 563 IIO_EV_TYPE_THRESH, 564 IIO_EV_DIR_RISING); 565 iio_push_event(indio_dev, code, 566 iio_get_time_ns(indio_dev)); 567 } 568 if (events_low & BIT(i)) { 569 code = IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i, 570 IIO_EV_TYPE_THRESH, 571 IIO_EV_DIR_FALLING); 572 iio_push_event(indio_dev, code, 573 iio_get_time_ns(indio_dev)); 574 } 575 } 576 577 /* Try to clear all interrupt flags */ 578 ret = ads7138_i2c_write(data->client, ADS7138_REG_EVENT_HIGH_FLAG, 0xFF); 579 if (ret) 580 dev_warn(dev, "Failed to clear event high flags: %d\n", ret); 581 582 ret = ads7138_i2c_write(data->client, ADS7138_REG_EVENT_LOW_FLAG, 0xFF); 583 if (ret) 584 dev_warn(dev, "Failed to clear event low flags: %d\n", ret); 585 586 return IRQ_HANDLED; 587 } 588 589 static int ads7138_set_conv_mode(struct ads7138_data *data, 590 enum ads7138_modes mode) 591 { 592 if (mode == ADS7138_MODE_AUTO) 593 return ads7138_i2c_set_bit(data->client, ADS7138_REG_OPMODE_CFG, 594 ADS7138_OPMODE_CFG_CONV_MODE); 595 return ads7138_i2c_clear_bit(data->client, ADS7138_REG_OPMODE_CFG, 596 ADS7138_OPMODE_CFG_CONV_MODE); 597 } 598 599 static int ads7138_init_hw(struct ads7138_data *data) 600 { 601 struct device *dev = &data->client->dev; 602 int ret; 603 604 data->vref_regu = devm_regulator_get(dev, "avdd"); 605 if (IS_ERR(data->vref_regu)) 606 return dev_err_probe(dev, PTR_ERR(data->vref_regu), 607 "Failed to get avdd regulator\n"); 608 609 ret = regulator_get_voltage(data->vref_regu); 610 if (ret < 0) 611 return dev_err_probe(dev, ret, "Failed to get avdd voltage\n"); 612 613 /* Reset the chip to get a defined starting configuration */ 614 ret = ads7138_i2c_set_bit(data->client, ADS7138_REG_GENERAL_CFG, 615 ADS7138_GENERAL_CFG_RST); 616 if (ret) 617 return ret; 618 619 ret = ads7138_set_conv_mode(data, ADS7138_MODE_AUTO); 620 if (ret) 621 return ret; 622 623 /* Enable statistics and digital window comparator */ 624 ret = ads7138_i2c_set_bit(data->client, ADS7138_REG_GENERAL_CFG, 625 ADS7138_GENERAL_CFG_STATS_EN | 626 ADS7138_GENERAL_CFG_DWC_EN); 627 if (ret) 628 return ret; 629 630 /* Enable all channels for auto sequencing */ 631 ret = ads7138_i2c_set_bit(data->client, ADS7138_REG_AUTO_SEQ_CH_SEL, 0xFF); 632 if (ret) 633 return ret; 634 635 /* Set auto sequence mode and start sequencing */ 636 return ads7138_i2c_set_bit(data->client, ADS7138_REG_SEQUENCE_CFG, 637 ADS7138_SEQUENCE_CFG_SEQ_START | 638 ADS7138_SEQUENCE_CFG_SEQ_MODE); 639 } 640 641 static int ads7138_probe(struct i2c_client *client) 642 { 643 struct device *dev = &client->dev; 644 struct iio_dev *indio_dev; 645 struct ads7138_data *data; 646 int ret; 647 648 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 649 if (!indio_dev) 650 return -ENOMEM; 651 652 data = iio_priv(indio_dev); 653 data->client = client; 654 data->chip_data = i2c_get_match_data(client); 655 if (!data->chip_data) 656 return -ENODEV; 657 658 ret = devm_mutex_init(dev, &data->lock); 659 if (ret) 660 return ret; 661 662 indio_dev->name = data->chip_data->name; 663 indio_dev->modes = INDIO_DIRECT_MODE; 664 indio_dev->channels = ads7138_channels; 665 indio_dev->num_channels = ARRAY_SIZE(ads7138_channels); 666 indio_dev->info = &ti_ads7138_info; 667 668 i2c_set_clientdata(client, indio_dev); 669 670 if (client->irq > 0) { 671 ret = devm_request_threaded_irq(dev, client->irq, 672 NULL, ads7138_event_handler, 673 IRQF_TRIGGER_LOW | 674 IRQF_ONESHOT | IRQF_SHARED, 675 client->name, indio_dev); 676 if (ret) 677 return ret; 678 } 679 680 ret = ads7138_init_hw(data); 681 if (ret) 682 return dev_err_probe(dev, ret, "Failed to initialize device\n"); 683 684 ret = devm_iio_device_register(dev, indio_dev); 685 if (ret) 686 return dev_err_probe(dev, ret, "Failed to register iio device\n"); 687 688 return 0; 689 } 690 691 static int ads7138_runtime_suspend(struct device *dev) 692 { 693 struct iio_dev *indio_dev = dev_get_drvdata(dev); 694 struct ads7138_data *data = iio_priv(indio_dev); 695 696 return ads7138_set_conv_mode(data, ADS7138_MODE_MANUAL); 697 } 698 699 static int ads7138_runtime_resume(struct device *dev) 700 { 701 struct iio_dev *indio_dev = dev_get_drvdata(dev); 702 struct ads7138_data *data = iio_priv(indio_dev); 703 704 return ads7138_set_conv_mode(data, ADS7138_MODE_AUTO); 705 } 706 707 static DEFINE_RUNTIME_DEV_PM_OPS(ads7138_pm_ops, 708 ads7138_runtime_suspend, 709 ads7138_runtime_resume, 710 NULL); 711 712 static const struct ads7138_chip_data ads7128_data = { 713 .name = "ads7128", 714 .channel_num = 8, 715 }; 716 717 static const struct ads7138_chip_data ads7138_data = { 718 .name = "ads7138", 719 .channel_num = 8, 720 }; 721 722 static const struct of_device_id ads7138_of_match[] = { 723 { .compatible = "ti,ads7128", .data = &ads7128_data }, 724 { .compatible = "ti,ads7138", .data = &ads7138_data }, 725 { } 726 }; 727 MODULE_DEVICE_TABLE(of, ads7138_of_match); 728 729 static const struct i2c_device_id ads7138_device_ids[] = { 730 { "ads7128", (kernel_ulong_t)&ads7128_data }, 731 { "ads7138", (kernel_ulong_t)&ads7138_data }, 732 { } 733 }; 734 MODULE_DEVICE_TABLE(i2c, ads7138_device_ids); 735 736 static struct i2c_driver ads7138_driver = { 737 .driver = { 738 .name = "ads7138", 739 .of_match_table = ads7138_of_match, 740 .pm = pm_ptr(&ads7138_pm_ops), 741 }, 742 .id_table = ads7138_device_ids, 743 .probe = ads7138_probe, 744 }; 745 module_i2c_driver(ads7138_driver); 746 747 MODULE_LICENSE("GPL"); 748 MODULE_AUTHOR("Tobias Sperling <tobias.sperling@softing.com>"); 749 MODULE_DESCRIPTION("Driver for TI ADS7138 ADCs"); 750