xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h (revision 260f6f4fda93c8485c8037865c941b42b9cba5d2)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2013 Red Hat
5  * Author: Rob Clark <robdclark@gmail.com>
6  */
7 
8 #ifndef _DPU_PLANE_H_
9 #define _DPU_PLANE_H_
10 
11 #include <drm/drm_crtc.h>
12 
13 #include "dpu_kms.h"
14 #include "dpu_hw_mdss.h"
15 #include "dpu_hw_sspp.h"
16 
17 /**
18  * struct dpu_plane_state: Define dpu extension of drm plane state object
19  * @base:	base drm plane state object
20  * @pipe:	software pipe description
21  * @r_pipe:	software pipe description of the second pipe
22  * @pipe_cfg:	software pipe configuration
23  * @r_pipe_cfg:	software pipe configuration for the second pipe
24  * @stage:	assigned by crtc blender
25  * @needs_qos_remap: qos remap settings need to be updated
26  * @multirect_index: index of the rectangle of SSPP
27  * @multirect_mode: parallel or time multiplex multirect mode
28  * @pending:	whether the current update is still pending
29  * @plane_fetch_bw: calculated BW per plane
30  * @plane_clk: calculated clk per plane
31  * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
32  * @layout:     framebuffer memory layout
33  */
34 struct dpu_plane_state {
35 	struct drm_plane_state base;
36 	struct dpu_sw_pipe pipe;
37 	struct dpu_sw_pipe r_pipe;
38 	struct dpu_sw_pipe_cfg pipe_cfg;
39 	struct dpu_sw_pipe_cfg r_pipe_cfg;
40 	enum dpu_stage stage;
41 	bool needs_qos_remap;
42 	bool pending;
43 
44 	u64 plane_fetch_bw;
45 	u64 plane_clk;
46 
47 	bool needs_dirtyfb;
48 
49 	struct dpu_hw_fmt_layout layout;
50 };
51 
52 #define to_dpu_plane_state(x) \
53 	container_of(x, struct dpu_plane_state, base)
54 
55 void dpu_plane_flush(struct drm_plane *plane);
56 
57 void dpu_plane_set_error(struct drm_plane *plane, bool error);
58 
59 struct drm_plane *dpu_plane_init(struct drm_device *dev,
60 		uint32_t pipe, enum drm_plane_type type,
61 		unsigned long possible_crtcs);
62 
63 struct drm_plane *dpu_plane_init_virtual(struct drm_device *dev,
64 					 enum drm_plane_type type,
65 					 unsigned long possible_crtcs);
66 
67 int dpu_plane_color_fill(struct drm_plane *plane,
68 		uint32_t color, uint32_t alpha);
69 
70 #ifdef CONFIG_DEBUG_FS
71 void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
72 #else
dpu_plane_danger_signal_ctrl(struct drm_plane * plane,bool enable)73 static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
74 #endif
75 
76 int dpu_assign_plane_resources(struct dpu_global_state *global_state,
77 			       struct drm_atomic_state *state,
78 			       struct drm_crtc *crtc,
79 			       struct drm_plane_state **states,
80 			       unsigned int num_planes);
81 
82 #endif /* _DPU_PLANE_H_ */
83