1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * processor_idle - idle state submodule to the ACPI processor driver 4 * 5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> 6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> 8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> 9 * - Added processor hotplug support 10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> 11 * - Added support for C3 on SMP 12 */ 13 #define pr_fmt(fmt) "ACPI: " fmt 14 15 #include <linux/module.h> 16 #include <linux/acpi.h> 17 #include <linux/dmi.h> 18 #include <linux/sched.h> /* need_resched() */ 19 #include <linux/tick.h> 20 #include <linux/cpuidle.h> 21 #include <linux/cpu.h> 22 #include <linux/minmax.h> 23 #include <linux/perf_event.h> 24 #include <acpi/processor.h> 25 #include <linux/context_tracking.h> 26 27 /* 28 * Include the apic definitions for x86 to have the APIC timer related defines 29 * available also for UP (on SMP it gets magically included via linux/smp.h). 30 * asm/acpi.h is not an option, as it would require more include magic. Also 31 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. 32 */ 33 #ifdef CONFIG_X86 34 #include <asm/apic.h> 35 #include <asm/cpu.h> 36 #endif 37 38 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) 39 40 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; 41 module_param(max_cstate, uint, 0400); 42 static bool nocst __read_mostly; 43 module_param(nocst, bool, 0400); 44 static bool bm_check_disable __read_mostly; 45 module_param(bm_check_disable, bool, 0400); 46 47 static unsigned int latency_factor __read_mostly = 2; 48 module_param(latency_factor, uint, 0644); 49 50 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); 51 52 struct cpuidle_driver acpi_idle_driver = { 53 .name = "acpi_idle", 54 .owner = THIS_MODULE, 55 }; 56 57 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE 58 static 59 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); 60 61 static int disabled_by_idle_boot_param(void) 62 { 63 return boot_option_idle_override == IDLE_POLL || 64 boot_option_idle_override == IDLE_HALT; 65 } 66 67 /* 68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 69 * For now disable this. Probably a bug somewhere else. 70 * 71 * To skip this limit, boot/load with a large max_cstate limit. 72 */ 73 static int set_max_cstate(const struct dmi_system_id *id) 74 { 75 if (max_cstate > ACPI_PROCESSOR_MAX_POWER) 76 return 0; 77 78 pr_notice("%s detected - limiting to C%ld max_cstate." 79 " Override with \"processor.max_cstate=%d\"\n", id->ident, 80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); 81 82 max_cstate = (long)id->driver_data; 83 84 return 0; 85 } 86 87 static const struct dmi_system_id processor_power_dmi_table[] = { 88 { set_max_cstate, "Clevo 5600D", { 89 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 90 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 91 (void *)2}, 92 { set_max_cstate, "Pavilion zv5000", { 93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 94 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, 95 (void *)1}, 96 { set_max_cstate, "Asus L8400B", { 97 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), 98 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, 99 (void *)1}, 100 {}, 101 }; 102 103 104 /* 105 * Callers should disable interrupts before the call and enable 106 * interrupts after return. 107 */ 108 static void __cpuidle acpi_safe_halt(void) 109 { 110 if (!tif_need_resched()) { 111 raw_safe_halt(); 112 raw_local_irq_disable(); 113 } 114 } 115 116 #ifdef ARCH_APICTIMER_STOPS_ON_C3 117 118 /* 119 * Some BIOS implementations switch to C3 in the published C2 state. 120 * This seems to be a common problem on AMD boxen, but other vendors 121 * are affected too. We pick the most conservative approach: we assume 122 * that the local APIC stops in both C2 and C3. 123 */ 124 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 125 struct acpi_processor_cx *cx) 126 { 127 struct acpi_processor_power *pwr = &pr->power; 128 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; 129 130 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) 131 return; 132 133 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) 134 type = ACPI_STATE_C1; 135 136 /* 137 * Check, if one of the previous states already marked the lapic 138 * unstable 139 */ 140 if (pwr->timer_broadcast_on_state < state) 141 return; 142 143 if (cx->type >= type) 144 pr->power.timer_broadcast_on_state = state; 145 } 146 147 static void __lapic_timer_propagate_broadcast(void *arg) 148 { 149 struct acpi_processor *pr = arg; 150 151 if (pr->power.timer_broadcast_on_state < INT_MAX) 152 tick_broadcast_enable(); 153 else 154 tick_broadcast_disable(); 155 } 156 157 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) 158 { 159 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, 160 (void *)pr, 1); 161 } 162 163 /* Power(C) State timer broadcast control */ 164 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 165 struct acpi_processor_cx *cx) 166 { 167 return cx - pr->power.states >= pr->power.timer_broadcast_on_state; 168 } 169 170 #else 171 172 static void lapic_timer_check_state(int state, struct acpi_processor *pr, 173 struct acpi_processor_cx *cstate) { } 174 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } 175 176 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr, 177 struct acpi_processor_cx *cx) 178 { 179 return false; 180 } 181 182 #endif 183 184 #if defined(CONFIG_X86) 185 static void tsc_check_state(int state) 186 { 187 switch (boot_cpu_data.x86_vendor) { 188 case X86_VENDOR_HYGON: 189 case X86_VENDOR_AMD: 190 case X86_VENDOR_INTEL: 191 case X86_VENDOR_CENTAUR: 192 case X86_VENDOR_ZHAOXIN: 193 /* 194 * AMD Fam10h TSC will tick in all 195 * C/P/S0/S1 states when this bit is set. 196 */ 197 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) 198 return; 199 fallthrough; 200 default: 201 /* TSC could halt in idle, so notify users */ 202 if (state > ACPI_STATE_C1) 203 mark_tsc_unstable("TSC halts in idle"); 204 } 205 } 206 #else 207 static void tsc_check_state(int state) { return; } 208 #endif 209 210 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) 211 { 212 213 if (!pr->pblk) 214 return -ENODEV; 215 216 /* if info is obtained from pblk/fadt, type equals state */ 217 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; 218 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; 219 220 #ifndef CONFIG_HOTPLUG_CPU 221 /* 222 * Check for P_LVL2_UP flag before entering C2 and above on 223 * an SMP system. 224 */ 225 if ((num_online_cpus() > 1) && 226 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) 227 return -ENODEV; 228 #endif 229 230 /* determine C2 and C3 address from pblk */ 231 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; 232 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; 233 234 /* determine latencies from FADT */ 235 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; 236 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; 237 238 /* 239 * FADT specified C2 latency must be less than or equal to 240 * 100 microseconds. 241 */ 242 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { 243 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n", 244 acpi_gbl_FADT.c2_latency); 245 /* invalidate C2 */ 246 pr->power.states[ACPI_STATE_C2].address = 0; 247 } 248 249 /* 250 * FADT supplied C3 latency must be less than or equal to 251 * 1000 microseconds. 252 */ 253 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { 254 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", 255 acpi_gbl_FADT.c3_latency); 256 /* invalidate C3 */ 257 pr->power.states[ACPI_STATE_C3].address = 0; 258 } 259 260 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n", 261 pr->power.states[ACPI_STATE_C2].address, 262 pr->power.states[ACPI_STATE_C3].address); 263 264 snprintf(pr->power.states[ACPI_STATE_C2].desc, 265 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x", 266 pr->power.states[ACPI_STATE_C2].address); 267 snprintf(pr->power.states[ACPI_STATE_C3].desc, 268 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x", 269 pr->power.states[ACPI_STATE_C3].address); 270 271 if (!pr->power.states[ACPI_STATE_C2].address && 272 !pr->power.states[ACPI_STATE_C3].address) 273 return -ENODEV; 274 275 return 0; 276 } 277 278 static int acpi_processor_get_power_info_default(struct acpi_processor *pr) 279 { 280 if (!pr->power.states[ACPI_STATE_C1].valid) { 281 /* set the first C-State to C1 */ 282 /* all processors need to support C1 */ 283 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; 284 pr->power.states[ACPI_STATE_C1].valid = 1; 285 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; 286 287 snprintf(pr->power.states[ACPI_STATE_C1].desc, 288 ACPI_CX_DESC_LEN, "ACPI HLT"); 289 } 290 /* the C0 state only exists as a filler in our array */ 291 pr->power.states[ACPI_STATE_C0].valid = 1; 292 return 0; 293 } 294 295 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) 296 { 297 int ret; 298 299 if (nocst) 300 return -ENODEV; 301 302 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power); 303 if (ret) 304 return ret; 305 306 if (!pr->power.count) 307 return -EFAULT; 308 309 pr->flags.has_cst = 1; 310 return 0; 311 } 312 313 static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 314 struct acpi_processor_cx *cx) 315 { 316 static int bm_check_flag = -1; 317 static int bm_control_flag = -1; 318 319 320 if (!cx->address) 321 return; 322 323 /* 324 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 325 * DMA transfers are used by any ISA device to avoid livelock. 326 * Note that we could disable Type-F DMA (as recommended by 327 * the erratum), but this is known to disrupt certain ISA 328 * devices thus we take the conservative approach. 329 */ 330 if (errata.piix4.fdma) { 331 acpi_handle_debug(pr->handle, 332 "C3 not supported on PIIX4 with Type-F DMA\n"); 333 return; 334 } 335 336 /* All the logic here assumes flags.bm_check is same across all CPUs */ 337 if (bm_check_flag == -1) { 338 /* Determine whether bm_check is needed based on CPU */ 339 acpi_processor_power_init_bm_check(&(pr->flags), pr->id); 340 bm_check_flag = pr->flags.bm_check; 341 bm_control_flag = pr->flags.bm_control; 342 } else { 343 pr->flags.bm_check = bm_check_flag; 344 pr->flags.bm_control = bm_control_flag; 345 } 346 347 if (pr->flags.bm_check) { 348 if (!pr->flags.bm_control) { 349 if (pr->flags.has_cst != 1) { 350 /* bus mastering control is necessary */ 351 acpi_handle_debug(pr->handle, 352 "C3 support requires BM control\n"); 353 return; 354 } else { 355 /* Here we enter C3 without bus mastering */ 356 acpi_handle_debug(pr->handle, 357 "C3 support without BM control\n"); 358 } 359 } 360 } else { 361 /* 362 * WBINVD should be set in fadt, for C3 state to be 363 * supported on when bm_check is not required. 364 */ 365 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { 366 acpi_handle_debug(pr->handle, 367 "Cache invalidation should work properly" 368 " for C3 to be enabled on SMP systems\n"); 369 return; 370 } 371 } 372 373 /* 374 * Otherwise we've met all of our C3 requirements. 375 * Normalize the C3 latency to expidite policy. Enable 376 * checking of bus mastering status (bm_check) so we can 377 * use this in our C3 policy 378 */ 379 cx->valid = 1; 380 381 /* 382 * On older chipsets, BM_RLD needs to be set 383 * in order for Bus Master activity to wake the 384 * system from C3. Newer chipsets handle DMA 385 * during C3 automatically and BM_RLD is a NOP. 386 * In either case, the proper way to 387 * handle BM_RLD is to set it and leave it set. 388 */ 389 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); 390 } 391 392 static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length) 393 { 394 int i, j, k; 395 396 for (i = 1; i < length; i++) { 397 if (!states[i].valid) 398 continue; 399 400 for (j = i - 1, k = i; j >= 0; j--) { 401 if (!states[j].valid) 402 continue; 403 404 if (states[j].latency > states[k].latency) 405 swap(states[j].latency, states[k].latency); 406 407 k = j; 408 } 409 } 410 } 411 412 static int acpi_processor_power_verify(struct acpi_processor *pr) 413 { 414 unsigned int i; 415 unsigned int working = 0; 416 unsigned int last_latency = 0; 417 unsigned int last_type = 0; 418 bool buggy_latency = false; 419 420 pr->power.timer_broadcast_on_state = INT_MAX; 421 422 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 423 struct acpi_processor_cx *cx = &pr->power.states[i]; 424 425 switch (cx->type) { 426 case ACPI_STATE_C1: 427 cx->valid = 1; 428 break; 429 430 case ACPI_STATE_C2: 431 if (!cx->address) 432 break; 433 cx->valid = 1; 434 break; 435 436 case ACPI_STATE_C3: 437 acpi_processor_power_verify_c3(pr, cx); 438 break; 439 } 440 if (!cx->valid) 441 continue; 442 if (cx->type >= last_type && cx->latency < last_latency) 443 buggy_latency = true; 444 last_latency = cx->latency; 445 last_type = cx->type; 446 447 lapic_timer_check_state(i, pr, cx); 448 tsc_check_state(cx->type); 449 working++; 450 } 451 452 if (buggy_latency) { 453 pr_notice("FW issue: working around C-state latencies out of order\n"); 454 acpi_cst_latency_sort(&pr->power.states[1], max_cstate); 455 } 456 457 lapic_timer_propagate_broadcast(pr); 458 459 return working; 460 } 461 462 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 463 { 464 int result; 465 466 /* NOTE: the idle thread may not be running while calling 467 * this function */ 468 469 /* Zero initialize all the C-states info. */ 470 memset(pr->power.states, 0, sizeof(pr->power.states)); 471 472 result = acpi_processor_get_power_info_cst(pr); 473 if (result == -ENODEV) 474 result = acpi_processor_get_power_info_fadt(pr); 475 476 if (result) 477 return result; 478 479 acpi_processor_get_power_info_default(pr); 480 481 pr->power.count = acpi_processor_power_verify(pr); 482 pr->flags.power = 1; 483 484 return 0; 485 } 486 487 /** 488 * acpi_idle_bm_check - checks if bus master activity was detected 489 */ 490 static int acpi_idle_bm_check(void) 491 { 492 u32 bm_status = 0; 493 494 if (bm_check_disable) 495 return 0; 496 497 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); 498 if (bm_status) 499 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); 500 /* 501 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect 502 * the true state of bus mastering activity; forcing us to 503 * manually check the BMIDEA bit of each IDE channel. 504 */ 505 else if (errata.piix4.bmisx) { 506 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) 507 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) 508 bm_status = 1; 509 } 510 return bm_status; 511 } 512 513 static __cpuidle void io_idle(unsigned long addr) 514 { 515 /* IO port based C-state */ 516 inb(addr); 517 518 #ifdef CONFIG_X86 519 /* No delay is needed if we are in guest */ 520 if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) 521 return; 522 /* 523 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle, 524 * not this code. Assume that any Intel systems using this 525 * are ancient and may need the dummy wait. This also assumes 526 * that the motivating chipset issue was Intel-only. 527 */ 528 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 529 return; 530 #endif 531 /* 532 * Dummy wait op - must do something useless after P_LVL2 read 533 * because chipsets cannot guarantee that STPCLK# signal gets 534 * asserted in time to freeze execution properly 535 * 536 * This workaround has been in place since the original ACPI 537 * implementation was merged, circa 2002. 538 * 539 * If a profile is pointing to this instruction, please first 540 * consider moving your system to a more modern idle 541 * mechanism. 542 */ 543 inl(acpi_gbl_FADT.xpm_timer_block.address); 544 } 545 546 /** 547 * acpi_idle_do_entry - enter idle state using the appropriate method 548 * @cx: cstate data 549 * 550 * Caller disables interrupt before call and enables interrupt after return. 551 */ 552 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) 553 { 554 perf_lopwr_cb(true); 555 556 if (cx->entry_method == ACPI_CSTATE_FFH) { 557 /* Call into architectural FFH based C-state */ 558 acpi_processor_ffh_cstate_enter(cx); 559 } else if (cx->entry_method == ACPI_CSTATE_HALT) { 560 acpi_safe_halt(); 561 } else { 562 io_idle(cx->address); 563 } 564 565 perf_lopwr_cb(false); 566 } 567 568 /** 569 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) 570 * @dev: the target CPU 571 * @index: the index of suggested state 572 */ 573 static void acpi_idle_play_dead(struct cpuidle_device *dev, int index) 574 { 575 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 576 577 ACPI_FLUSH_CPU_CACHE(); 578 579 while (1) { 580 581 if (cx->entry_method == ACPI_CSTATE_HALT) 582 raw_safe_halt(); 583 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { 584 io_idle(cx->address); 585 } else if (cx->entry_method == ACPI_CSTATE_FFH) { 586 acpi_processor_ffh_play_dead(cx); 587 } else 588 return; 589 } 590 } 591 592 static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) 593 { 594 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && 595 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); 596 } 597 598 static int c3_cpu_count; 599 static DEFINE_RAW_SPINLOCK(c3_lock); 600 601 /** 602 * acpi_idle_enter_bm - enters C3 with proper BM handling 603 * @drv: cpuidle driver 604 * @pr: Target processor 605 * @cx: Target state context 606 * @index: index of target state 607 */ 608 static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv, 609 struct acpi_processor *pr, 610 struct acpi_processor_cx *cx, 611 int index) 612 { 613 static struct acpi_processor_cx safe_cx = { 614 .entry_method = ACPI_CSTATE_HALT, 615 }; 616 617 /* 618 * disable bus master 619 * bm_check implies we need ARB_DIS 620 * bm_control implies whether we can do ARB_DIS 621 * 622 * That leaves a case where bm_check is set and bm_control is not set. 623 * In that case we cannot do much, we enter C3 without doing anything. 624 */ 625 bool dis_bm = pr->flags.bm_control; 626 627 instrumentation_begin(); 628 629 /* If we can skip BM, demote to a safe state. */ 630 if (!cx->bm_sts_skip && acpi_idle_bm_check()) { 631 dis_bm = false; 632 index = drv->safe_state_index; 633 if (index >= 0) { 634 cx = this_cpu_read(acpi_cstate[index]); 635 } else { 636 cx = &safe_cx; 637 index = -EBUSY; 638 } 639 } 640 641 if (dis_bm) { 642 raw_spin_lock(&c3_lock); 643 c3_cpu_count++; 644 /* Disable bus master arbitration when all CPUs are in C3 */ 645 if (c3_cpu_count == num_online_cpus()) 646 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); 647 raw_spin_unlock(&c3_lock); 648 } 649 650 ct_cpuidle_enter(); 651 652 acpi_idle_do_entry(cx); 653 654 ct_cpuidle_exit(); 655 656 /* Re-enable bus master arbitration */ 657 if (dis_bm) { 658 raw_spin_lock(&c3_lock); 659 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); 660 c3_cpu_count--; 661 raw_spin_unlock(&c3_lock); 662 } 663 664 instrumentation_end(); 665 666 return index; 667 } 668 669 static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev, 670 struct cpuidle_driver *drv, int index) 671 { 672 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 673 struct acpi_processor *pr; 674 675 pr = __this_cpu_read(processors); 676 if (unlikely(!pr)) 677 return -EINVAL; 678 679 if (cx->type != ACPI_STATE_C1) { 680 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) 681 return acpi_idle_enter_bm(drv, pr, cx, index); 682 683 /* C2 to C1 demotion. */ 684 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { 685 index = ACPI_IDLE_STATE_START; 686 cx = per_cpu(acpi_cstate[index], dev->cpu); 687 } 688 } 689 690 if (cx->type == ACPI_STATE_C3) 691 ACPI_FLUSH_CPU_CACHE(); 692 693 acpi_idle_do_entry(cx); 694 695 return index; 696 } 697 698 static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev, 699 struct cpuidle_driver *drv, int index) 700 { 701 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); 702 703 if (cx->type == ACPI_STATE_C3) { 704 struct acpi_processor *pr = __this_cpu_read(processors); 705 706 if (unlikely(!pr)) 707 return 0; 708 709 if (pr->flags.bm_check) { 710 u8 bm_sts_skip = cx->bm_sts_skip; 711 712 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */ 713 cx->bm_sts_skip = 1; 714 acpi_idle_enter_bm(drv, pr, cx, index); 715 cx->bm_sts_skip = bm_sts_skip; 716 717 return 0; 718 } else { 719 ACPI_FLUSH_CPU_CACHE(); 720 } 721 } 722 acpi_idle_do_entry(cx); 723 724 return 0; 725 } 726 727 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 728 struct cpuidle_device *dev) 729 { 730 int i, count = ACPI_IDLE_STATE_START; 731 struct acpi_processor_cx *cx; 732 struct cpuidle_state *state; 733 734 if (max_cstate == 0) 735 max_cstate = 1; 736 737 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 738 state = &acpi_idle_driver.states[count]; 739 cx = &pr->power.states[i]; 740 741 if (!cx->valid) 742 continue; 743 744 per_cpu(acpi_cstate[count], dev->cpu) = cx; 745 746 if (lapic_timer_needs_broadcast(pr, cx)) 747 state->flags |= CPUIDLE_FLAG_TIMER_STOP; 748 749 if (cx->type == ACPI_STATE_C3) { 750 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED; 751 if (pr->flags.bm_check) 752 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 753 } 754 755 count++; 756 if (count == CPUIDLE_STATE_MAX) 757 break; 758 } 759 760 if (!count) 761 return -EINVAL; 762 763 return 0; 764 } 765 766 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 767 { 768 int i, count; 769 struct acpi_processor_cx *cx; 770 struct cpuidle_state *state; 771 struct cpuidle_driver *drv = &acpi_idle_driver; 772 773 if (max_cstate == 0) 774 max_cstate = 1; 775 776 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { 777 cpuidle_poll_state_init(drv); 778 count = 1; 779 } else { 780 count = 0; 781 } 782 783 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { 784 cx = &pr->power.states[i]; 785 786 if (!cx->valid) 787 continue; 788 789 state = &drv->states[count]; 790 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); 791 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); 792 state->exit_latency = cx->latency; 793 state->target_residency = cx->latency * latency_factor; 794 state->enter = acpi_idle_enter; 795 796 state->flags = 0; 797 798 state->enter_dead = acpi_idle_play_dead; 799 800 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) 801 drv->safe_state_index = count; 802 803 /* 804 * Halt-induced C1 is not good for ->enter_s2idle, because it 805 * re-enables interrupts on exit. Moreover, C1 is generally not 806 * particularly interesting from the suspend-to-idle angle, so 807 * avoid C1 and the situations in which we may need to fall back 808 * to it altogether. 809 */ 810 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) 811 state->enter_s2idle = acpi_idle_enter_s2idle; 812 813 count++; 814 if (count == CPUIDLE_STATE_MAX) 815 break; 816 } 817 818 drv->state_count = count; 819 820 if (!count) 821 return -EINVAL; 822 823 return 0; 824 } 825 826 static inline void acpi_processor_cstate_first_run_checks(void) 827 { 828 static int first_run; 829 830 if (first_run) 831 return; 832 dmi_check_system(processor_power_dmi_table); 833 max_cstate = acpi_processor_cstate_check(max_cstate); 834 if (max_cstate < ACPI_C_STATES_MAX) 835 pr_notice("processor limited to max C-state %d\n", max_cstate); 836 837 first_run++; 838 839 if (nocst) 840 return; 841 842 acpi_processor_claim_cst_control(); 843 } 844 #else 845 846 static inline int disabled_by_idle_boot_param(void) { return 0; } 847 static inline void acpi_processor_cstate_first_run_checks(void) { } 848 static int acpi_processor_get_cstate_info(struct acpi_processor *pr) 849 { 850 return -ENODEV; 851 } 852 853 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, 854 struct cpuidle_device *dev) 855 { 856 return -EINVAL; 857 } 858 859 static int acpi_processor_setup_cstates(struct acpi_processor *pr) 860 { 861 return -EINVAL; 862 } 863 864 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ 865 866 struct acpi_lpi_states_array { 867 unsigned int size; 868 unsigned int composite_states_size; 869 struct acpi_lpi_state *entries; 870 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; 871 }; 872 873 static int obj_get_integer(union acpi_object *obj, u32 *value) 874 { 875 if (obj->type != ACPI_TYPE_INTEGER) 876 return -EINVAL; 877 878 *value = obj->integer.value; 879 return 0; 880 } 881 882 static int acpi_processor_evaluate_lpi(acpi_handle handle, 883 struct acpi_lpi_states_array *info) 884 { 885 acpi_status status; 886 int ret = 0; 887 int pkg_count, state_idx = 1, loop; 888 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 889 union acpi_object *lpi_data; 890 struct acpi_lpi_state *lpi_state; 891 892 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); 893 if (ACPI_FAILURE(status)) { 894 acpi_handle_debug(handle, "No _LPI, giving up\n"); 895 return -ENODEV; 896 } 897 898 lpi_data = buffer.pointer; 899 900 /* There must be at least 4 elements = 3 elements + 1 package */ 901 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || 902 lpi_data->package.count < 4) { 903 pr_debug("not enough elements in _LPI\n"); 904 ret = -ENODATA; 905 goto end; 906 } 907 908 pkg_count = lpi_data->package.elements[2].integer.value; 909 910 /* Validate number of power states. */ 911 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { 912 pr_debug("count given by _LPI is not valid\n"); 913 ret = -ENODATA; 914 goto end; 915 } 916 917 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); 918 if (!lpi_state) { 919 ret = -ENOMEM; 920 goto end; 921 } 922 923 info->size = pkg_count; 924 info->entries = lpi_state; 925 926 /* LPI States start at index 3 */ 927 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { 928 union acpi_object *element, *pkg_elem, *obj; 929 930 element = &lpi_data->package.elements[loop]; 931 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) 932 continue; 933 934 pkg_elem = element->package.elements; 935 936 obj = pkg_elem + 6; 937 if (obj->type == ACPI_TYPE_BUFFER) { 938 struct acpi_power_register *reg; 939 940 reg = (struct acpi_power_register *)obj->buffer.pointer; 941 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && 942 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) 943 continue; 944 945 lpi_state->address = reg->address; 946 lpi_state->entry_method = 947 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? 948 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; 949 } else if (obj->type == ACPI_TYPE_INTEGER) { 950 lpi_state->entry_method = ACPI_CSTATE_INTEGER; 951 lpi_state->address = obj->integer.value; 952 } else { 953 continue; 954 } 955 956 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ 957 958 obj = pkg_elem + 9; 959 if (obj->type == ACPI_TYPE_STRING) 960 strscpy(lpi_state->desc, obj->string.pointer, 961 ACPI_CX_DESC_LEN); 962 963 lpi_state->index = state_idx; 964 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { 965 pr_debug("No min. residency found, assuming 10 us\n"); 966 lpi_state->min_residency = 10; 967 } 968 969 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { 970 pr_debug("No wakeup residency found, assuming 10 us\n"); 971 lpi_state->wake_latency = 10; 972 } 973 974 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) 975 lpi_state->flags = 0; 976 977 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) 978 lpi_state->arch_flags = 0; 979 980 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) 981 lpi_state->res_cnt_freq = 1; 982 983 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) 984 lpi_state->enable_parent_state = 0; 985 } 986 987 acpi_handle_debug(handle, "Found %d power states\n", state_idx); 988 end: 989 kfree(buffer.pointer); 990 return ret; 991 } 992 993 /* 994 * flat_state_cnt - the number of composite LPI states after the process of flattening 995 */ 996 static int flat_state_cnt; 997 998 /** 999 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state 1000 * 1001 * @local: local LPI state 1002 * @parent: parent LPI state 1003 * @result: composite LPI state 1004 */ 1005 static bool combine_lpi_states(struct acpi_lpi_state *local, 1006 struct acpi_lpi_state *parent, 1007 struct acpi_lpi_state *result) 1008 { 1009 if (parent->entry_method == ACPI_CSTATE_INTEGER) { 1010 if (!parent->address) /* 0 means autopromotable */ 1011 return false; 1012 result->address = local->address + parent->address; 1013 } else { 1014 result->address = parent->address; 1015 } 1016 1017 result->min_residency = max(local->min_residency, parent->min_residency); 1018 result->wake_latency = local->wake_latency + parent->wake_latency; 1019 result->enable_parent_state = parent->enable_parent_state; 1020 result->entry_method = local->entry_method; 1021 1022 result->flags = parent->flags; 1023 result->arch_flags = parent->arch_flags; 1024 result->index = parent->index; 1025 1026 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN); 1027 strlcat(result->desc, "+", ACPI_CX_DESC_LEN); 1028 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); 1029 return true; 1030 } 1031 1032 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) 1033 1034 static void stash_composite_state(struct acpi_lpi_states_array *curr_level, 1035 struct acpi_lpi_state *t) 1036 { 1037 curr_level->composite_states[curr_level->composite_states_size++] = t; 1038 } 1039 1040 static int flatten_lpi_states(struct acpi_processor *pr, 1041 struct acpi_lpi_states_array *curr_level, 1042 struct acpi_lpi_states_array *prev_level) 1043 { 1044 int i, j, state_count = curr_level->size; 1045 struct acpi_lpi_state *p, *t = curr_level->entries; 1046 1047 curr_level->composite_states_size = 0; 1048 for (j = 0; j < state_count; j++, t++) { 1049 struct acpi_lpi_state *flpi; 1050 1051 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) 1052 continue; 1053 1054 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { 1055 pr_warn("Limiting number of LPI states to max (%d)\n", 1056 ACPI_PROCESSOR_MAX_POWER); 1057 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); 1058 break; 1059 } 1060 1061 flpi = &pr->power.lpi_states[flat_state_cnt]; 1062 1063 if (!prev_level) { /* leaf/processor node */ 1064 memcpy(flpi, t, sizeof(*t)); 1065 stash_composite_state(curr_level, flpi); 1066 flat_state_cnt++; 1067 continue; 1068 } 1069 1070 for (i = 0; i < prev_level->composite_states_size; i++) { 1071 p = prev_level->composite_states[i]; 1072 if (t->index <= p->enable_parent_state && 1073 combine_lpi_states(p, t, flpi)) { 1074 stash_composite_state(curr_level, flpi); 1075 flat_state_cnt++; 1076 flpi++; 1077 } 1078 } 1079 } 1080 1081 kfree(curr_level->entries); 1082 return 0; 1083 } 1084 1085 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) 1086 { 1087 return -EOPNOTSUPP; 1088 } 1089 1090 static int acpi_processor_get_lpi_info(struct acpi_processor *pr) 1091 { 1092 int ret, i; 1093 acpi_status status; 1094 acpi_handle handle = pr->handle, pr_ahandle; 1095 struct acpi_device *d = NULL; 1096 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; 1097 1098 /* make sure our architecture has support */ 1099 ret = acpi_processor_ffh_lpi_probe(pr->id); 1100 if (ret == -EOPNOTSUPP) 1101 return ret; 1102 1103 if (!osc_pc_lpi_support_confirmed) 1104 return -EOPNOTSUPP; 1105 1106 if (!acpi_has_method(handle, "_LPI")) 1107 return -EINVAL; 1108 1109 flat_state_cnt = 0; 1110 prev = &info[0]; 1111 curr = &info[1]; 1112 handle = pr->handle; 1113 ret = acpi_processor_evaluate_lpi(handle, prev); 1114 if (ret) 1115 return ret; 1116 flatten_lpi_states(pr, prev, NULL); 1117 1118 status = acpi_get_parent(handle, &pr_ahandle); 1119 while (ACPI_SUCCESS(status)) { 1120 d = acpi_fetch_acpi_dev(pr_ahandle); 1121 if (!d) 1122 break; 1123 1124 handle = pr_ahandle; 1125 1126 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) 1127 break; 1128 1129 /* can be optional ? */ 1130 if (!acpi_has_method(handle, "_LPI")) 1131 break; 1132 1133 ret = acpi_processor_evaluate_lpi(handle, curr); 1134 if (ret) 1135 break; 1136 1137 /* flatten all the LPI states in this level of hierarchy */ 1138 flatten_lpi_states(pr, curr, prev); 1139 1140 tmp = prev, prev = curr, curr = tmp; 1141 1142 status = acpi_get_parent(handle, &pr_ahandle); 1143 } 1144 1145 pr->power.count = flat_state_cnt; 1146 /* reset the index after flattening */ 1147 for (i = 0; i < pr->power.count; i++) 1148 pr->power.lpi_states[i].index = i; 1149 1150 /* Tell driver that _LPI is supported. */ 1151 pr->flags.has_lpi = 1; 1152 pr->flags.power = 1; 1153 1154 return 0; 1155 } 1156 1157 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) 1158 { 1159 return -ENODEV; 1160 } 1161 1162 /** 1163 * acpi_idle_lpi_enter - enters an ACPI any LPI state 1164 * @dev: the target CPU 1165 * @drv: cpuidle driver containing cpuidle state info 1166 * @index: index of target state 1167 * 1168 * Return: 0 for success or negative value for error 1169 */ 1170 static int acpi_idle_lpi_enter(struct cpuidle_device *dev, 1171 struct cpuidle_driver *drv, int index) 1172 { 1173 struct acpi_processor *pr; 1174 struct acpi_lpi_state *lpi; 1175 1176 pr = __this_cpu_read(processors); 1177 1178 if (unlikely(!pr)) 1179 return -EINVAL; 1180 1181 lpi = &pr->power.lpi_states[index]; 1182 if (lpi->entry_method == ACPI_CSTATE_FFH) 1183 return acpi_processor_ffh_lpi_enter(lpi); 1184 1185 return -EINVAL; 1186 } 1187 1188 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) 1189 { 1190 int i; 1191 struct acpi_lpi_state *lpi; 1192 struct cpuidle_state *state; 1193 struct cpuidle_driver *drv = &acpi_idle_driver; 1194 1195 if (!pr->flags.has_lpi) 1196 return -EOPNOTSUPP; 1197 1198 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { 1199 lpi = &pr->power.lpi_states[i]; 1200 1201 state = &drv->states[i]; 1202 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); 1203 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); 1204 state->exit_latency = lpi->wake_latency; 1205 state->target_residency = lpi->min_residency; 1206 state->flags |= arch_get_idle_state_flags(lpi->arch_flags); 1207 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH) 1208 state->flags |= CPUIDLE_FLAG_RCU_IDLE; 1209 state->enter = acpi_idle_lpi_enter; 1210 drv->safe_state_index = i; 1211 } 1212 1213 drv->state_count = i; 1214 1215 return 0; 1216 } 1217 1218 /** 1219 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle 1220 * global state data i.e. idle routines 1221 * 1222 * @pr: the ACPI processor 1223 */ 1224 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) 1225 { 1226 int i; 1227 struct cpuidle_driver *drv = &acpi_idle_driver; 1228 1229 if (!pr->flags.power_setup_done || !pr->flags.power) 1230 return -EINVAL; 1231 1232 drv->safe_state_index = -1; 1233 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { 1234 drv->states[i].name[0] = '\0'; 1235 drv->states[i].desc[0] = '\0'; 1236 } 1237 1238 if (pr->flags.has_lpi) 1239 return acpi_processor_setup_lpi_states(pr); 1240 1241 return acpi_processor_setup_cstates(pr); 1242 } 1243 1244 /** 1245 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE 1246 * device i.e. per-cpu data 1247 * 1248 * @pr: the ACPI processor 1249 * @dev : the cpuidle device 1250 */ 1251 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, 1252 struct cpuidle_device *dev) 1253 { 1254 if (!pr->flags.power_setup_done || !pr->flags.power || !dev) 1255 return -EINVAL; 1256 1257 dev->cpu = pr->id; 1258 if (pr->flags.has_lpi) 1259 return acpi_processor_ffh_lpi_probe(pr->id); 1260 1261 return acpi_processor_setup_cpuidle_cx(pr, dev); 1262 } 1263 1264 static int acpi_processor_get_power_info(struct acpi_processor *pr) 1265 { 1266 int ret; 1267 1268 ret = acpi_processor_get_lpi_info(pr); 1269 if (ret) 1270 ret = acpi_processor_get_cstate_info(pr); 1271 1272 return ret; 1273 } 1274 1275 int acpi_processor_hotplug(struct acpi_processor *pr) 1276 { 1277 int ret = 0; 1278 struct cpuidle_device *dev; 1279 1280 if (disabled_by_idle_boot_param()) 1281 return 0; 1282 1283 if (!pr->flags.power_setup_done) 1284 return -ENODEV; 1285 1286 dev = per_cpu(acpi_cpuidle_device, pr->id); 1287 cpuidle_pause_and_lock(); 1288 cpuidle_disable_device(dev); 1289 ret = acpi_processor_get_power_info(pr); 1290 if (!ret && pr->flags.power) { 1291 acpi_processor_setup_cpuidle_dev(pr, dev); 1292 ret = cpuidle_enable_device(dev); 1293 } 1294 cpuidle_resume_and_unlock(); 1295 1296 return ret; 1297 } 1298 1299 int acpi_processor_power_state_has_changed(struct acpi_processor *pr) 1300 { 1301 int cpu; 1302 struct acpi_processor *_pr; 1303 struct cpuidle_device *dev; 1304 1305 if (disabled_by_idle_boot_param()) 1306 return 0; 1307 1308 if (!pr->flags.power_setup_done) 1309 return -ENODEV; 1310 1311 /* 1312 * FIXME: Design the ACPI notification to make it once per 1313 * system instead of once per-cpu. This condition is a hack 1314 * to make the code that updates C-States be called once. 1315 */ 1316 1317 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { 1318 1319 /* Protect against cpu-hotplug */ 1320 cpus_read_lock(); 1321 cpuidle_pause_and_lock(); 1322 1323 /* Disable all cpuidle devices */ 1324 for_each_online_cpu(cpu) { 1325 _pr = per_cpu(processors, cpu); 1326 if (!_pr || !_pr->flags.power_setup_done) 1327 continue; 1328 dev = per_cpu(acpi_cpuidle_device, cpu); 1329 cpuidle_disable_device(dev); 1330 } 1331 1332 /* Populate Updated C-state information */ 1333 acpi_processor_get_power_info(pr); 1334 acpi_processor_setup_cpuidle_states(pr); 1335 1336 /* Enable all cpuidle devices */ 1337 for_each_online_cpu(cpu) { 1338 _pr = per_cpu(processors, cpu); 1339 if (!_pr || !_pr->flags.power_setup_done) 1340 continue; 1341 acpi_processor_get_power_info(_pr); 1342 if (_pr->flags.power) { 1343 dev = per_cpu(acpi_cpuidle_device, cpu); 1344 acpi_processor_setup_cpuidle_dev(_pr, dev); 1345 cpuidle_enable_device(dev); 1346 } 1347 } 1348 cpuidle_resume_and_unlock(); 1349 cpus_read_unlock(); 1350 } 1351 1352 return 0; 1353 } 1354 1355 static int acpi_processor_registered; 1356 1357 int acpi_processor_power_init(struct acpi_processor *pr) 1358 { 1359 int retval; 1360 struct cpuidle_device *dev; 1361 1362 if (disabled_by_idle_boot_param()) 1363 return 0; 1364 1365 acpi_processor_cstate_first_run_checks(); 1366 1367 if (!acpi_processor_get_power_info(pr)) 1368 pr->flags.power_setup_done = 1; 1369 1370 /* 1371 * Install the idle handler if processor power management is supported. 1372 * Note that we use previously set idle handler will be used on 1373 * platforms that only support C1. 1374 */ 1375 if (pr->flags.power) { 1376 /* Register acpi_idle_driver if not already registered */ 1377 if (!acpi_processor_registered) { 1378 acpi_processor_setup_cpuidle_states(pr); 1379 retval = cpuidle_register_driver(&acpi_idle_driver); 1380 if (retval) 1381 return retval; 1382 pr_debug("%s registered with cpuidle\n", 1383 acpi_idle_driver.name); 1384 } 1385 1386 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1387 if (!dev) 1388 return -ENOMEM; 1389 per_cpu(acpi_cpuidle_device, pr->id) = dev; 1390 1391 acpi_processor_setup_cpuidle_dev(pr, dev); 1392 1393 /* Register per-cpu cpuidle_device. Cpuidle driver 1394 * must already be registered before registering device 1395 */ 1396 retval = cpuidle_register_device(dev); 1397 if (retval) { 1398 if (acpi_processor_registered == 0) 1399 cpuidle_unregister_driver(&acpi_idle_driver); 1400 return retval; 1401 } 1402 acpi_processor_registered++; 1403 } 1404 return 0; 1405 } 1406 1407 int acpi_processor_power_exit(struct acpi_processor *pr) 1408 { 1409 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); 1410 1411 if (disabled_by_idle_boot_param()) 1412 return 0; 1413 1414 if (pr->flags.power) { 1415 cpuidle_unregister_device(dev); 1416 acpi_processor_registered--; 1417 if (acpi_processor_registered == 0) 1418 cpuidle_unregister_driver(&acpi_idle_driver); 1419 1420 kfree(dev); 1421 } 1422 1423 pr->flags.power_setup_done = 0; 1424 return 0; 1425 } 1426