1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * S390 low-level entry points. 4 * 5 * Copyright IBM Corp. 1999, 2012 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 */ 10 11#include <linux/export.h> 12#include <linux/init.h> 13#include <linux/linkage.h> 14#include <asm/asm-extable.h> 15#include <asm/alternative.h> 16#include <asm/processor.h> 17#include <asm/cache.h> 18#include <asm/dwarf.h> 19#include <asm/errno.h> 20#include <asm/ptrace.h> 21#include <asm/thread_info.h> 22#include <asm/asm-offsets.h> 23#include <asm/unistd.h> 24#include <asm/page.h> 25#include <asm/sigp.h> 26#include <asm/irq.h> 27#include <asm/fpu-insn.h> 28#include <asm/setup.h> 29#include <asm/nmi.h> 30#include <asm/nospec-insn.h> 31#include <asm/lowcore.h> 32#include <asm/machine.h> 33 34_LPP_OFFSET = __LC_LPP 35 36 .macro STBEAR address 37 ALTERNATIVE "nop", ".insn s,0xb2010000,\address", ALT_FACILITY(193) 38 .endm 39 40 .macro LBEAR address 41 ALTERNATIVE "nop", ".insn s,0xb2000000,\address", ALT_FACILITY(193) 42 .endm 43 44 .macro LPSWEY address, lpswe 45 ALTERNATIVE_2 "b \lpswe;nopr", \ 46 ".insn siy,0xeb0000000071,\address,0", ALT_FACILITY(193), \ 47 __stringify(.insn siy,0xeb0000000071,LOWCORE_ALT_ADDRESS+\address,0), \ 48 ALT_FEATURE(MFEATURE_LOWCORE) 49 .endm 50 51 .macro MBEAR reg, lowcore 52 ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK(\lowcore)),\ 53 ALT_FACILITY(193) 54 .endm 55 56 .macro CHECK_VMAP_STACK savearea, lowcore, oklabel 57 lgr %r14,%r15 58 nill %r14,0x10000 - THREAD_SIZE 59 oill %r14,STACK_INIT_OFFSET 60 clg %r14,__LC_KERNEL_STACK(\lowcore) 61 je \oklabel 62 clg %r14,__LC_ASYNC_STACK(\lowcore) 63 je \oklabel 64 clg %r14,__LC_MCCK_STACK(\lowcore) 65 je \oklabel 66 clg %r14,__LC_NODAT_STACK(\lowcore) 67 je \oklabel 68 clg %r14,__LC_RESTART_STACK(\lowcore) 69 je \oklabel 70 la %r14,\savearea(\lowcore) 71 j stack_invalid 72 .endm 73 74 /* 75 * The TSTMSK macro generates a test-under-mask instruction by 76 * calculating the memory offset for the specified mask value. 77 * Mask value can be any constant. The macro shifts the mask 78 * value to calculate the memory offset for the test-under-mask 79 * instruction. 80 */ 81 .macro TSTMSK addr, mask, size=8, bytepos=0 82 .if (\bytepos < \size) && (\mask >> 8) 83 .if (\mask & 0xff) 84 .error "Mask exceeds byte boundary" 85 .endif 86 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" 87 .exitm 88 .endif 89 .ifeq \mask 90 .error "Mask must not be zero" 91 .endif 92 off = \size - \bytepos - 1 93 tm off+\addr, \mask 94 .endm 95 96 .macro BPOFF 97 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", ALT_SPEC(82) 98 .endm 99 100 .macro BPON 101 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", ALT_SPEC(82) 102 .endm 103 104 .macro BPENTER tif_ptr,tif_mask 105 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \ 106 "j .+12; nop; nop", ALT_SPEC(82) 107 .endm 108 109 .macro BPEXIT tif_ptr,tif_mask 110 TSTMSK \tif_ptr,\tif_mask 111 ALTERNATIVE "jz .+8; .insn rrf,0xb2e80000,0,0,12,0", \ 112 "jnz .+8; .insn rrf,0xb2e80000,0,0,13,0", ALT_SPEC(82) 113 .endm 114 115#if IS_ENABLED(CONFIG_KVM) 116 .macro SIEEXIT sie_control,lowcore 117 lg %r9,\sie_control # get control block pointer 118 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE 119 lctlg %c1,%c1,__LC_USER_ASCE(\lowcore) # load primary asce 120 lg %r9,__LC_CURRENT(\lowcore) 121 mvi __TI_sie(%r9),0 122 larl %r9,sie_exit # skip forward to sie_exit 123 .endm 124#endif 125 126 .macro STACKLEAK_ERASE 127#ifdef CONFIG_GCC_PLUGIN_STACKLEAK 128 brasl %r14,stackleak_erase_on_task_stack 129#endif 130 .endm 131 132 GEN_BR_THUNK %r14 133 134 .section .kprobes.text, "ax" 135.Ldummy: 136 /* 137 * The following nop exists only in order to avoid that the next 138 * symbol starts at the beginning of the kprobes text section. 139 * In that case there would be several symbols at the same address. 140 * E.g. objdump would take an arbitrary symbol when disassembling 141 * the code. 142 * With the added nop in between this cannot happen. 143 */ 144 nop 0 145 146/* 147 * Scheduler resume function, called by __switch_to 148 * gpr2 = (task_struct *)prev 149 * gpr3 = (task_struct *)next 150 * Returns: 151 * gpr2 = prev 152 */ 153SYM_FUNC_START(__switch_to_asm) 154 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task 155 lghi %r4,__TASK_stack 156 lghi %r1,__TASK_thread 157 llill %r5,STACK_INIT_OFFSET 158 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev 159 lg %r15,0(%r4,%r3) # start of kernel stack of next 160 agr %r15,%r5 # end of kernel stack of next 161 GET_LC %r13 162 stg %r3,__LC_CURRENT(%r13) # store task struct of next 163 stg %r15,__LC_KERNEL_STACK(%r13) # store end of kernel stack 164 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next 165 aghi %r3,__TASK_pid 166 mvc __LC_CURRENT_PID(4,%r13),0(%r3) # store pid of next 167 ALTERNATIVE "nop", "lpp _LPP_OFFSET(%r13)", ALT_FACILITY(40) 168 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task 169 BR_EX %r14 170SYM_FUNC_END(__switch_to_asm) 171 172#if IS_ENABLED(CONFIG_KVM) 173/* 174 * __sie64a calling convention: 175 * %r2 pointer to sie control block phys 176 * %r3 pointer to sie control block virt 177 * %r4 guest register save area 178 * %r5 guest asce 179 */ 180SYM_FUNC_START(__sie64a) 181 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers 182 GET_LC %r13 183 lg %r14,__LC_CURRENT(%r13) 184 stg %r2,__SF_SIE_CONTROL_PHYS(%r15) # save sie block physical.. 185 stg %r3,__SF_SIE_CONTROL(%r15) # ...and virtual addresses 186 stg %r4,__SF_SIE_SAVEAREA(%r15) # save guest register save area 187 stg %r5,__SF_SIE_GUEST_ASCE(%r15) # save guest asce 188 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0 189 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r14) # copy thread flags 190 lmg %r0,%r13,0(%r4) # load guest gprs 0-13 191 mvi __TI_sie(%r14),1 192 lctlg %c1,%c1,__SF_SIE_GUEST_ASCE(%r15) # load primary asce 193 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer 194 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now 195 tm __SIE_PROG20+3(%r14),3 # last exit... 196 jnz .Lsie_skip 197 lg %r14,__SF_SIE_CONTROL_PHYS(%r15) # get sie block phys addr 198 BPEXIT __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST 199.Lsie_entry: 200 sie 0(%r14) 201# Let the next instruction be NOP to avoid triggering a machine check 202# and handling it in a guest as result of the instruction execution. 203 nopr 7 204.Lsie_leave: 205 BPOFF 206 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST 207.Lsie_skip: 208 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer 209 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE 210 GET_LC %r14 211 lctlg %c1,%c1,__LC_USER_ASCE(%r14) # load primary asce 212 lg %r14,__LC_CURRENT(%r14) 213 mvi __TI_sie(%r14),0 214SYM_INNER_LABEL(sie_exit, SYM_L_GLOBAL) 215 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area 216 stmg %r0,%r13,0(%r14) # save guest gprs 0-13 217 xgr %r0,%r0 # clear guest registers to 218 xgr %r1,%r1 # prevent speculative use 219 xgr %r3,%r3 220 xgr %r4,%r4 221 xgr %r5,%r5 222 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers 223 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code 224 BR_EX %r14 225SYM_FUNC_END(__sie64a) 226EXPORT_SYMBOL(__sie64a) 227EXPORT_SYMBOL(sie_exit) 228#endif 229 230/* 231 * SVC interrupt handler routine. System calls are synchronous events and 232 * are entered with interrupts disabled. 233 */ 234 235SYM_CODE_START(system_call) 236 STMG_LC %r8,%r15,__LC_SAVE_AREA 237 GET_LC %r13 238 stpt __LC_SYS_ENTER_TIMER(%r13) 239 BPOFF 240 lghi %r14,0 241.Lsysc_per: 242 STBEAR __LC_LAST_BREAK(%r13) 243 lg %r15,__LC_KERNEL_STACK(%r13) 244 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 245 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 246 # clear user controlled register to prevent speculative use 247 xgr %r0,%r0 248 xgr %r1,%r1 249 xgr %r4,%r4 250 xgr %r5,%r5 251 xgr %r6,%r6 252 xgr %r7,%r7 253 xgr %r8,%r8 254 xgr %r9,%r9 255 xgr %r10,%r10 256 xgr %r11,%r11 257 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs 258 mvc __PT_R8(64,%r2),__LC_SAVE_AREA(%r13) 259 MBEAR %r2,%r13 260 lgr %r3,%r14 261 brasl %r14,__do_syscall 262 STACKLEAK_ERASE 263 mvc __LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15) 264 BPON 265 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15) 266 stpt __LC_EXIT_TIMER(%r13) 267 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 268 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE 269SYM_CODE_END(system_call) 270 271# 272# a new process exits the kernel with ret_from_fork 273# 274SYM_CODE_START(ret_from_fork) 275 lgr %r3,%r11 276 brasl %r14,__ret_from_fork 277 STACKLEAK_ERASE 278 GET_LC %r13 279 mvc __LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15) 280 BPON 281 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15) 282 stpt __LC_EXIT_TIMER(%r13) 283 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 284 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE 285SYM_CODE_END(ret_from_fork) 286 287/* 288 * Program check handler routine 289 */ 290 291SYM_CODE_START(pgm_check_handler) 292 STMG_LC %r8,%r15,__LC_SAVE_AREA 293 GET_LC %r13 294 stpt __LC_SYS_ENTER_TIMER(%r13) 295 BPOFF 296 lmg %r8,%r9,__LC_PGM_OLD_PSW(%r13) 297 xgr %r10,%r10 298 tmhh %r8,0x0001 # coming from user space? 299 jo 3f # -> fault in user space 300#if IS_ENABLED(CONFIG_KVM) 301 lg %r11,__LC_CURRENT(%r13) 302 tm __TI_sie(%r11),0xff 303 jz 1f 304 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST 305 SIEEXIT __SF_SIE_CONTROL(%r15),%r13 306 lghi %r10,_PIF_GUEST_FAULT 307#endif 3081: tmhh %r8,0x4000 # PER bit set in old PSW ? 309 jnz 2f # -> enabled, can't be a double fault 310 tm __LC_PGM_ILC+3(%r13),0x80 # check for per exception 311 jnz .Lpgm_svcper # -> single stepped svc 3122: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 313 # CHECK_VMAP_STACK branches to stack_invalid or 4f 314 CHECK_VMAP_STACK __LC_SAVE_AREA,%r13,4f 3153: lg %r15,__LC_KERNEL_STACK(%r13) 3164: la %r11,STACK_FRAME_OVERHEAD(%r15) 317 stg %r10,__PT_FLAGS(%r11) 318 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 319 stmg %r0,%r7,__PT_R0(%r11) 320 mvc __PT_R8(64,%r11),__LC_SAVE_AREA(%r13) 321 mvc __PT_LAST_BREAK(8,%r11),__LC_PGM_LAST_BREAK(%r13) 322 stmg %r8,%r9,__PT_PSW(%r11) 323 # clear user controlled registers to prevent speculative use 324 xgr %r0,%r0 325 xgr %r1,%r1 326 xgr %r3,%r3 327 xgr %r4,%r4 328 xgr %r5,%r5 329 xgr %r6,%r6 330 xgr %r7,%r7 331 xgr %r12,%r12 332 lgr %r2,%r11 333 brasl %r14,__do_pgm_check 334 tmhh %r8,0x0001 # returning to user space? 335 jno .Lpgm_exit_kernel 336 STACKLEAK_ERASE 337 BPON 338 stpt __LC_EXIT_TIMER(%r13) 339.Lpgm_exit_kernel: 340 mvc __LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15) 341 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15) 342 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 343 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE 344 345# 346# single stepped system call 347# 348.Lpgm_svcper: 349 mvc __LC_RETURN_PSW(8,%r13),__LC_SVC_NEW_PSW(%r13) 350 larl %r14,.Lsysc_per 351 stg %r14,__LC_RETURN_PSW+8(%r13) 352 lghi %r14,1 353 LBEAR __LC_PGM_LAST_BREAK(%r13) 354 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE # branch to .Lsysc_per 355SYM_CODE_END(pgm_check_handler) 356 357/* 358 * Interrupt handler macro used for external and IO interrupts. 359 */ 360.macro INT_HANDLER name,lc_old_psw,handler 361SYM_CODE_START(\name) 362 STMG_LC %r8,%r15,__LC_SAVE_AREA 363 GET_LC %r13 364 stckf __LC_INT_CLOCK(%r13) 365 stpt __LC_SYS_ENTER_TIMER(%r13) 366 STBEAR __LC_LAST_BREAK(%r13) 367 BPOFF 368 lmg %r8,%r9,\lc_old_psw(%r13) 369 tmhh %r8,0x0001 # interrupting from user ? 370 jnz 1f 371#if IS_ENABLED(CONFIG_KVM) 372 lg %r10,__LC_CURRENT(%r13) 373 tm __TI_sie(%r10),0xff 374 jz 0f 375 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST 376 SIEEXIT __SF_SIE_CONTROL(%r15),%r13 377#endif 3780: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) 379 j 2f 3801: lg %r15,__LC_KERNEL_STACK(%r13) 3812: xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 382 la %r11,STACK_FRAME_OVERHEAD(%r15) 383 stmg %r0,%r7,__PT_R0(%r11) 384 # clear user controlled registers to prevent speculative use 385 xgr %r0,%r0 386 xgr %r1,%r1 387 xgr %r3,%r3 388 xgr %r4,%r4 389 xgr %r5,%r5 390 xgr %r6,%r6 391 xgr %r7,%r7 392 xgr %r10,%r10 393 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 394 mvc __PT_R8(64,%r11),__LC_SAVE_AREA(%r13) 395 MBEAR %r11,%r13 396 stmg %r8,%r9,__PT_PSW(%r11) 397 lgr %r2,%r11 # pass pointer to pt_regs 398 brasl %r14,\handler 399 mvc __LC_RETURN_PSW(16,%r13),__PT_PSW(%r11) 400 tmhh %r8,0x0001 # returning to user ? 401 jno 2f 402 STACKLEAK_ERASE 403 BPON 404 stpt __LC_EXIT_TIMER(%r13) 4052: LBEAR __PT_LAST_BREAK(%r11) 406 lmg %r0,%r15,__PT_R0(%r11) 407 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE 408SYM_CODE_END(\name) 409.endm 410 411 .section .irqentry.text, "ax" 412 413INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq 414INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq 415 416 .section .kprobes.text, "ax" 417 418/* 419 * Machine check handler routines 420 */ 421SYM_CODE_START(mcck_int_handler) 422 BPOFF 423 GET_LC %r13 424 lmg %r8,%r9,__LC_MCK_OLD_PSW(%r13) 425 TSTMSK __LC_MCCK_CODE(%r13),MCCK_CODE_SYSTEM_DAMAGE 426 jo .Lmcck_panic # yes -> rest of mcck code invalid 427 TSTMSK __LC_MCCK_CODE(%r13),MCCK_CODE_CR_VALID 428 jno .Lmcck_panic # control registers invalid -> panic 429 ptlb 430 lay %r14,__LC_CPU_TIMER_SAVE_AREA(%r13) 431 mvc __LC_MCCK_ENTER_TIMER(8,%r13),0(%r14) 432 TSTMSK __LC_MCCK_CODE(%r13),MCCK_CODE_CPU_TIMER_VALID 433 jo 3f 434 la %r14,__LC_SYS_ENTER_TIMER(%r13) 435 clc 0(8,%r14),__LC_EXIT_TIMER(%r13) 436 jl 1f 437 la %r14,__LC_EXIT_TIMER(%r13) 4381: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER(%r13) 439 jl 2f 440 la %r14,__LC_LAST_UPDATE_TIMER(%r13) 4412: spt 0(%r14) 442 mvc __LC_MCCK_ENTER_TIMER(8,%r13),0(%r14) 4433: TSTMSK __LC_MCCK_CODE(%r13),MCCK_CODE_PSW_MWP_VALID 444 jno .Lmcck_panic 445 tmhh %r8,0x0001 # interrupting from user ? 446 jnz .Lmcck_user 447 TSTMSK __LC_MCCK_CODE(%r13),MCCK_CODE_PSW_IA_VALID 448 jno .Lmcck_panic 449#if IS_ENABLED(CONFIG_KVM) 450 lg %r10,__LC_CURRENT(%r13) 451 tm __TI_sie(%r10),0xff 452 jz .Lmcck_user 453 # Need to compare the address instead of __TI_SIE flag. 454 # Otherwise there would be a race between setting the flag 455 # and entering SIE (or leaving and clearing the flag). This 456 # would cause machine checks targeted at the guest to be 457 # handled by the host. 458 larl %r14,.Lsie_entry 459 clgrjl %r9,%r14, 4f 460 larl %r14,.Lsie_leave 461 clgrjhe %r9,%r14, 4f 462 lg %r10,__LC_PCPU(%r13) 463 oi __PCPU_FLAGS+7(%r10), _CIF_MCCK_GUEST 4644: BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST 465 SIEEXIT __SF_SIE_CONTROL(%r15),%r13 466#endif 467.Lmcck_user: 468 lg %r15,__LC_MCCK_STACK(%r13) 469 la %r11,STACK_FRAME_OVERHEAD(%r15) 470 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 471 lay %r14,__LC_GPREGS_SAVE_AREA(%r13) 472 mvc __PT_R0(128,%r11),0(%r14) 473 # clear user controlled registers to prevent speculative use 474 xgr %r0,%r0 475 xgr %r1,%r1 476 xgr %r3,%r3 477 xgr %r4,%r4 478 xgr %r5,%r5 479 xgr %r6,%r6 480 xgr %r7,%r7 481 xgr %r10,%r10 482 stmg %r8,%r9,__PT_PSW(%r11) 483 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) 484 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 485 lgr %r2,%r11 # pass pointer to pt_regs 486 brasl %r14,s390_do_machine_check 487 lmg %r0,%r10,__PT_R0(%r11) 488 mvc __LC_RETURN_MCCK_PSW(16,%r13),__PT_PSW(%r11) # move return PSW 489 tm __LC_RETURN_MCCK_PSW+1(%r13),0x01 # returning to user ? 490 jno 0f 491 BPON 492 stpt __LC_EXIT_TIMER(%r13) 4930: ALTERNATIVE "brcl 0,0", __stringify(lay %r12,__LC_LAST_BREAK_SAVE_AREA(%r13)),\ 494 ALT_FACILITY(193) 495 LBEAR 0(%r12) 496 lmg %r11,%r15,__PT_R11(%r11) 497 LPSWEY __LC_RETURN_MCCK_PSW,__LC_RETURN_MCCK_LPSWE 498 499.Lmcck_panic: 500 /* 501 * Iterate over all possible CPU addresses in the range 0..0xffff 502 * and stop each CPU using signal processor. Use compare and swap 503 * to allow just one CPU-stopper and prevent concurrent CPUs from 504 * stopping each other while leaving the others running. 505 */ 506 lhi %r5,0 507 lhi %r6,1 508 larl %r7,stop_lock 509 cs %r5,%r6,0(%r7) # single CPU-stopper only 510 jnz 4f 511 larl %r7,this_cpu 512 stap 0(%r7) # this CPU address 513 lh %r4,0(%r7) 514 nilh %r4,0 515 lhi %r0,1 516 sll %r0,16 # CPU counter 517 lhi %r3,0 # next CPU address 5180: cr %r3,%r4 519 je 2f 5201: sigp %r1,%r3,SIGP_STOP # stop next CPU 521 brc SIGP_CC_BUSY,1b 5222: ahi %r3,1 523 brct %r0,0b 5243: sigp %r1,%r4,SIGP_STOP # stop this CPU 525 brc SIGP_CC_BUSY,3b 5264: j 4b 527SYM_CODE_END(mcck_int_handler) 528 529SYM_CODE_START(restart_int_handler) 530 ALTERNATIVE "nop", "lpp _LPP_OFFSET", ALT_FACILITY(40) 531 stg %r15,__LC_SAVE_AREA_RESTART 532 TSTMSK __LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4 533 jz 0f 534 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA 5350: larl %r15,daton_psw 536 lpswe 0(%r15) # turn dat on, keep irqs off 537.Ldaton: 538 GET_LC %r15 539 lg %r15,__LC_RESTART_STACK(%r15) 540 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15) 541 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 542 GET_LC %r13 543 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART(%r13) 544 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW(%r13) 545 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) 546 lg %r1,__LC_RESTART_FN(%r13) # load fn, parm & source cpu 547 lg %r2,__LC_RESTART_DATA(%r13) 548 lgf %r3,__LC_RESTART_SOURCE(%r13) 549 ltgr %r3,%r3 # test source cpu address 550 jm 1f # negative -> skip source stop 5510: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu 552 brc 10,0b # wait for status stored 5531: basr %r14,%r1 # call function 554 stap __SF_EMPTY(%r15) # store cpu address 555 llgh %r3,__SF_EMPTY(%r15) 5562: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu 557 brc 2,2b 5583: j 3b 559SYM_CODE_END(restart_int_handler) 560 561 __INIT 562SYM_CODE_START(early_pgm_check_handler) 563 STMG_LC %r8,%r15,__LC_SAVE_AREA 564 GET_LC %r13 565 aghi %r15,-(STACK_FRAME_OVERHEAD+__PT_SIZE) 566 la %r11,STACK_FRAME_OVERHEAD(%r15) 567 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 568 stmg %r0,%r7,__PT_R0(%r11) 569 mvc __PT_PSW(16,%r11),__LC_PGM_OLD_PSW(%r13) 570 mvc __PT_R8(64,%r11),__LC_SAVE_AREA(%r13) 571 lgr %r2,%r11 572 brasl %r14,__do_early_pgm_check 573 mvc __LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15) 574 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15) 575 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE 576SYM_CODE_END(early_pgm_check_handler) 577 __FINIT 578 579 .section .kprobes.text, "ax" 580 581/* 582 * The synchronous or the asynchronous stack pointer is invalid. We are dead. 583 * No need to properly save the registers, we are going to panic anyway. 584 * Setup a pt_regs so that show_trace can provide a good call trace. 585 */ 586SYM_CODE_START(stack_invalid) 587 GET_LC %r15 588 lg %r15,__LC_NODAT_STACK(%r15) # change to panic stack 589 la %r11,STACK_FRAME_OVERHEAD(%r15) 590 stmg %r0,%r7,__PT_R0(%r11) 591 stmg %r8,%r9,__PT_PSW(%r11) 592 mvc __PT_R8(64,%r11),0(%r14) 593 GET_LC %r2 594 mvc __PT_ORIG_GPR2(8,%r11),__LC_PGM_LAST_BREAK(%r2) 595 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) 596 lgr %r2,%r11 # pass pointer to pt_regs 597 jg kernel_stack_invalid 598SYM_CODE_END(stack_invalid) 599 600 .section .data, "aw" 601 .balign 4 602SYM_DATA_LOCAL(stop_lock, .long 0) 603SYM_DATA_LOCAL(this_cpu, .short 0) 604 .balign 8 605SYM_DATA_START_LOCAL(daton_psw) 606 .quad PSW_KERNEL_BITS 607 .quad .Ldaton 608SYM_DATA_END(daton_psw) 609 610 .section .rodata, "a" 611 .balign 8 612#define SYSCALL(esame,emu) .quad __s390x_ ## esame 613SYM_DATA_START(sys_call_table) 614#include <asm/syscall_table.h> 615SYM_DATA_END(sys_call_table) 616#undef SYSCALL 617 618#ifdef CONFIG_COMPAT 619 620#define SYSCALL(esame,emu) .quad __s390_ ## emu 621SYM_DATA_START(sys_call_table_emu) 622#include <asm/syscall_table.h> 623SYM_DATA_END(sys_call_table_emu) 624#undef SYSCALL 625#endif 626