1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/leds/common.h> 7#include <dt-bindings/soc/rockchip,vop2.h> 8#include "rk3588.dtsi" 9 10/ { 11 model = "ArmSoM Sige7"; 12 compatible = "armsom,sige7", "rockchip,rk3588"; 13 14 aliases { 15 mmc0 = &sdhci; 16 mmc1 = &sdmmc; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 analog-sound { 24 compatible = "audio-graph-card"; 25 dais = <&i2s0_8ch_p0>; 26 label = "rk3588-es8316"; 27 hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&hp_detect>; 30 routing = "MIC2", "Mic Jack", 31 "Headphones", "HPOL", 32 "Headphones", "HPOR"; 33 widgets = "Microphone", "Mic Jack", 34 "Headphone", "Headphones"; 35 }; 36 37 hdmi0-con { 38 compatible = "hdmi-connector"; 39 type = "a"; 40 41 port { 42 hdmi0_con_in: endpoint { 43 remote-endpoint = <&hdmi0_out_con>; 44 }; 45 }; 46 }; 47 48 leds { 49 compatible = "gpio-leds"; 50 pinctrl-names = "default"; 51 pinctrl-0 = <&led_rgb_g>; 52 53 led_green: led-0 { 54 color = <LED_COLOR_ID_GREEN>; 55 function = LED_FUNCTION_STATUS; 56 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 57 linux,default-trigger = "heartbeat"; 58 }; 59 60 led_red: led-1 { 61 color = <LED_COLOR_ID_RED>; 62 function = LED_FUNCTION_STATUS; 63 gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; 64 linux,default-trigger = "none"; 65 }; 66 }; 67 68 fan: pwm-fan { 69 compatible = "pwm-fan"; 70 cooling-levels = <0 95 145 195 255>; 71 fan-supply = <&vcc5v0_sys>; 72 pwms = <&pwm1 0 50000 0>; 73 #cooling-cells = <2>; 74 }; 75 76 vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 { 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc3v3_pcie2x1l2"; 79 regulator-min-microvolt = <3300000>; 80 regulator-max-microvolt = <3300000>; 81 startup-delay-us = <5000>; 82 vin-supply = <&vcc_3v3_s3>; 83 }; 84 85 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 86 compatible = "regulator-fixed"; 87 enable-active-high; 88 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 89 regulator-name = "vcc3v3_pcie30"; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 startup-delay-us = <5000>; 93 vin-supply = <&vcc5v0_sys>; 94 }; 95 96 vcc5v0_host: regulator-vcc5v0-host { 97 compatible = "regulator-fixed"; 98 regulator-name = "vcc5v0_host"; 99 regulator-boot-on; 100 regulator-always-on; 101 regulator-min-microvolt = <5000000>; 102 regulator-max-microvolt = <5000000>; 103 enable-active-high; 104 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&vcc5v0_host_en>; 107 vin-supply = <&vcc5v0_sys>; 108 }; 109 110 vcc5v0_sys: regulator-vcc5v0-sys { 111 compatible = "regulator-fixed"; 112 regulator-name = "vcc5v0_sys"; 113 regulator-always-on; 114 regulator-boot-on; 115 regulator-min-microvolt = <5000000>; 116 regulator-max-microvolt = <5000000>; 117 }; 118 119 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 120 compatible = "regulator-fixed"; 121 regulator-name = "vcc_1v1_nldo_s3"; 122 regulator-always-on; 123 regulator-boot-on; 124 regulator-min-microvolt = <1100000>; 125 regulator-max-microvolt = <1100000>; 126 vin-supply = <&vcc5v0_sys>; 127 }; 128}; 129 130&combphy0_ps { 131 status = "okay"; 132}; 133 134&combphy1_ps { 135 status = "okay"; 136}; 137 138&combphy2_psu { 139 status = "okay"; 140}; 141 142&cpu_b0 { 143 cpu-supply = <&vdd_cpu_big0_s0>; 144}; 145 146&cpu_b1 { 147 cpu-supply = <&vdd_cpu_big0_s0>; 148}; 149 150&cpu_b2 { 151 cpu-supply = <&vdd_cpu_big1_s0>; 152}; 153 154&cpu_b3 { 155 cpu-supply = <&vdd_cpu_big1_s0>; 156}; 157 158&cpu_l0 { 159 cpu-supply = <&vdd_cpu_lit_s0>; 160}; 161 162&cpu_l1 { 163 cpu-supply = <&vdd_cpu_lit_s0>; 164}; 165 166&cpu_l2 { 167 cpu-supply = <&vdd_cpu_lit_s0>; 168}; 169 170&cpu_l3 { 171 cpu-supply = <&vdd_cpu_lit_s0>; 172}; 173 174&gpu { 175 mali-supply = <&vdd_gpu_s0>; 176 status = "okay"; 177}; 178 179&hdmi0 { 180 status = "okay"; 181}; 182 183&hdmi0_in { 184 hdmi0_in_vp0: endpoint { 185 remote-endpoint = <&vp0_out_hdmi0>; 186 }; 187}; 188 189&hdmi0_out { 190 hdmi0_out_con: endpoint { 191 remote-endpoint = <&hdmi0_con_in>; 192 }; 193}; 194 195&hdmi0_sound { 196 status = "okay"; 197}; 198 199&hdptxphy0 { 200 status = "okay"; 201}; 202 203&i2c0 { 204 pinctrl-names = "default"; 205 pinctrl-0 = <&i2c0m2_xfer>; 206 status = "okay"; 207 208 vdd_cpu_big0_s0: regulator@42 { 209 compatible = "rockchip,rk8602"; 210 reg = <0x42>; 211 fcs,suspend-voltage-selector = <1>; 212 regulator-name = "vdd_cpu_big0_s0"; 213 regulator-always-on; 214 regulator-boot-on; 215 regulator-min-microvolt = <550000>; 216 regulator-max-microvolt = <1050000>; 217 regulator-ramp-delay = <2300>; 218 vin-supply = <&vcc5v0_sys>; 219 220 regulator-state-mem { 221 regulator-off-in-suspend; 222 }; 223 }; 224 225 vdd_cpu_big1_s0: regulator@43 { 226 compatible = "rockchip,rk8603", "rockchip,rk8602"; 227 reg = <0x43>; 228 fcs,suspend-voltage-selector = <1>; 229 regulator-name = "vdd_cpu_big1_s0"; 230 regulator-always-on; 231 regulator-boot-on; 232 regulator-min-microvolt = <550000>; 233 regulator-max-microvolt = <1050000>; 234 regulator-ramp-delay = <2300>; 235 vin-supply = <&vcc5v0_sys>; 236 237 regulator-state-mem { 238 regulator-off-in-suspend; 239 }; 240 }; 241}; 242 243&i2c6 { 244 status = "okay"; 245 246 hym8563: rtc@51 { 247 compatible = "haoyu,hym8563"; 248 reg = <0x51>; 249 interrupt-parent = <&gpio0>; 250 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 251 #clock-cells = <0>; 252 clock-output-names = "hym8563"; 253 pinctrl-names = "default"; 254 pinctrl-0 = <&hym8563_int>; 255 wakeup-source; 256 }; 257}; 258 259&i2c7 { 260 status = "okay"; 261 262 es8316: audio-codec@11 { 263 compatible = "everest,es8316"; 264 reg = <0x11>; 265 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 266 assigned-clock-rates = <12288000>; 267 clocks = <&cru I2S0_8CH_MCLKOUT>; 268 clock-names = "mclk"; 269 #sound-dai-cells = <0>; 270 271 port { 272 es8316_p0_0: endpoint { 273 remote-endpoint = <&i2s0_8ch_p0_0>; 274 }; 275 }; 276 }; 277}; 278 279&i2s0_8ch { 280 pinctrl-names = "default"; 281 pinctrl-0 = <&i2s0_lrck 282 &i2s0_mclk 283 &i2s0_sclk 284 &i2s0_sdi0 285 &i2s0_sdo0>; 286 status = "okay"; 287 288 i2s0_8ch_p0: port { 289 i2s0_8ch_p0_0: endpoint { 290 dai-format = "i2s"; 291 mclk-fs = <256>; 292 remote-endpoint = <&es8316_p0_0>; 293 }; 294 }; 295}; 296 297&i2s5_8ch { 298 status = "okay"; 299}; 300 301/* phy1 - right ethernet port */ 302&pcie2x1l0 { 303 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 304 status = "okay"; 305}; 306 307/* phy2 - WiFi */ 308&pcie2x1l1 { 309 reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; 310 status = "okay"; 311 312 pcie@0,0 { 313 reg = <0x300000 0 0 0 0>; 314 #address-cells = <3>; 315 #size-cells = <2>; 316 ranges; 317 device_type = "pci"; 318 bus-range = <0x30 0x3f>; 319 320 wifi: wifi@0,0 { 321 compatible = "pci14e4,449d"; 322 reg = <0x310000 0 0 0 0>; 323 clocks = <&hym8563>; 324 clock-names = "lpo"; 325 }; 326 }; 327}; 328 329/* phy0 - left ethernet port */ 330&pcie2x1l2 { 331 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 332 status = "okay"; 333}; 334 335&pcie30phy { 336 status = "okay"; 337}; 338 339&pcie3x4 { 340 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 341 vpcie3v3-supply = <&vcc3v3_pcie30>; 342 status = "okay"; 343}; 344 345&pd_gpu { 346 domain-supply = <&vdd_gpu_s0>; 347}; 348 349&pinctrl { 350 hym8563 { 351 hym8563_int: hym8563-int { 352 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 353 }; 354 }; 355 356 leds { 357 led_rgb_g: led-rgb-g { 358 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 359 }; 360 led_rgb_r: led-rgb-r { 361 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 362 }; 363 }; 364 365 sound { 366 hp_detect: hp-detect { 367 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 368 }; 369 }; 370 371 usb { 372 vcc5v0_host_en: vcc5v0-host-en { 373 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 374 }; 375 }; 376 377 wireless-bluetooth { 378 bt_reset_pin: bt-reset-pin { 379 rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 380 }; 381 382 bt_wake_pin: bt-wake-pin { 383 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; 384 }; 385 386 bt_wake_host_irq: bt-wake-host-irq { 387 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; 388 }; 389 }; 390}; 391 392&pwm1 { 393 status = "okay"; 394}; 395 396&saradc { 397 vref-supply = <&avcc_1v8_s0>; 398 status = "okay"; 399}; 400 401&sdhci { 402 bus-width = <8>; 403 no-sdio; 404 no-sd; 405 non-removable; 406 mmc-hs200-1_8v; 407 status = "okay"; 408}; 409 410&sdmmc { 411 bus-width = <4>; 412 cap-mmc-highspeed; 413 cap-sd-highspeed; 414 disable-wp; 415 max-frequency = <200000000>; 416 no-sdio; 417 no-mmc; 418 sd-uhs-sdr104; 419 vmmc-supply = <&vcc_3v3_s3>; 420 vqmmc-supply = <&vccio_sd_s0>; 421 status = "okay"; 422}; 423 424&spi2 { 425 assigned-clocks = <&cru CLK_SPI2>; 426 assigned-clock-rates = <200000000>; 427 num-cs = <1>; 428 pinctrl-names = "default"; 429 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 430 status = "okay"; 431 432 pmic@0 { 433 compatible = "rockchip,rk806"; 434 spi-max-frequency = <1000000>; 435 reg = <0x0>; 436 437 interrupt-parent = <&gpio0>; 438 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 439 440 gpio-controller; 441 #gpio-cells = <2>; 442 443 pinctrl-names = "default"; 444 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 445 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 446 447 system-power-controller; 448 449 vcc1-supply = <&vcc5v0_sys>; 450 vcc2-supply = <&vcc5v0_sys>; 451 vcc3-supply = <&vcc5v0_sys>; 452 vcc4-supply = <&vcc5v0_sys>; 453 vcc5-supply = <&vcc5v0_sys>; 454 vcc6-supply = <&vcc5v0_sys>; 455 vcc7-supply = <&vcc5v0_sys>; 456 vcc8-supply = <&vcc5v0_sys>; 457 vcc9-supply = <&vcc5v0_sys>; 458 vcc10-supply = <&vcc5v0_sys>; 459 vcc11-supply = <&vcc_2v0_pldo_s3>; 460 vcc12-supply = <&vcc5v0_sys>; 461 vcc13-supply = <&vcc_1v1_nldo_s3>; 462 vcc14-supply = <&vcc_1v1_nldo_s3>; 463 vcca-supply = <&vcc5v0_sys>; 464 465 rk806_dvs1_null: dvs1-null-pins { 466 pins = "gpio_pwrctrl1"; 467 function = "pin_fun0"; 468 }; 469 470 rk806_dvs2_null: dvs2-null-pins { 471 pins = "gpio_pwrctrl2"; 472 function = "pin_fun0"; 473 }; 474 475 rk806_dvs3_null: dvs3-null-pins { 476 pins = "gpio_pwrctrl3"; 477 function = "pin_fun0"; 478 }; 479 480 regulators { 481 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 482 regulator-always-on; 483 regulator-boot-on; 484 regulator-min-microvolt = <550000>; 485 regulator-max-microvolt = <950000>; 486 regulator-ramp-delay = <12500>; 487 regulator-name = "vdd_gpu_s0"; 488 regulator-enable-ramp-delay = <400>; 489 490 regulator-state-mem { 491 regulator-off-in-suspend; 492 }; 493 }; 494 495 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 496 regulator-always-on; 497 regulator-boot-on; 498 regulator-min-microvolt = <550000>; 499 regulator-max-microvolt = <950000>; 500 regulator-ramp-delay = <12500>; 501 regulator-name = "vdd_cpu_lit_s0"; 502 503 regulator-state-mem { 504 regulator-off-in-suspend; 505 }; 506 }; 507 508 vdd_log_s0: dcdc-reg3 { 509 regulator-always-on; 510 regulator-boot-on; 511 regulator-min-microvolt = <675000>; 512 regulator-max-microvolt = <750000>; 513 regulator-ramp-delay = <12500>; 514 regulator-name = "vdd_log_s0"; 515 516 regulator-state-mem { 517 regulator-off-in-suspend; 518 regulator-suspend-microvolt = <750000>; 519 }; 520 }; 521 522 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 523 regulator-always-on; 524 regulator-boot-on; 525 regulator-min-microvolt = <550000>; 526 regulator-max-microvolt = <950000>; 527 regulator-ramp-delay = <12500>; 528 regulator-name = "vdd_vdenc_s0"; 529 530 regulator-state-mem { 531 regulator-off-in-suspend; 532 }; 533 }; 534 535 vdd_ddr_s0: dcdc-reg5 { 536 regulator-always-on; 537 regulator-boot-on; 538 regulator-min-microvolt = <675000>; 539 regulator-max-microvolt = <900000>; 540 regulator-ramp-delay = <12500>; 541 regulator-name = "vdd_ddr_s0"; 542 543 regulator-state-mem { 544 regulator-off-in-suspend; 545 regulator-suspend-microvolt = <850000>; 546 }; 547 }; 548 549 vdd2_ddr_s3: dcdc-reg6 { 550 regulator-always-on; 551 regulator-boot-on; 552 regulator-name = "vdd2_ddr_s3"; 553 554 regulator-state-mem { 555 regulator-on-in-suspend; 556 }; 557 }; 558 559 vcc_2v0_pldo_s3: dcdc-reg7 { 560 regulator-always-on; 561 regulator-boot-on; 562 regulator-min-microvolt = <2000000>; 563 regulator-max-microvolt = <2000000>; 564 regulator-ramp-delay = <12500>; 565 regulator-name = "vdd_2v0_pldo_s3"; 566 567 regulator-state-mem { 568 regulator-on-in-suspend; 569 regulator-suspend-microvolt = <2000000>; 570 }; 571 }; 572 573 vcc_3v3_s3: dcdc-reg8 { 574 regulator-always-on; 575 regulator-boot-on; 576 regulator-min-microvolt = <3300000>; 577 regulator-max-microvolt = <3300000>; 578 regulator-name = "vcc_3v3_s3"; 579 580 regulator-state-mem { 581 regulator-on-in-suspend; 582 regulator-suspend-microvolt = <3300000>; 583 }; 584 }; 585 586 vddq_ddr_s0: dcdc-reg9 { 587 regulator-always-on; 588 regulator-boot-on; 589 regulator-name = "vddq_ddr_s0"; 590 591 regulator-state-mem { 592 regulator-off-in-suspend; 593 }; 594 }; 595 596 vcc_1v8_s3: dcdc-reg10 { 597 regulator-always-on; 598 regulator-boot-on; 599 regulator-min-microvolt = <1800000>; 600 regulator-max-microvolt = <1800000>; 601 regulator-name = "vcc_1v8_s3"; 602 603 regulator-state-mem { 604 regulator-on-in-suspend; 605 regulator-suspend-microvolt = <1800000>; 606 }; 607 }; 608 609 avcc_1v8_s0: pldo-reg1 { 610 regulator-always-on; 611 regulator-boot-on; 612 regulator-min-microvolt = <1800000>; 613 regulator-max-microvolt = <1800000>; 614 regulator-name = "avcc_1v8_s0"; 615 616 regulator-state-mem { 617 regulator-off-in-suspend; 618 }; 619 }; 620 621 vcc_1v8_s0: pldo-reg2 { 622 regulator-always-on; 623 regulator-boot-on; 624 regulator-min-microvolt = <1800000>; 625 regulator-max-microvolt = <1800000>; 626 regulator-name = "vcc_1v8_s0"; 627 628 regulator-state-mem { 629 regulator-off-in-suspend; 630 regulator-suspend-microvolt = <1800000>; 631 }; 632 }; 633 634 avdd_1v2_s0: pldo-reg3 { 635 regulator-always-on; 636 regulator-boot-on; 637 regulator-min-microvolt = <1200000>; 638 regulator-max-microvolt = <1200000>; 639 regulator-name = "avdd_1v2_s0"; 640 641 regulator-state-mem { 642 regulator-off-in-suspend; 643 }; 644 }; 645 646 vcc_3v3_s0: pldo-reg4 { 647 regulator-always-on; 648 regulator-boot-on; 649 regulator-min-microvolt = <3300000>; 650 regulator-max-microvolt = <3300000>; 651 regulator-ramp-delay = <12500>; 652 regulator-name = "vcc_3v3_s0"; 653 654 regulator-state-mem { 655 regulator-off-in-suspend; 656 }; 657 }; 658 659 vccio_sd_s0: pldo-reg5 { 660 regulator-always-on; 661 regulator-boot-on; 662 regulator-min-microvolt = <1800000>; 663 regulator-max-microvolt = <3300000>; 664 regulator-ramp-delay = <12500>; 665 regulator-name = "vccio_sd_s0"; 666 667 regulator-state-mem { 668 regulator-off-in-suspend; 669 }; 670 }; 671 672 pldo6_s3: pldo-reg6 { 673 regulator-always-on; 674 regulator-boot-on; 675 regulator-min-microvolt = <1800000>; 676 regulator-max-microvolt = <1800000>; 677 regulator-name = "pldo6_s3"; 678 679 regulator-state-mem { 680 regulator-on-in-suspend; 681 regulator-suspend-microvolt = <1800000>; 682 }; 683 }; 684 685 vdd_0v75_s3: nldo-reg1 { 686 regulator-always-on; 687 regulator-boot-on; 688 regulator-min-microvolt = <750000>; 689 regulator-max-microvolt = <750000>; 690 regulator-name = "vdd_0v75_s3"; 691 692 regulator-state-mem { 693 regulator-on-in-suspend; 694 regulator-suspend-microvolt = <750000>; 695 }; 696 }; 697 698 vdd_ddr_pll_s0: nldo-reg2 { 699 regulator-always-on; 700 regulator-boot-on; 701 regulator-min-microvolt = <850000>; 702 regulator-max-microvolt = <850000>; 703 regulator-name = "vdd_ddr_pll_s0"; 704 705 regulator-state-mem { 706 regulator-off-in-suspend; 707 regulator-suspend-microvolt = <850000>; 708 }; 709 }; 710 711 avdd_0v75_s0: nldo-reg3 { 712 regulator-always-on; 713 regulator-boot-on; 714 regulator-min-microvolt = <750000>; 715 regulator-max-microvolt = <750000>; 716 regulator-name = "avdd_0v75_s0"; 717 718 regulator-state-mem { 719 regulator-off-in-suspend; 720 }; 721 }; 722 723 vdd_0v85_s0: nldo-reg4 { 724 regulator-always-on; 725 regulator-boot-on; 726 regulator-min-microvolt = <850000>; 727 regulator-max-microvolt = <850000>; 728 regulator-name = "vdd_0v85_s0"; 729 730 regulator-state-mem { 731 regulator-off-in-suspend; 732 }; 733 }; 734 735 vdd_0v75_s0: nldo-reg5 { 736 regulator-always-on; 737 regulator-boot-on; 738 regulator-min-microvolt = <750000>; 739 regulator-max-microvolt = <750000>; 740 regulator-name = "vdd_0v75_s0"; 741 742 regulator-state-mem { 743 regulator-off-in-suspend; 744 }; 745 }; 746 }; 747 }; 748}; 749 750&tsadc { 751 status = "okay"; 752}; 753 754&u2phy0 { 755 status = "okay"; 756}; 757 758&u2phy0_otg { 759 status = "okay"; 760}; 761 762&u2phy1 { 763 status = "okay"; 764}; 765 766&u2phy1_otg { 767 status = "okay"; 768}; 769 770&u2phy3 { 771 status = "okay"; 772}; 773 774&u2phy3_host { 775 phy-supply = <&vcc5v0_host>; 776 status = "okay"; 777}; 778 779&uart2 { 780 pinctrl-0 = <&uart2m0_xfer>; 781 status = "okay"; 782}; 783 784&uart6 { 785 pinctrl-names = "default"; 786 pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; 787 status = "okay"; 788 789 bluetooth { 790 compatible = "brcm,bcm43438-bt"; 791 clocks = <&hym8563>; 792 clock-names = "lpo"; 793 interrupt-parent = <&gpio0>; 794 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_HIGH>; 795 interrupt-names = "host-wakeup"; 796 device-wakeup-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; 797 shutdown-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; 798 max-speed = <1500000>; 799 pinctrl-names = "default"; 800 pinctrl-0 = <&bt_wake_host_irq &bt_wake_pin &bt_reset_pin>; 801 vbat-supply = <&vcc_3v3_s3>; 802 vddio-supply = <&vcc_1v8_s3>; 803 }; 804}; 805 806&usbdp_phy1 { 807 status = "okay"; 808}; 809 810&usb_host1_ehci { 811 status = "okay"; 812}; 813 814&usb_host1_ohci { 815 status = "okay"; 816}; 817 818&usb_host1_xhci { 819 dr_mode = "host"; 820 status = "okay"; 821}; 822 823&vop_mmu { 824 status = "okay"; 825}; 826 827&vop { 828 status = "okay"; 829}; 830 831&vp0 { 832 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 833 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 834 remote-endpoint = <&hdmi0_in_vp0>; 835 }; 836}; 837