1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Martijn Braam <martijn@brixit.nl> 4 * Copyright (c) 2021 Kamil Trzciński <ayufan@ayufan.eu> 5 */ 6 7/* 8 * PinePhone Pro datasheet: 9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf 10 */ 11 12/dts-v1/; 13#include <dt-bindings/input/gpio-keys.h> 14#include <dt-bindings/input/linux-event-codes.h> 15#include <dt-bindings/leds/common.h> 16#include "rk3399-s.dtsi" 17 18/ { 19 model = "Pine64 PinePhone Pro"; 20 compatible = "pine64,pinephone-pro", "rockchip,rk3399"; 21 chassis-type = "handset"; 22 23 aliases { 24 mmc0 = &sdio0; 25 mmc1 = &sdmmc; 26 mmc2 = &sdhci; 27 }; 28 29 chosen { 30 stdout-path = "serial2:115200n8"; 31 }; 32 33 adc-keys { 34 compatible = "adc-keys"; 35 io-channels = <&saradc 1>; 36 io-channel-names = "buttons"; 37 keyup-threshold-microvolt = <1600000>; 38 poll-interval = <100>; 39 40 button-up { 41 label = "Volume Up"; 42 linux,code = <KEY_VOLUMEUP>; 43 press-threshold-microvolt = <100000>; 44 }; 45 46 button-down { 47 label = "Volume Down"; 48 linux,code = <KEY_VOLUMEDOWN>; 49 press-threshold-microvolt = <600000>; 50 }; 51 }; 52 53 backlight: backlight { 54 compatible = "pwm-backlight"; 55 pwms = <&pwm0 0 50000 0>; 56 }; 57 58 gpio-keys { 59 compatible = "gpio-keys"; 60 pinctrl-names = "default"; 61 pinctrl-0 = <&pwrbtn_pin>; 62 63 key-power { 64 debounce-interval = <20>; 65 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 66 label = "Power"; 67 linux,code = <KEY_POWER>; 68 wakeup-source; 69 }; 70 }; 71 72 leds { 73 compatible = "gpio-leds"; 74 pinctrl-names = "default"; 75 pinctrl-0 = <&red_led_pin &green_led_pin &blue_led_pin>; 76 77 led_red: led-0 { 78 color = <LED_COLOR_ID_RED>; 79 gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; 80 }; 81 82 led_green: led-1 { 83 color = <LED_COLOR_ID_GREEN>; 84 gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; 85 }; 86 87 led_blue: led-2 { 88 color = <LED_COLOR_ID_BLUE>; 89 gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 90 }; 91 }; 92 93 multi-led { 94 compatible = "leds-group-multicolor"; 95 color = <LED_COLOR_ID_RGB>; 96 function = LED_FUNCTION_INDICATOR; 97 leds = <&led_red>, <&led_green>, <&led_blue>; 98 }; 99 100 vcc_sys: regulator-vcc-sys { 101 compatible = "regulator-fixed"; 102 regulator-name = "vcc_sys"; 103 regulator-always-on; 104 regulator-boot-on; 105 }; 106 107 avdd2v8_dvp: regulator-avdd2v8-dvp { 108 compatible = "regulator-fixed"; 109 regulator-name = "avdd2v8_dvp"; 110 regulator-always-on; 111 regulator-boot-on; 112 regulator-min-microvolt = <2800000>; 113 regulator-max-microvolt = <2800000>; 114 vin-supply = <&vcc3v3_sys>; 115 }; 116 117 vcc3v3_sys: regulator-vcc3v3-sys { 118 compatible = "regulator-fixed"; 119 regulator-name = "vcc3v3_sys"; 120 regulator-always-on; 121 regulator-boot-on; 122 regulator-min-microvolt = <3300000>; 123 regulator-max-microvolt = <3300000>; 124 vin-supply = <&vcc_sys>; 125 }; 126 127 vcca1v8_s3: regulator-vcc1v8-s3 { 128 compatible = "regulator-fixed"; 129 regulator-name = "vcca1v8_s3"; 130 regulator-min-microvolt = <1800000>; 131 regulator-max-microvolt = <1800000>; 132 vin-supply = <&vcc3v3_sys>; 133 regulator-always-on; 134 regulator-boot-on; 135 }; 136 137 vcc1v8_codec: regulator-vcc1v8-codec { 138 compatible = "regulator-fixed"; 139 enable-active-high; 140 gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&vcc1v8_codec_en>; 143 regulator-name = "vcc1v8_codec"; 144 regulator-min-microvolt = <1800000>; 145 regulator-max-microvolt = <1800000>; 146 vin-supply = <&vcc3v3_sys>; 147 }; 148 149 vcc1v2_dvp: regulator-vcc1v2-dvp { 150 compatible = "regulator-fixed"; 151 regulator-name = "vcc1v2_dvp"; 152 regulator-always-on; 153 regulator-boot-on; 154 regulator-min-microvolt = <1200000>; 155 regulator-max-microvolt = <1200000>; 156 vin-supply = <&vcca1v8_s3>; 157 }; 158 159 wifi_pwrseq: sdio-wifi-pwrseq { 160 compatible = "mmc-pwrseq-simple"; 161 clocks = <&rk818 1>; 162 clock-names = "ext_clock"; 163 pinctrl-names = "default"; 164 pinctrl-0 = <&wifi_enable_h_pin>; 165 /* 166 * Wait between power-on and SDIO access for CYP43455 167 * POR circuit. 168 */ 169 post-power-on-delay-ms = <110>; 170 /* 171 * Wait between consecutive toggles for CYP43455 CBUCK 172 * regulator discharge. 173 */ 174 power-off-delay-us = <10000>; 175 176 /* WL_REG_ON on module */ 177 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 178 }; 179 180 /* MIPI DSI panel 1.8v supply */ 181 vcc1v8_lcd: regulator-vcc1v8-lcd { 182 compatible = "regulator-fixed"; 183 enable-active-high; 184 regulator-name = "vcc1v8_lcd"; 185 regulator-min-microvolt = <1800000>; 186 regulator-max-microvolt = <1800000>; 187 vin-supply = <&vcc3v3_sys>; 188 gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; 189 }; 190 191 /* MIPI DSI panel 2.8v supply */ 192 vcc2v8_lcd: regulator-vcc2v8-lcd { 193 compatible = "regulator-fixed"; 194 enable-active-high; 195 regulator-name = "vcc2v8_lcd"; 196 regulator-min-microvolt = <2800000>; 197 regulator-max-microvolt = <2800000>; 198 vin-supply = <&vcc3v3_sys>; 199 gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; 200 }; 201 202 vibrator { 203 compatible = "gpio-vibrator"; 204 enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 205 vcc-supply = <&vcc3v3_sys>; 206 }; 207}; 208 209&cpu_alert0 { 210 temperature = <65000>; 211}; 212&cpu_alert1 { 213 temperature = <68000>; 214}; 215 216&cpu_l0 { 217 cpu-supply = <&vdd_cpu_l>; 218}; 219 220&cpu_l1 { 221 cpu-supply = <&vdd_cpu_l>; 222}; 223 224&cpu_l2 { 225 cpu-supply = <&vdd_cpu_l>; 226}; 227 228&cpu_l3 { 229 cpu-supply = <&vdd_cpu_l>; 230}; 231 232&cpu_b0 { 233 cpu-supply = <&vdd_cpu_b>; 234}; 235 236&cpu_b1 { 237 cpu-supply = <&vdd_cpu_b>; 238}; 239 240&emmc_phy { 241 status = "okay"; 242}; 243 244&gpu { 245 mali-supply = <&vdd_gpu>; 246 status = "okay"; 247}; 248 249&i2c0 { 250 clock-frequency = <400000>; 251 i2c-scl-rising-time-ns = <168>; 252 i2c-scl-falling-time-ns = <4>; 253 status = "okay"; 254 255 rk818: pmic@1c { 256 compatible = "rockchip,rk818"; 257 reg = <0x1c>; 258 interrupt-parent = <&gpio1>; 259 interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>; 260 #clock-cells = <1>; 261 clock-output-names = "xin32k", "rk808-clkout2"; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&pmic_int_l>; 264 system-power-controller; 265 wakeup-source; 266 267 vcc1-supply = <&vcc_sys>; 268 vcc2-supply = <&vcc_sys>; 269 vcc3-supply = <&vcc_sys>; 270 vcc4-supply = <&vcc_sys>; 271 vcc6-supply = <&vcc_sys>; 272 vcc7-supply = <&vcc3v3_sys>; 273 vcc8-supply = <&vcc_sys>; 274 vcc9-supply = <&vcc3v3_sys>; 275 276 regulators { 277 vdd_cpu_l: DCDC_REG1 { 278 regulator-name = "vdd_cpu_l"; 279 regulator-always-on; 280 regulator-boot-on; 281 regulator-min-microvolt = <875000>; 282 regulator-max-microvolt = <975000>; 283 regulator-ramp-delay = <6001>; 284 regulator-state-mem { 285 regulator-off-in-suspend; 286 }; 287 }; 288 289 vdd_center: DCDC_REG2 { 290 regulator-name = "vdd_center"; 291 regulator-always-on; 292 regulator-boot-on; 293 regulator-min-microvolt = <800000>; 294 regulator-max-microvolt = <1000000>; 295 regulator-ramp-delay = <6001>; 296 regulator-state-mem { 297 regulator-off-in-suspend; 298 }; 299 }; 300 301 vcc_ddr: DCDC_REG3 { 302 regulator-name = "vcc_ddr"; 303 regulator-always-on; 304 regulator-boot-on; 305 regulator-state-mem { 306 regulator-on-in-suspend; 307 }; 308 }; 309 310 vcc_1v8: DCDC_REG4 { 311 regulator-name = "vcc_1v8"; 312 regulator-always-on; 313 regulator-boot-on; 314 regulator-min-microvolt = <1800000>; 315 regulator-max-microvolt = <1800000>; 316 regulator-state-mem { 317 regulator-on-in-suspend; 318 }; 319 }; 320 321 vcca3v0_codec: LDO_REG1 { 322 regulator-name = "vcca3v0_codec"; 323 regulator-min-microvolt = <3000000>; 324 regulator-max-microvolt = <3000000>; 325 }; 326 327 vcc3v0_touch: LDO_REG2 { 328 regulator-name = "vcc3v0_touch"; 329 regulator-min-microvolt = <3000000>; 330 regulator-max-microvolt = <3000000>; 331 }; 332 333 vcca1v8_codec: LDO_REG3 { 334 regulator-name = "vcca1v8_codec"; 335 regulator-always-on; 336 regulator-boot-on; 337 regulator-min-microvolt = <1800000>; 338 regulator-max-microvolt = <1800000>; 339 }; 340 341 rk818_pwr_on: LDO_REG4 { 342 regulator-name = "rk818_pwr_on"; 343 regulator-always-on; 344 regulator-boot-on; 345 regulator-min-microvolt = <3300000>; 346 regulator-max-microvolt = <3300000>; 347 regulator-state-mem { 348 regulator-on-in-suspend; 349 }; 350 }; 351 352 vcc_3v0: LDO_REG5 { 353 regulator-name = "vcc_3v0"; 354 regulator-always-on; 355 regulator-boot-on; 356 regulator-min-microvolt = <3000000>; 357 regulator-max-microvolt = <3000000>; 358 regulator-state-mem { 359 regulator-on-in-suspend; 360 }; 361 }; 362 363 vcc_1v5: LDO_REG6 { 364 regulator-name = "vcc_1v5"; 365 regulator-always-on; 366 regulator-boot-on; 367 regulator-min-microvolt = <1500000>; 368 regulator-max-microvolt = <1500000>; 369 regulator-state-mem { 370 regulator-on-in-suspend; 371 }; 372 }; 373 374 vcc1v8_dvp: LDO_REG7 { 375 regulator-name = "vcc1v8_dvp"; 376 regulator-min-microvolt = <1800000>; 377 regulator-max-microvolt = <1800000>; 378 }; 379 380 vcc3v3_s3: LDO_REG8 { 381 regulator-name = "vcc3v3_s3"; 382 regulator-always-on; 383 regulator-boot-on; 384 regulator-min-microvolt = <3300000>; 385 regulator-max-microvolt = <3300000>; 386 regulator-state-mem { 387 regulator-off-in-suspend; 388 }; 389 }; 390 391 vccio_sd: LDO_REG9 { 392 regulator-name = "vccio_sd"; 393 regulator-min-microvolt = <1800000>; 394 regulator-max-microvolt = <3300000>; 395 }; 396 397 vcc3v3_s0: SWITCH_REG { 398 regulator-name = "vcc3v3_s0"; 399 regulator-always-on; 400 regulator-boot-on; 401 regulator-state-mem { 402 regulator-on-in-suspend; 403 }; 404 }; 405 }; 406 }; 407 408 vdd_cpu_b: regulator@40 { 409 compatible = "silergy,syr827"; 410 reg = <0x40>; 411 fcs,suspend-voltage-selector = <1>; 412 pinctrl-names = "default"; 413 pinctrl-0 = <&vsel1_pin>; 414 regulator-name = "vdd_cpu_b"; 415 regulator-min-microvolt = <875000>; 416 regulator-max-microvolt = <1150000>; 417 regulator-ramp-delay = <1000>; 418 regulator-always-on; 419 regulator-boot-on; 420 421 regulator-state-mem { 422 regulator-off-in-suspend; 423 }; 424 }; 425 426 vdd_gpu: regulator@41 { 427 compatible = "silergy,syr828"; 428 reg = <0x41>; 429 fcs,suspend-voltage-selector = <1>; 430 pinctrl-names = "default"; 431 pinctrl-0 = <&vsel2_pin>; 432 regulator-name = "vdd_gpu"; 433 regulator-min-microvolt = <875000>; 434 regulator-max-microvolt = <975000>; 435 regulator-ramp-delay = <1000>; 436 regulator-always-on; 437 regulator-boot-on; 438 439 regulator-state-mem { 440 regulator-off-in-suspend; 441 }; 442 }; 443}; 444 445&i2c1 { 446 assigned-clocks = <&cru SCLK_CIF_OUT>; 447 assigned-clock-rates = <24000000>; 448 clock-frequency = <400000>; 449 pinctrl-names = "default"; 450 pinctrl-0 = <&i2c1_xfer &cif_clkouta>; 451 status = "okay"; 452 453 wcam: camera@1a { 454 compatible = "sony,imx258"; 455 reg = <0x1a>; 456 clocks = <&cru SCLK_CIF_OUT>; /* MIPI_MCLK0, derived from CIF_CLKO */ 457 lens-focus = <&wcam_lens>; 458 orientation = <1>; /* V4L2_CAMERA_ORIENTATION_BACK */ 459 pinctrl-names = "default"; 460 pinctrl-0 = <&camera_rst_l>; 461 reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>; 462 rotation = <270>; 463 /* Note: both cameras also depend on vcca1v8_codec to power the I2C bus. */ 464 vif-supply = <&vcc1v8_dvp>; 465 vana-supply = <&avdd2v8_dvp>; 466 vdig-supply = <&vcc1v2_dvp>; /* DVDD_DVP is the same as VCC1V2_DVP */ 467 468 port { 469 wcam_out: endpoint { 470 data-lanes = <1 2 3 4>; 471 link-frequencies = /bits/ 64 <636000000>; 472 remote-endpoint = <&mipi_in_wcam>; 473 }; 474 }; 475 }; 476 477 wcam_lens: camera-lens@c { 478 compatible = "dongwoon,dw9714"; 479 reg = <0x0c>; 480 /* Same I2c bus as both cameras, depends on vcca1v8_codec for power. */ 481 vcc-supply = <&vcc1v8_dvp>; 482 }; 483 484 ucam: camera@36 { 485 compatible = "ovti,ov8858"; 486 reg = <0x36>; 487 clocks = <&cru SCLK_CIF_OUT>; /* MIPI_MCLK1, derived from CIF_CLK0 */ 488 clock-names = "xvclk"; 489 dovdd-supply = <&vcc1v8_dvp>; 490 orientation = <0>; /* V4L2_CAMERA_ORIENTATION_FRONT */ 491 pinctrl-names = "default"; 492 pinctrl-0 = <&camera2_rst_l &dvp_pdn0_h>; 493 powerdown-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; 494 reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; 495 rotation = <90>; 496 497 port { 498 ucam_out: endpoint { 499 data-lanes = <1 2 3 4>; 500 remote-endpoint = <&mipi_in_ucam>; 501 }; 502 }; 503 }; 504}; 505 506&i2c3 { 507 i2c-scl-rising-time-ns = <450>; 508 i2c-scl-falling-time-ns = <15>; 509 status = "okay"; 510 511 touchscreen@14 { 512 compatible = "goodix,gt1158"; 513 reg = <0x14>; 514 interrupt-parent = <&gpio3>; 515 interrupts = <RK_PB5 IRQ_TYPE_EDGE_RISING>; 516 irq-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; 517 reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; 518 AVDD28-supply = <&vcc3v0_touch>; 519 VDDIO-supply = <&vcc3v0_touch>; 520 touchscreen-size-x = <720>; 521 touchscreen-size-y = <1440>; 522 }; 523}; 524 525&i2c4 { 526 i2c-scl-rising-time-ns = <600>; 527 i2c-scl-falling-time-ns = <20>; 528 status = "okay"; 529 530 /* Accelerometer/gyroscope */ 531 mpu6500@68 { 532 compatible = "invensense,mpu6500"; 533 reg = <0x68>; 534 interrupt-parent = <&gpio1>; 535 interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>; 536 vddio-supply = <&vcc_1v8>; 537 }; 538}; 539 540&io_domains { 541 bt656-supply = <&vcc1v8_dvp>; 542 audio-supply = <&vcca1v8_codec>; 543 sdmmc-supply = <&vccio_sd>; 544 gpio1830-supply = <&vcc_3v0>; 545 status = "okay"; 546}; 547 548&isp0 { 549 status = "okay"; 550 551 ports { 552 port@0 { 553 mipi_in_ucam: endpoint@0 { 554 reg = <0>; 555 data-lanes = <1 2 3 4>; 556 remote-endpoint = <&ucam_out>; 557 }; 558 }; 559 }; 560}; 561 562&isp0_mmu { 563 status = "okay"; 564}; 565 566&isp1 { 567 status = "okay"; 568 569 ports { 570 port@0 { 571 mipi_in_wcam: endpoint@0 { 572 reg = <0>; 573 data-lanes = <1 2 3 4>; 574 remote-endpoint = <&wcam_out>; 575 }; 576 }; 577 }; 578}; 579 580&mipi_dphy_rx0 { 581 status = "okay"; 582}; 583 584&isp1_mmu { 585 status = "okay"; 586}; 587 588&mipi_dsi { 589 clock-master; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 status = "okay"; 593 594 panel@0 { 595 compatible = "hannstar,hsd060bhw4", "himax,hx8394"; 596 reg = <0>; 597 backlight = <&backlight>; 598 iovcc-supply = <&vcc1v8_lcd>; 599 pinctrl-names = "default"; 600 pinctrl-0 = <&lcd1_rst_pin>; 601 reset-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_LOW>; 602 vcc-supply = <&vcc2v8_lcd>; 603 604 port { 605 mipi_in_panel: endpoint { 606 remote-endpoint = <&mipi_out_panel>; 607 }; 608 }; 609 }; 610}; 611 612&mipi_out { 613 mipi_out_panel: endpoint { 614 remote-endpoint = <&mipi_in_panel>; 615 }; 616}; 617 618&mipi_dsi1 { 619 status = "okay"; 620}; 621 622&pmu_io_domains { 623 pmu1830-supply = <&vcc_1v8>; 624 status = "okay"; 625}; 626 627&pinctrl { 628 buttons { 629 pwrbtn_pin: pwrbtn-pin { 630 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 631 }; 632 }; 633 634 lcd { 635 lcd1_rst_pin: lcd1-rst-pin { 636 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 637 }; 638 }; 639 640 cameras { 641 camera_rst_l: camera-rst-l { 642 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 643 }; 644 camera2_rst_l: camera2-rst-l { 645 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 646 }; 647 dvp_pdn0_h: dvp-pdn0-h { 648 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 649 }; 650 }; 651 652 leds { 653 red_led_pin: red-led-pin { 654 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 655 }; 656 657 green_led_pin: green-led-pin { 658 rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 659 }; 660 661 blue_led_pin: blue-led-pin { 662 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 663 }; 664 }; 665 666 pmic { 667 pmic_int_l: pmic-int-l { 668 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 669 }; 670 671 vsel1_pin: vsel1-pin { 672 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 673 }; 674 675 vsel2_pin: vsel2-pin { 676 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 677 }; 678 }; 679 680 sdio-pwrseq { 681 wifi_enable_h_pin: wifi-enable-h-pin { 682 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 683 }; 684 }; 685 686 sound { 687 vcc1v8_codec_en: vcc1v8-codec-en { 688 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; 689 }; 690 }; 691 692 wireless-bluetooth { 693 bt_wake_pin: bt-wake-pin { 694 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 695 }; 696 697 bt_host_wake_pin: bt-host-wake-pin { 698 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 699 }; 700 701 bt_reset_pin: bt-reset-pin { 702 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 703 }; 704 }; 705}; 706 707&sdio0 { 708 bus-width = <4>; 709 cap-sd-highspeed; 710 cap-sdio-irq; 711 disable-wp; 712 keep-power-in-suspend; 713 mmc-pwrseq = <&wifi_pwrseq>; 714 non-removable; 715 pinctrl-names = "default"; 716 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 717 sd-uhs-sdr104; 718 status = "okay"; 719}; 720 721&pwm0 { 722 status = "okay"; 723}; 724 725&saradc { 726 vref-supply = <&vcca1v8_s3>; 727 status = "okay"; 728}; 729 730&sdmmc { 731 bus-width = <4>; 732 cap-sd-highspeed; 733 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 734 disable-wp; 735 max-frequency = <150000000>; 736 pinctrl-names = "default"; 737 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 738 vmmc-supply = <&vcc3v3_sys>; 739 vqmmc-supply = <&vccio_sd>; 740 status = "okay"; 741}; 742 743&sdhci { 744 bus-width = <8>; 745 mmc-hs200-1_8v; 746 non-removable; 747 status = "okay"; 748}; 749 750&spi1 { 751 status = "okay"; 752 753 flash@0 { 754 compatible = "jedec,spi-nor"; 755 reg = <0>; 756 spi-max-frequency = <10000000>; 757 }; 758}; 759 760&tsadc { 761 rockchip,hw-tshut-mode = <1>; 762 rockchip,hw-tshut-polarity = <1>; 763 status = "okay"; 764}; 765 766&uart0 { 767 pinctrl-names = "default"; 768 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 769 uart-has-rtscts; 770 status = "okay"; 771 772 bluetooth { 773 compatible = "brcm,bcm4345c5"; 774 clocks = <&rk818 1>; 775 clock-names = "lpo"; 776 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 777 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 778 max-speed = <1500000>; 779 pinctrl-names = "default"; 780 pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; 781 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 782 vbat-supply = <&vcc3v3_sys>; 783 vddio-supply = <&vcc_1v8>; 784 }; 785}; 786 787&uart2 { 788 status = "okay"; 789}; 790 791&vopb { 792 status = "okay"; 793 assigned-clocks = <&cru DCLK_VOP0_DIV>, <&cru DCLK_VOP0>, 794 <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; 795 assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; 796 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>; 797}; 798 799&vopb_mmu { 800 status = "okay"; 801}; 802 803&vopl { 804 status = "okay"; 805 assigned-clocks = <&cru DCLK_VOP1_DIV>, <&cru DCLK_VOP1>, 806 <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; 807 assigned-clock-rates = <0>, <0>, <400000000>, <100000000>; 808 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>; 809}; 810 811&vopl_mmu { 812 status = "okay"; 813}; 814