1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 4 * 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 ethernet0 = &cp0_eth0; 12 ethernet1 = &cp0_eth1; 13 ethernet2 = &cp0_eth2; 14 i2c0 = &cp0_i2c0; 15 mmc0 = &ap_sdhci0; 16 rtc0 = &cp0_rtc; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 v_1_8: regulator-1-8 { 24 compatible = "regulator-fixed"; 25 regulator-name = "1v8"; 26 regulator-min-microvolt = <1800000>; 27 regulator-max-microvolt = <1800000>; 28 }; 29 30 /* requires assembly of R9307 */ 31 vhv: regulator-vhv-1-8 { 32 compatible = "regulator-fixed"; 33 regulator-name = "vhv-1v8"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <1800000>; 36 pinctrl-0 = <&cp0_reg_vhv_pins>; 37 pinctrl-names = "default"; 38 gpios = <&cp0_gpio2 9 GPIO_ACTIVE_HIGH>; 39 enable-active-high; 40 }; 41}; 42 43&ap_pinctrl { 44 ap_mmc0_pins: ap-mmc0-pins { 45 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", 46 "mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp12"; 47 marvell,function = "sdio"; 48 /* 49 * mpp12 is emmc reset, function should be sdio (hw_rst), 50 * but pinctrl-mvebu does not support this. 51 * 52 * From pinctrl-mvebu.h: 53 * "The name will be used to switch to this setting in DT description, e.g. 54 * marvell,function = "uart2". subname is only for debugging purposes." 55 */ 56 }; 57}; 58 59&ap_sdhci0 { 60 bus-width = <8>; 61 pinctrl-0 = <&ap_mmc0_pins>; 62 pinctrl-names = "default"; 63 vqmmc-supply = <&v_1_8>; 64 status = "okay"; 65}; 66 67&cp0_ethernet { 68 status = "okay"; 69}; 70 71/* for assembly with phy */ 72&cp0_eth2 { 73 pinctrl-names = "default"; 74 pinctrl-0 = <&cp0_eth2_pins>; 75 phy-mode = "rgmii-id"; 76 phy = <&cp0_eth2_phy>; 77 status = "okay"; 78}; 79 80&cp0_i2c0 { 81 pinctrl-names = "default"; 82 pinctrl-0 = <&cp0_i2c0_pins>; 83 clock-frequency = <100000>; 84 status = "okay"; 85 86 som_eeprom: eeprom@53 { 87 compatible = "atmel,24c02"; 88 reg = <0x53>; 89 pagesize = <8>; 90 }; 91}; 92 93&cp0_mdio { 94 pinctrl-0 = <&cp0_mdio_pins>; 95 status = "okay"; 96 97 /* assembly option */ 98 cp0_eth2_phy: ethernet-phy@0 { 99 reg = <0>; 100 }; 101}; 102 103&cp0_spi1 { 104 status = "okay"; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&cp0_spi1_pins>; 107 /* max speed limited by a mux */ 108 spi-max-frequency = <1800000000>; 109 110 flash@0 { 111 compatible = "jedec,spi-nor"; 112 reg = <0>; 113 /* read command supports max. 50MHz */ 114 spi-max-frequency = <50000000>; 115 }; 116}; 117 118&cp0_syscon0 { 119 cp0_pinctrl: pinctrl { 120 compatible = "marvell,cp115-standalone-pinctrl"; 121 122 cp0_eth2_pins: cp0-ge2-rgmii-pins { 123 marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", 124 "mpp48", "mpp49", "mpp50", "mpp51", 125 "mpp52", "mpp53", "mpp54", "mpp55"; 126 /* docs call it "ge2", but cp110-pinctrl "ge1" */ 127 marvell,function = "ge1"; 128 }; 129 130 cp0_i2c0_pins: cp0-i2c0-pins { 131 marvell,pins = "mpp37", "mpp38"; 132 marvell,function = "i2c0"; 133 }; 134 135 cp0_mdio_pins: cp0-mdio-pins { 136 marvell,pins = "mpp0", "mpp1"; 137 marvell,function = "ge"; 138 }; 139 140 cp0_spi1_pins: cp0-spi1-pins { 141 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; 142 marvell,function = "spi1"; 143 }; 144 145 cp0_reg_vhv_pins: cp0-reg-vhv-pins { 146 marvell,pins = "mpp41"; 147 marvell,function = "gpio"; 148 }; 149 }; 150}; 151 152/* AP default console */ 153&uart0 { 154 pinctrl-0 = <&uart0_pins>; 155 pinctrl-names = "default"; 156 status = "okay"; 157}; 158