1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Common Apple T6000 / T6001 / T6002 "M1 Pro/Max/Ultra" SoC 4 * 5 * Other names: H13J, "Jade Chop", "Jade", "Jade 2C" 6 * 7 * Copyright The Asahi Linux Contributors 8 */ 9 10/ { 11 #address-cells = <2>; 12 #size-cells = <2>; 13 14 aliases { 15 gpu = &gpu; 16 }; 17 18 cpus { 19 #address-cells = <2>; 20 #size-cells = <0>; 21 22 cpu-map { 23 cluster0 { 24 core0 { 25 cpu = <&cpu_e00>; 26 }; 27 core1 { 28 cpu = <&cpu_e01>; 29 }; 30 }; 31 32 cluster1 { 33 core0 { 34 cpu = <&cpu_p00>; 35 }; 36 core1 { 37 cpu = <&cpu_p01>; 38 }; 39 core2 { 40 cpu = <&cpu_p02>; 41 }; 42 core3 { 43 cpu = <&cpu_p03>; 44 }; 45 }; 46 47 cluster2 { 48 core0 { 49 cpu = <&cpu_p10>; 50 }; 51 core1 { 52 cpu = <&cpu_p11>; 53 }; 54 core2 { 55 cpu = <&cpu_p12>; 56 }; 57 core3 { 58 cpu = <&cpu_p13>; 59 }; 60 }; 61 }; 62 63 cpu_e00: cpu@0 { 64 compatible = "apple,icestorm"; 65 device_type = "cpu"; 66 reg = <0x0 0x0>; 67 enable-method = "spin-table"; 68 cpu-release-addr = <0 0>; /* To be filled by loader */ 69 next-level-cache = <&l2_cache_0>; 70 i-cache-size = <0x20000>; 71 d-cache-size = <0x10000>; 72 operating-points-v2 = <&icestorm_opp>; 73 capacity-dmips-mhz = <714>; 74 performance-domains = <&cpufreq_e>; 75 }; 76 77 cpu_e01: cpu@1 { 78 compatible = "apple,icestorm"; 79 device_type = "cpu"; 80 reg = <0x0 0x1>; 81 enable-method = "spin-table"; 82 cpu-release-addr = <0 0>; /* To be filled by loader */ 83 next-level-cache = <&l2_cache_0>; 84 i-cache-size = <0x20000>; 85 d-cache-size = <0x10000>; 86 operating-points-v2 = <&icestorm_opp>; 87 capacity-dmips-mhz = <714>; 88 performance-domains = <&cpufreq_e>; 89 }; 90 91 cpu_p00: cpu@10100 { 92 compatible = "apple,firestorm"; 93 device_type = "cpu"; 94 reg = <0x0 0x10100>; 95 enable-method = "spin-table"; 96 cpu-release-addr = <0 0>; /* To be filled by loader */ 97 next-level-cache = <&l2_cache_1>; 98 i-cache-size = <0x30000>; 99 d-cache-size = <0x20000>; 100 operating-points-v2 = <&firestorm_opp>; 101 capacity-dmips-mhz = <1024>; 102 performance-domains = <&cpufreq_p0>; 103 }; 104 105 cpu_p01: cpu@10101 { 106 compatible = "apple,firestorm"; 107 device_type = "cpu"; 108 reg = <0x0 0x10101>; 109 enable-method = "spin-table"; 110 cpu-release-addr = <0 0>; /* To be filled by loader */ 111 next-level-cache = <&l2_cache_1>; 112 i-cache-size = <0x30000>; 113 d-cache-size = <0x20000>; 114 operating-points-v2 = <&firestorm_opp>; 115 capacity-dmips-mhz = <1024>; 116 performance-domains = <&cpufreq_p0>; 117 }; 118 119 cpu_p02: cpu@10102 { 120 compatible = "apple,firestorm"; 121 device_type = "cpu"; 122 reg = <0x0 0x10102>; 123 enable-method = "spin-table"; 124 cpu-release-addr = <0 0>; /* To be filled by loader */ 125 next-level-cache = <&l2_cache_1>; 126 i-cache-size = <0x30000>; 127 d-cache-size = <0x20000>; 128 operating-points-v2 = <&firestorm_opp>; 129 capacity-dmips-mhz = <1024>; 130 performance-domains = <&cpufreq_p0>; 131 }; 132 133 cpu_p03: cpu@10103 { 134 compatible = "apple,firestorm"; 135 device_type = "cpu"; 136 reg = <0x0 0x10103>; 137 enable-method = "spin-table"; 138 cpu-release-addr = <0 0>; /* To be filled by loader */ 139 next-level-cache = <&l2_cache_1>; 140 i-cache-size = <0x30000>; 141 d-cache-size = <0x20000>; 142 operating-points-v2 = <&firestorm_opp>; 143 capacity-dmips-mhz = <1024>; 144 performance-domains = <&cpufreq_p0>; 145 }; 146 147 cpu_p10: cpu@10200 { 148 compatible = "apple,firestorm"; 149 device_type = "cpu"; 150 reg = <0x0 0x10200>; 151 enable-method = "spin-table"; 152 cpu-release-addr = <0 0>; /* To be filled by loader */ 153 next-level-cache = <&l2_cache_2>; 154 i-cache-size = <0x30000>; 155 d-cache-size = <0x20000>; 156 operating-points-v2 = <&firestorm_opp>; 157 capacity-dmips-mhz = <1024>; 158 performance-domains = <&cpufreq_p1>; 159 }; 160 161 cpu_p11: cpu@10201 { 162 compatible = "apple,firestorm"; 163 device_type = "cpu"; 164 reg = <0x0 0x10201>; 165 enable-method = "spin-table"; 166 cpu-release-addr = <0 0>; /* To be filled by loader */ 167 next-level-cache = <&l2_cache_2>; 168 i-cache-size = <0x30000>; 169 d-cache-size = <0x20000>; 170 operating-points-v2 = <&firestorm_opp>; 171 capacity-dmips-mhz = <1024>; 172 performance-domains = <&cpufreq_p1>; 173 }; 174 175 cpu_p12: cpu@10202 { 176 compatible = "apple,firestorm"; 177 device_type = "cpu"; 178 reg = <0x0 0x10202>; 179 enable-method = "spin-table"; 180 cpu-release-addr = <0 0>; /* To be filled by loader */ 181 next-level-cache = <&l2_cache_2>; 182 i-cache-size = <0x30000>; 183 d-cache-size = <0x20000>; 184 operating-points-v2 = <&firestorm_opp>; 185 capacity-dmips-mhz = <1024>; 186 performance-domains = <&cpufreq_p1>; 187 }; 188 189 cpu_p13: cpu@10203 { 190 compatible = "apple,firestorm"; 191 device_type = "cpu"; 192 reg = <0x0 0x10203>; 193 enable-method = "spin-table"; 194 cpu-release-addr = <0 0>; /* To be filled by loader */ 195 next-level-cache = <&l2_cache_2>; 196 i-cache-size = <0x30000>; 197 d-cache-size = <0x20000>; 198 operating-points-v2 = <&firestorm_opp>; 199 capacity-dmips-mhz = <1024>; 200 performance-domains = <&cpufreq_p1>; 201 }; 202 203 l2_cache_0: l2-cache-0 { 204 compatible = "cache"; 205 cache-level = <2>; 206 cache-unified; 207 cache-size = <0x400000>; 208 }; 209 210 l2_cache_1: l2-cache-1 { 211 compatible = "cache"; 212 cache-level = <2>; 213 cache-unified; 214 cache-size = <0xc00000>; 215 }; 216 217 l2_cache_2: l2-cache-2 { 218 compatible = "cache"; 219 cache-level = <2>; 220 cache-unified; 221 cache-size = <0xc00000>; 222 }; 223 }; 224 225 icestorm_opp: opp-table-0 { 226 compatible = "operating-points-v2"; 227 228 opp01 { 229 opp-hz = /bits/ 64 <600000000>; 230 opp-level = <1>; 231 clock-latency-ns = <7500>; 232 }; 233 opp02 { 234 opp-hz = /bits/ 64 <972000000>; 235 opp-level = <2>; 236 clock-latency-ns = <23000>; 237 }; 238 opp03 { 239 opp-hz = /bits/ 64 <1332000000>; 240 opp-level = <3>; 241 clock-latency-ns = <29000>; 242 }; 243 opp04 { 244 opp-hz = /bits/ 64 <1704000000>; 245 opp-level = <4>; 246 clock-latency-ns = <40000>; 247 }; 248 opp05 { 249 opp-hz = /bits/ 64 <2064000000>; 250 opp-level = <5>; 251 clock-latency-ns = <50000>; 252 }; 253 }; 254 255 firestorm_opp: opp-table-1 { 256 compatible = "operating-points-v2"; 257 258 opp01 { 259 opp-hz = /bits/ 64 <600000000>; 260 opp-level = <1>; 261 clock-latency-ns = <8000>; 262 }; 263 opp02 { 264 opp-hz = /bits/ 64 <828000000>; 265 opp-level = <2>; 266 clock-latency-ns = <18000>; 267 }; 268 opp03 { 269 opp-hz = /bits/ 64 <1056000000>; 270 opp-level = <3>; 271 clock-latency-ns = <19000>; 272 }; 273 opp04 { 274 opp-hz = /bits/ 64 <1296000000>; 275 opp-level = <4>; 276 clock-latency-ns = <23000>; 277 }; 278 opp05 { 279 opp-hz = /bits/ 64 <1524000000>; 280 opp-level = <5>; 281 clock-latency-ns = <24000>; 282 }; 283 opp06 { 284 opp-hz = /bits/ 64 <1752000000>; 285 opp-level = <6>; 286 clock-latency-ns = <28000>; 287 }; 288 opp07 { 289 opp-hz = /bits/ 64 <1980000000>; 290 opp-level = <7>; 291 clock-latency-ns = <31000>; 292 }; 293 opp08 { 294 opp-hz = /bits/ 64 <2208000000>; 295 opp-level = <8>; 296 clock-latency-ns = <45000>; 297 }; 298 opp09 { 299 opp-hz = /bits/ 64 <2448000000>; 300 opp-level = <9>; 301 clock-latency-ns = <49000>; 302 }; 303 opp10 { 304 opp-hz = /bits/ 64 <2676000000>; 305 opp-level = <10>; 306 clock-latency-ns = <53000>; 307 }; 308 opp11 { 309 opp-hz = /bits/ 64 <2904000000>; 310 opp-level = <11>; 311 clock-latency-ns = <56000>; 312 }; 313 opp12 { 314 opp-hz = /bits/ 64 <3036000000>; 315 opp-level = <12>; 316 clock-latency-ns = <56000>; 317 }; 318 /* Not available until CPU deep sleep is implemented 319 opp13 { 320 opp-hz = /bits/ 64 <3132000000>; 321 opp-level = <13>; 322 clock-latency-ns = <56000>; 323 turbo-mode; 324 }; 325 opp14 { 326 opp-hz = /bits/ 64 <3168000000>; 327 opp-level = <14>; 328 clock-latency-ns = <56000>; 329 turbo-mode; 330 }; 331 opp15 { 332 opp-hz = /bits/ 64 <3228000000>; 333 opp-level = <15>; 334 clock-latency-ns = <56000>; 335 turbo-mode; 336 }; 337 */ 338 }; 339 340 pmu-e { 341 compatible = "apple,icestorm-pmu"; 342 interrupt-parent = <&aic>; 343 interrupts = <AIC_FIQ 0 AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>; 344 }; 345 346 pmu-p { 347 compatible = "apple,firestorm-pmu"; 348 interrupt-parent = <&aic>; 349 interrupts = <AIC_FIQ 0 AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>; 350 }; 351 352 timer { 353 compatible = "arm,armv8-timer"; 354 interrupt-parent = <&aic>; 355 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt"; 356 interrupts = <AIC_FIQ 0 AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>, 357 <AIC_FIQ 0 AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>, 358 <AIC_FIQ 0 AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>, 359 <AIC_FIQ 0 AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>; 360 }; 361 362 clkref: clock-ref { 363 compatible = "fixed-clock"; 364 #clock-cells = <0>; 365 clock-frequency = <24000000>; 366 clock-output-names = "clkref"; 367 }; 368 369 clk_200m: clock-200m { 370 compatible = "fixed-clock"; 371 #clock-cells = <0>; 372 clock-frequency = <200000000>; 373 clock-output-names = "clk_200m"; 374 }; 375 376 /* 377 * This is a fabulated representation of the input clock 378 * to NCO since we don't know the true clock tree. 379 */ 380 nco_clkref: clock-ref-nco { 381 compatible = "fixed-clock"; 382 #clock-cells = <0>; 383 clock-output-names = "nco_ref"; 384 }; 385 386 reserved-memory { 387 #address-cells = <2>; 388 #size-cells = <2>; 389 ranges; 390 391 gpu_globals: globals { 392 status = "disabled"; 393 }; 394 395 gpu_hw_cal_a: hw-cal-a { 396 status = "disabled"; 397 }; 398 399 gpu_hw_cal_b: hw-cal-b { 400 status = "disabled"; 401 }; 402 403 uat_handoff: uat-handoff { 404 status = "disabled"; 405 }; 406 407 uat_pagetables: uat-pagetables { 408 status = "disabled"; 409 }; 410 411 uat_ttbs: uat-ttbs { 412 status = "disabled"; 413 }; 414 }; 415}; 416