xref: /linux/arch/arm64/boot/dts/amlogic/amlogic-a5-reset.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
2 /*
3  * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4  */
5 
6 #ifndef __DTS_AMLOGIC_A5_RESET_H
7 #define __DTS_AMLOGIC_A5_RESET_H
8 
9 /* RESET0 */
10 /*						0-3 */
11 #define RESET_USB				4
12 /*						5-7 */
13 #define RESET_USBPHY20				8
14 /*						9 */
15 #define RESET_USB2DRD				10
16 /*						11-31 */
17 
18 /* RESET1 */
19 #define RESET_AUDIO				32
20 #define RESET_AUDIO_VAD				33
21 /*                                              34 */
22 #define RESET_DDR_APB				35
23 #define RESET_DDR				36
24 /*						37-40 */
25 #define RESET_DSPA_DEBUG			41
26 /*                                              42 */
27 #define RESET_DSPA				43
28 /*						44-46 */
29 #define RESET_NNA				47
30 #define RESET_ETHERNET				48
31 /*						49-63 */
32 
33 /* RESET2 */
34 #define RESET_ABUS_ARB				64
35 #define RESET_IRCTRL				65
36 /*						66 */
37 #define RESET_TS_PLL				67
38 /*						68-72 */
39 #define RESET_SPICC_0				73
40 #define RESET_SPICC_1				74
41 #define RESET_RSA				75
42 
43 /*						76-79 */
44 #define RESET_MSR_CLK				80
45 #define RESET_SPIFC				81
46 #define RESET_SAR_ADC				82
47 /*						83-90 */
48 #define RESET_WATCHDOG				91
49 /*						92-95 */
50 
51 /* RESET3 */
52 /*						96-127 */
53 
54 /* RESET4 */
55 #define RESET_RTC				128
56 /*						129-131 */
57 #define RESET_PWM_AB				132
58 #define RESET_PWM_CD				133
59 #define RESET_PWM_EF				134
60 #define RESET_PWM_GH				135
61 /*						104-105 */
62 #define RESET_UART_A				138
63 #define RESET_UART_B				139
64 #define RESET_UART_C				140
65 #define RESET_UART_D				141
66 #define RESET_UART_E				142
67 /*						143*/
68 #define RESET_I2C_S_A				144
69 #define RESET_I2C_M_A				145
70 #define RESET_I2C_M_B				146
71 #define RESET_I2C_M_C				147
72 #define RESET_I2C_M_D				148
73 /*						149-151 */
74 #define RESET_SDEMMC_A				152
75 /*						153 */
76 #define RESET_SDEMMC_C				154
77 /*						155-159*/
78 
79 /* RESET5 */
80 /*						160-175 */
81 #define RESET_BRG_AO_NIC_SYS			176
82 #define RESET_BRG_AO_NIC_DSPA			177
83 #define RESET_BRG_AO_NIC_MAIN			178
84 #define RESET_BRG_AO_NIC_AUDIO			179
85 /*						180-183 */
86 #define RESET_BRG_AO_NIC_ALL			184
87 #define RESET_BRG_NIC_NNA			185
88 #define RESET_BRG_NIC_SDIO			186
89 #define RESET_BRG_NIC_EMMC			187
90 #define RESET_BRG_NIC_DSU			188
91 #define RESET_BRG_NIC_SYSCLK			189
92 #define RESET_BRG_NIC_MAIN			190
93 #define RESET_BRG_NIC_ALL			191
94 
95 #endif
96