1// SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2/* 3 * Copyright 2017 Gateworks Corporation 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9 10/ { 11 /* these are used by bootloader for disabling nodes */ 12 aliases { 13 led0 = &led0; 14 led1 = &led1; 15 led2 = &led2; 16 ssi0 = &ssi1; 17 usb0 = &usbh1; 18 usb1 = &usbotg; 19 }; 20 21 chosen { 22 stdout-path = &uart2; 23 }; 24 25 backlight-display { 26 compatible = "pwm-backlight"; 27 pwms = <&pwm4 0 5000000 0>; 28 brightness-levels = < 29 0 1 2 3 4 5 6 7 8 9 30 10 11 12 13 14 15 16 17 18 19 31 20 21 22 23 24 25 26 27 28 29 32 30 31 32 33 34 35 36 37 38 39 33 40 41 42 43 44 45 46 47 48 49 34 50 51 52 53 54 55 56 57 58 59 35 60 61 62 63 64 65 66 67 68 69 36 70 71 72 73 74 75 76 77 78 79 37 80 81 82 83 84 85 86 87 88 89 38 90 91 92 93 94 95 96 97 98 99 39 100 40 >; 41 default-brightness-level = <100>; 42 }; 43 44 backlight-keypad { 45 compatible = "gpio-backlight"; 46 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; 47 default-on; 48 }; 49 50 gpio-keys { 51 compatible = "gpio-keys"; 52 53 user-pb { 54 label = "user_pb"; 55 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 56 linux,code = <BTN_0>; 57 }; 58 59 user-pb1x { 60 label = "user_pb1x"; 61 linux,code = <BTN_1>; 62 interrupt-parent = <&gsc>; 63 interrupts = <0>; 64 }; 65 66 key-erased { 67 label = "key-erased"; 68 linux,code = <BTN_2>; 69 interrupt-parent = <&gsc>; 70 interrupts = <1>; 71 }; 72 73 eeprom-wp { 74 label = "eeprom_wp"; 75 linux,code = <BTN_3>; 76 interrupt-parent = <&gsc>; 77 interrupts = <2>; 78 }; 79 80 tamper { 81 label = "tamper"; 82 linux,code = <BTN_4>; 83 interrupt-parent = <&gsc>; 84 interrupts = <5>; 85 }; 86 87 switch-hold { 88 label = "switch_hold"; 89 linux,code = <BTN_5>; 90 interrupt-parent = <&gsc>; 91 interrupts = <7>; 92 }; 93 }; 94 95 leds { 96 compatible = "gpio-leds"; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_gpio_leds>; 99 100 led0: led-user1 { 101 label = "user1"; 102 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 103 default-state = "on"; 104 linux,default-trigger = "heartbeat"; 105 }; 106 107 led1: led-user2 { 108 label = "user2"; 109 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 110 default-state = "off"; 111 }; 112 113 led2: led-user3 { 114 label = "user3"; 115 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 116 default-state = "off"; 117 }; 118 }; 119 120 memory@10000000 { 121 device_type = "memory"; 122 reg = <0x10000000 0x40000000>; 123 }; 124 125 pps { 126 compatible = "pps-gpio"; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_pps>; 129 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 130 }; 131 132 reg_2p5v: regulator-2p5v { 133 compatible = "regulator-fixed"; 134 regulator-name = "2P5V"; 135 regulator-min-microvolt = <2500000>; 136 regulator-max-microvolt = <2500000>; 137 regulator-always-on; 138 }; 139 140 reg_3p3v: regulator-3p3v { 141 compatible = "regulator-fixed"; 142 regulator-name = "3P3V"; 143 regulator-min-microvolt = <3300000>; 144 regulator-max-microvolt = <3300000>; 145 regulator-always-on; 146 }; 147 148 reg_5p0v: regulator-5p0v { 149 compatible = "regulator-fixed"; 150 regulator-name = "5P0V"; 151 regulator-min-microvolt = <5000000>; 152 regulator-max-microvolt = <5000000>; 153 regulator-always-on; 154 }; 155 156 reg_12p0v: regulator-12p0v { 157 compatible = "regulator-fixed"; 158 regulator-name = "12P0V"; 159 regulator-min-microvolt = <12000000>; 160 regulator-max-microvolt = <12000000>; 161 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 162 enable-active-high; 163 }; 164 165 reg_1p4v: regulator-vddsoc { 166 compatible = "regulator-fixed"; 167 regulator-name = "vdd_soc"; 168 regulator-min-microvolt = <1400000>; 169 regulator-max-microvolt = <1400000>; 170 regulator-always-on; 171 }; 172 173 reg_usb_h1_vbus: regulator-usb-h1-vbus { 174 compatible = "regulator-fixed"; 175 regulator-name = "usb_h1_vbus"; 176 regulator-min-microvolt = <5000000>; 177 regulator-max-microvolt = <5000000>; 178 regulator-always-on; 179 }; 180 181 reg_usb_otg_vbus: regulator-usb-otg-vbus { 182 compatible = "regulator-fixed"; 183 regulator-name = "usb_otg_vbus"; 184 regulator-min-microvolt = <5000000>; 185 regulator-max-microvolt = <5000000>; 186 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 187 enable-active-high; 188 }; 189 190 sound { 191 compatible = "fsl,imx6q-ventana-sgtl5000", 192 "fsl,imx-audio-sgtl5000"; 193 model = "sgtl5000-audio"; 194 ssi-controller = <&ssi1>; 195 audio-codec = <&sgtl5000>; 196 audio-routing = 197 "MIC_IN", "Mic Jack", 198 "Mic Jack", "Mic Bias", 199 "Headphone Jack", "HP_OUT"; 200 mux-int-port = <1>; 201 mux-ext-port = <4>; 202 }; 203}; 204 205&audmux { 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_audmux>; 208 status = "okay"; 209}; 210 211&ecspi3 { 212 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&pinctrl_ecspi3>; 215 status = "okay"; 216}; 217 218&can1 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&pinctrl_flexcan>; 221 status = "okay"; 222}; 223 224&clks { 225 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 226 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 227 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 228 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 229}; 230 231&fec { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_enet>; 234 phy-mode = "rgmii-id"; 235 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 236 status = "okay"; 237}; 238 239&hdmi { 240 ddc-i2c-bus = <&i2c3>; 241 status = "okay"; 242}; 243 244&i2c1 { 245 clock-frequency = <100000>; 246 pinctrl-names = "default"; 247 pinctrl-0 = <&pinctrl_i2c1>; 248 status = "okay"; 249 250 gsc: gsc@20 { 251 compatible = "gw,gsc"; 252 reg = <0x20>; 253 interrupt-parent = <&gpio1>; 254 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 255 interrupt-controller; 256 #interrupt-cells = <1>; 257 #size-cells = <0>; 258 259 adc { 260 compatible = "gw,gsc-adc"; 261 #address-cells = <1>; 262 #size-cells = <0>; 263 264 channel@0 { 265 gw,mode = <0>; 266 reg = <0x00>; 267 label = "temp"; 268 }; 269 270 channel@2 { 271 gw,mode = <1>; 272 reg = <0x02>; 273 label = "vdd_vin"; 274 }; 275 276 channel@5 { 277 gw,mode = <1>; 278 reg = <0x05>; 279 label = "vdd_3p3"; 280 }; 281 282 channel@8 { 283 gw,mode = <1>; 284 reg = <0x08>; 285 label = "vdd_bat"; 286 }; 287 288 channel@b { 289 gw,mode = <1>; 290 reg = <0x0b>; 291 label = "vdd_5p0"; 292 }; 293 294 channel@e { 295 gw,mode = <1>; 296 reg = <0xe>; 297 label = "vdd_arm"; 298 }; 299 300 channel@11 { 301 gw,mode = <1>; 302 reg = <0x11>; 303 label = "vdd_soc"; 304 }; 305 306 channel@14 { 307 gw,mode = <1>; 308 reg = <0x14>; 309 label = "vdd_3p0"; 310 }; 311 312 channel@17 { 313 gw,mode = <1>; 314 reg = <0x17>; 315 label = "vdd_1p5"; 316 }; 317 318 channel@1d { 319 gw,mode = <1>; 320 reg = <0x1d>; 321 label = "vdd_1p8"; 322 }; 323 324 channel@20 { 325 gw,mode = <1>; 326 reg = <0x20>; 327 label = "vdd_an1"; 328 }; 329 330 channel@23 { 331 gw,mode = <1>; 332 reg = <0x23>; 333 label = "vdd_2p5"; 334 }; 335 336 channel@26 { 337 gw,mode = <1>; 338 reg = <0x26>; 339 label = "vdd_gps"; 340 }; 341 342 channel@29 { 343 gw,mode = <1>; 344 reg = <0x29>; 345 label = "vdd_an2"; 346 }; 347 }; 348 }; 349 350 gsc_gpio: gpio@23 { 351 compatible = "nxp,pca9555"; 352 reg = <0x23>; 353 gpio-controller; 354 #gpio-cells = <2>; 355 interrupt-parent = <&gsc>; 356 interrupts = <4>; 357 }; 358 359 eeprom1: eeprom@50 { 360 compatible = "atmel,24c02"; 361 reg = <0x50>; 362 pagesize = <16>; 363 }; 364 365 eeprom2: eeprom@51 { 366 compatible = "atmel,24c02"; 367 reg = <0x51>; 368 pagesize = <16>; 369 }; 370 371 eeprom3: eeprom@52 { 372 compatible = "atmel,24c02"; 373 reg = <0x52>; 374 pagesize = <16>; 375 }; 376 377 eeprom4: eeprom@53 { 378 compatible = "atmel,24c02"; 379 reg = <0x53>; 380 pagesize = <16>; 381 }; 382 383 ds1672: rtc@68 { 384 compatible = "dallas,ds1672"; 385 reg = <0x68>; 386 }; 387}; 388 389&i2c2 { 390 clock-frequency = <100000>; 391 pinctrl-names = "default"; 392 pinctrl-0 = <&pinctrl_i2c2>; 393 status = "okay"; 394 395 sgtl5000: codec@a { 396 compatible = "fsl,sgtl5000"; 397 reg = <0x0a>; 398 #sound-dai-cells = <0>; 399 clocks = <&clks IMX6QDL_CLK_CKO>; 400 VDDA-supply = <®_1p8v>; 401 VDDIO-supply = <®_3p3v>; 402 }; 403 404 magn@1c { 405 compatible = "st,lsm9ds1-magn"; 406 reg = <0x1c>; 407 pinctrl-names = "default"; 408 pinctrl-0 = <&pinctrl_mag>; 409 interrupt-parent = <&gpio5>; 410 interrupts = <9 IRQ_TYPE_EDGE_RISING>; 411 }; 412 413 tca8418: keypad@34 { 414 compatible = "ti,tca8418"; 415 pinctrl-names = "default"; 416 pinctrl-0 = <&pinctrl_keypad>; 417 reg = <0x34>; 418 interrupt-parent = <&gpio5>; 419 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 420 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0) 421 MATRIX_KEY(0x00, 0x00, BTN_1) 422 MATRIX_KEY(0x01, 0x01, BTN_2) 423 MATRIX_KEY(0x01, 0x00, BTN_3) 424 MATRIX_KEY(0x02, 0x00, BTN_4) 425 MATRIX_KEY(0x00, 0x03, BTN_5) 426 MATRIX_KEY(0x00, 0x02, BTN_6) 427 MATRIX_KEY(0x01, 0x03, BTN_7) 428 MATRIX_KEY(0x01, 0x02, BTN_8) 429 MATRIX_KEY(0x02, 0x02, BTN_9) 430 >; 431 keypad,num-rows = <4>; 432 keypad,num-columns = <4>; 433 }; 434 435 ltc3676: pmic@3c { 436 compatible = "lltc,ltc3676"; 437 pinctrl-names = "default"; 438 pinctrl-0 = <&pinctrl_pmic>; 439 reg = <0x3c>; 440 interrupt-parent = <&gpio1>; 441 interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 442 443 regulators { 444 /* VDD_DDR (1+R1/R2 = 2.105) */ 445 reg_vdd_ddr: sw2 { 446 regulator-name = "vddddr"; 447 regulator-min-microvolt = <868310>; 448 regulator-max-microvolt = <1684000>; 449 lltc,fb-voltage-divider = <221000 200000>; 450 regulator-ramp-delay = <7000>; 451 regulator-boot-on; 452 regulator-always-on; 453 }; 454 455 /* VDD_ARM (1+R1/R2 = 1.931) */ 456 reg_vdd_arm: sw3 { 457 regulator-name = "vddarm"; 458 regulator-min-microvolt = <796551>; 459 regulator-max-microvolt = <1544827>; 460 lltc,fb-voltage-divider = <243000 261000>; 461 regulator-ramp-delay = <7000>; 462 regulator-boot-on; 463 regulator-always-on; 464 linux,phandle = <®_vdd_arm>; 465 }; 466 467 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ 468 reg_1p8v: sw4 { 469 regulator-name = "vdd1p8"; 470 regulator-min-microvolt = <1033310>; 471 regulator-max-microvolt = <2004000>; 472 lltc,fb-voltage-divider = <301000 200000>; 473 regulator-ramp-delay = <7000>; 474 regulator-boot-on; 475 regulator-always-on; 476 }; 477 478 /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */ 479 reg_1p0v: ldo2 { 480 regulator-name = "vdd1p0"; 481 regulator-min-microvolt = <950000>; 482 regulator-max-microvolt = <1050000>; 483 lltc,fb-voltage-divider = <78700 200000>; 484 regulator-boot-on; 485 regulator-always-on; 486 }; 487 488 /* VDD_AUD_1P8: Audio codec */ 489 reg_aud_1p8v: ldo3 { 490 regulator-name = "vdd1p8a"; 491 regulator-min-microvolt = <1800000>; 492 regulator-max-microvolt = <1800000>; 493 regulator-boot-on; 494 }; 495 496 /* VDD_HIGH (1+R1/R2 = 4.17) */ 497 reg_3p0v: ldo4 { 498 regulator-name = "vdd3p0"; 499 regulator-min-microvolt = <3023250>; 500 regulator-max-microvolt = <3023250>; 501 lltc,fb-voltage-divider = <634000 200000>; 502 regulator-boot-on; 503 regulator-always-on; 504 }; 505 }; 506 }; 507 508 imu@6a { 509 compatible = "st,lsm9ds1-imu"; 510 reg = <0x6a>; 511 st,drdy-int-pin = <1>; 512 pinctrl-names = "default"; 513 pinctrl-0 = <&pinctrl_imu>; 514 interrupt-parent = <&gpio5>; 515 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; 516 }; 517}; 518 519&i2c3 { 520 clock-frequency = <100000>; 521 pinctrl-names = "default"; 522 pinctrl-0 = <&pinctrl_i2c3>; 523 status = "okay"; 524 525 egalax_ts: touchscreen@4 { 526 compatible = "eeti,egalax_ts"; 527 reg = <0x04>; 528 interrupt-parent = <&gpio5>; 529 interrupts = <12 IRQ_TYPE_EDGE_FALLING>; 530 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 531 }; 532}; 533 534&ldb { 535 fsl,dual-channel; 536 status = "okay"; 537 538 lvds-channel@0 { 539 fsl,data-mapping = "spwg"; 540 fsl,data-width = <18>; 541 status = "okay"; 542 543 display-timings { 544 native-mode = <&timing0>; 545 timing0: timing-hsd100pxn1 { 546 clock-frequency = <65000000>; 547 hactive = <1024>; 548 vactive = <768>; 549 hback-porch = <220>; 550 hfront-porch = <40>; 551 vback-porch = <21>; 552 vfront-porch = <7>; 553 hsync-len = <60>; 554 vsync-len = <10>; 555 }; 556 }; 557 }; 558}; 559 560&pcie { 561 pinctrl-names = "default"; 562 pinctrl-0 = <&pinctrl_pcie>; 563 reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>; 564 status = "okay"; 565}; 566 567&pwm2 { 568 pinctrl-names = "default"; 569 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 570 status = "disabled"; 571}; 572 573&pwm3 { 574 pinctrl-names = "default"; 575 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 576 status = "disabled"; 577}; 578 579&pwm4 { 580 pinctrl-names = "default"; 581 pinctrl-0 = <&pinctrl_pwm4>; 582 status = "okay"; 583}; 584 585&ssi1 { 586 status = "okay"; 587}; 588 589&uart1 { 590 pinctrl-names = "default"; 591 pinctrl-0 = <&pinctrl_uart1>; 592 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 593 status = "okay"; 594}; 595 596&uart2 { 597 pinctrl-names = "default"; 598 pinctrl-0 = <&pinctrl_uart2>; 599 status = "okay"; 600}; 601 602&uart5 { 603 pinctrl-names = "default"; 604 pinctrl-0 = <&pinctrl_uart5>; 605 status = "okay"; 606}; 607 608&usbotg { 609 vbus-supply = <®_usb_otg_vbus>; 610 pinctrl-names = "default"; 611 pinctrl-0 = <&pinctrl_usbotg>; 612 disable-over-current; 613 status = "okay"; 614}; 615 616&usbh1 { 617 vbus-supply = <®_usb_h1_vbus>; 618 pinctrl-names = "default"; 619 pinctrl-0 = <&pinctrl_usbh1>; 620 status = "okay"; 621}; 622 623&usdhc2 { 624 pinctrl-names = "default"; 625 pinctrl-0 = <&pinctrl_usdhc2>; 626 bus-width = <8>; 627 vmmc-supply = <®_3p3v>; 628 non-removable; 629 status = "okay"; 630}; 631 632&usdhc3 { 633 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 634 pinctrl-0 = <&pinctrl_usdhc3>; 635 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 636 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 637 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 638 vmmc-supply = <®_3p3v>; 639 status = "okay"; 640}; 641 642&wdog1 { 643 pinctrl-names = "default"; 644 pinctrl-0 = <&pinctrl_wdog>; 645 fsl,ext-reset-output; 646}; 647 648&iomuxc { 649 pinctrl_audmux: audmuxgrp { 650 fsl,pins = < 651 /* AUD4 */ 652 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 653 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 654 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 655 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 656 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ 657 /* AUD6 */ 658 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0 659 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0 660 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0 661 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0 662 >; 663 }; 664 665 pinctrl_ecspi3: escpi3grp { 666 fsl,pins = < 667 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 668 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 669 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 670 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 671 >; 672 }; 673 674 pinctrl_enet: enetgrp { 675 fsl,pins = < 676 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 677 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 678 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 679 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 680 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 681 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 682 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 683 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 684 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 685 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 686 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 687 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 688 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 689 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 690 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 691 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 692 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ 693 >; 694 }; 695 696 pinctrl_flexcan: flexcangrp { 697 fsl,pins = < 698 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 699 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 700 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 701 >; 702 }; 703 704 pinctrl_gpio_leds: gpioledsgrp { 705 fsl,pins = < 706 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 707 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 708 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 709 >; 710 }; 711 712 pinctrl_i2c1: i2c1grp { 713 fsl,pins = < 714 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 715 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 716 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 717 >; 718 }; 719 720 pinctrl_i2c2: i2c2grp { 721 fsl,pins = < 722 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 723 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 724 >; 725 }; 726 727 pinctrl_i2c3: i2c3grp { 728 fsl,pins = < 729 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 730 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 731 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */ 732 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */ 733 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */ 734 >; 735 }; 736 737 pinctrl_imu: imugrp { 738 fsl,pins = < 739 MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0 740 >; 741 }; 742 743 pinctrl_keypad: keypadgrp { 744 fsl,pins = < 745 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ 746 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */ 747 >; 748 }; 749 750 pinctrl_mag: maggrp { 751 fsl,pins = < 752 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0 753 >; 754 }; 755 756 pinctrl_pcie: pciegrp { 757 fsl,pins = < 758 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ 759 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */ 760 >; 761 }; 762 763 pinctrl_pmic: pmicgrp { 764 fsl,pins = < 765 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 766 >; 767 }; 768 769 pinctrl_pps: ppsgrp { 770 fsl,pins = < 771 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 772 >; 773 }; 774 775 pinctrl_pwm2: pwm2grp { 776 fsl,pins = < 777 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 778 >; 779 }; 780 781 pinctrl_pwm3: pwm3grp { 782 fsl,pins = < 783 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 784 >; 785 }; 786 787 pinctrl_pwm4: pwm4grp { 788 fsl,pins = < 789 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 790 >; 791 }; 792 793 pinctrl_uart1: uart1grp { 794 fsl,pins = < 795 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 796 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 797 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */ 798 >; 799 }; 800 801 pinctrl_uart2: uart2grp { 802 fsl,pins = < 803 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 804 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 805 >; 806 }; 807 808 pinctrl_uart5: uart5grp { 809 fsl,pins = < 810 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 811 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 812 >; 813 }; 814 815 pinctrl_usbh1: usbh1grp { 816 fsl,pins = < 817 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */ 818 >; 819 }; 820 821 pinctrl_usbotg: usbotggrp { 822 fsl,pins = < 823 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 824 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ 825 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ 826 >; 827 }; 828 829 pinctrl_usdhc2: usdhc2grp { 830 fsl,pins = < 831 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 832 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 833 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 834 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 835 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 836 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 837 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9 838 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9 839 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9 840 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9 841 >; 842 }; 843 844 pinctrl_usdhc3: usdhc3grp { 845 fsl,pins = < 846 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 847 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 848 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 849 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 850 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 851 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 852 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ 853 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 854 >; 855 }; 856 857 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { 858 fsl,pins = < 859 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 860 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 861 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 862 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 863 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 864 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 865 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ 866 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 867 >; 868 }; 869 870 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { 871 fsl,pins = < 872 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 873 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 874 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 875 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 876 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 877 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 878 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ 879 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 880 >; 881 }; 882 883 pinctrl_wdog: wdoggrp { 884 fsl,pins = < 885 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 886 >; 887 }; 888}; 889