1=============== 2Amiga joysticks 3=============== 4 5Pinouts 6======= 7 8Amiga 4-joystick parallel port extension 9---------------------------------------- 10 11Parallel port pins: 12 13===== ======== ==== ========== 14Pin Meaning Pin Meaning 15===== ======== ==== ========== 16 2 Up1 6 Up2 17 3 Down1 7 Down2 18 4 Left1 8 Left2 19 5 Right1 9 Right2 2013 Fire1 11 Fire2 2119 Gnd1 18 Gnd2 22===== ======== ==== ========== 23 24Amiga digital joystick 25---------------------- 26 27=== ============ 28Pin Meaning 29=== ============ 301 Up 312 Down 323 Left 334 Right 345 n/c 356 Fire button 367 +5V (50mA) 378 Gnd 389 Thumb button 39=== ============ 40 41Amiga mouse 42----------- 43 44=== ============ 45Pin Meaning 46=== ============ 471 V-pulse 482 H-pulse 493 VQ-pulse 504 HQ-pulse 515 Middle button 526 Left button 537 +5V (50mA) 548 Gnd 559 Right button 56=== ============ 57 58Amiga analog joystick 59--------------------- 60 61=== ============== 62Pin Meaning 63=== ============== 641 Top button 652 Top2 button 663 Trigger button 674 Thumb button 685 Analog X 696 n/c 707 +5V (50mA) 718 Gnd 729 Analog Y 73=== ============== 74 75Amiga lightpen 76-------------- 77 78=== ============= 79Pin Meaning 80=== ============= 811 n/c 822 n/c 833 n/c 844 n/c 855 Touch button 866 /Beamtrigger 877 +5V (50mA) 888 Gnd 899 Stylus button 90=== ============= 91 92Register addresses 93================== 94 95JOY0DAT/JOY1DAT 96--------------- 97 98======== === ==== ==== ====== =========================================== 99NAME rev ADDR type chip Description 100======== === ==== ==== ====== =========================================== 101JOY0DAT 00A R Denise Joystick-mouse 0 data (left vert., horiz.) 102JOY1DAT 00C R Denise Joystick-mouse 1 data (right vert., horiz.) 103======== === ==== ==== ====== =========================================== 104 105 These addresses each read a 16 bit register. These in turn 106 are loaded from the MDAT serial stream and are clocked in on 107 the rising edge of SCLK. MLD output is used to parallel load 108 the external parallel-to-serial converter. This in turn is 109 loaded with the 4 quadrature inputs from each of two game 110 controller ports (8 total) plus 8 miscellaneous control bits 111 which are new for LISA and can be read in upper 8 bits of 112 LISAID. 113 114 Register bits are as follows: 115 116 - Mouse counter usage (pins 1,3 =Yclock, pins 2,4 =Xclock) 117 118======== === === === === === === === === ====== === === === === === === === 119 BIT# 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 120======== === === === === === === === === ====== === === === === === === === 121JOY0DAT Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 X7 X6 X5 X4 X3 X2 X1 X0 122JOY1DAT Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 X7 X6 X5 X4 X3 X2 X1 X0 123======== === === === === === === === === ====== === === === === === === === 124 125 0=LEFT CONTROLLER PAIR, 1=RIGHT CONTROLLER PAIR. 126 (4 counters total). The bit usage for both left and right 127 addresses is shown below. Each 6 bit counter (Y7-Y2,X7-X2) is 128 clocked by 2 of the signals input from the mouse serial 129 stream. Starting with first bit received: 130 131 +--------+----------+-----------------------------------------+ 132 | Serial | Bit Name | Description | 133 +========+==========+=========================================+ 134 | 0 | M0H | JOY0DAT Horizontal Clock | 135 +--------+----------+-----------------------------------------+ 136 | 1 | M0HQ | JOY0DAT Horizontal Clock (quadrature) | 137 +--------+----------+-----------------------------------------+ 138 | 2 | M0V | JOY0DAT Vertical Clock | 139 +--------+----------+-----------------------------------------+ 140 | 3 | M0VQ | JOY0DAT Vertical Clock (quadrature) | 141 +--------+----------+-----------------------------------------+ 142 | 4 | M1V | JOY1DAT Horizontal Clock | 143 +--------+----------+-----------------------------------------+ 144 | 5 | M1VQ | JOY1DAT Horizontal Clock (quadrature) | 145 +--------+----------+-----------------------------------------+ 146 | 6 | M1V | JOY1DAT Vertical Clock | 147 +--------+----------+-----------------------------------------+ 148 | 7 | M1VQ | JOY1DAT Vertical Clock (quadrature) | 149 +--------+----------+-----------------------------------------+ 150 151 Bits 1 and 0 of each counter (Y1-Y0,X1-X0) may be 152 read to determine the state of the related input signal pair. 153 This allows these pins to double as joystick switch inputs. 154 Joystick switch closures can be deciphered as follows: 155 156 +------------+------+---------------------------------+ 157 | Directions | Pin# | Counter bits | 158 +============+======+=================================+ 159 | Forward | 1 | Y1 xor Y0 (BIT#09 xor BIT#08) | 160 +------------+------+---------------------------------+ 161 | Left | 3 | Y1 | 162 +------------+------+---------------------------------+ 163 | Back | 2 | X1 xor X0 (BIT#01 xor BIT#00) | 164 +------------+------+---------------------------------+ 165 | Right | 4 | X1 | 166 +------------+------+---------------------------------+ 167 168JOYTEST 169------- 170 171======== === ==== ==== ====== ================================================= 172NAME rev ADDR type chip Description 173======== === ==== ==== ====== ================================================= 174JOYTEST 036 W Denise Write to all 4 joystick-mouse counters at once. 175======== === ==== ==== ====== ================================================= 176 177 Mouse counter write test data: 178 179========= === === === === === === === === ====== === === === === === === === 180 BIT# 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 181========= === === === === === === === === ====== === === === === === === === 182 JOYxDAT Y7 Y6 Y5 Y4 Y3 Y2 xx xx X7 X6 X5 X4 X3 X2 xx xx 183 JOYxDAT Y7 Y6 Y5 Y4 Y3 Y2 xx xx X7 X6 X5 X4 X3 X2 xx xx 184========= === === === === === === === === ====== === === === === === === === 185 186POT0DAT/POT1DAT 187--------------- 188 189======= === ==== ==== ====== =========================================== 190NAME rev ADDR type chip Description 191======= === ==== ==== ====== =========================================== 192POT0DAT h 012 R Paula Pot counter data left pair (vert., horiz.) 193POT1DAT h 014 R Paula Pot counter data right pair (vert., horiz.) 194======= === ==== ==== ====== =========================================== 195 196 These addresses each read a pair of 8 bit pot counters. 197 (4 counters total). The bit assignment for both 198 addresses is shown below. The counters are stopped by signals 199 from 2 controller connectors (left-right) with 2 pins each. 200 201====== === === === === === === === === ====== === === === === === === === 202 BIT# 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 203====== === === === === === === === === ====== === === === === === === === 204 RIGHT Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 X7 X6 X5 X4 X3 X2 X1 X0 205 LEFT Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 X7 X6 X5 X4 X3 X2 X1 X0 206====== === === === === === === === === ====== === === === === === === === 207 208 +--------------------------+-------+ 209 | CONNECTORS | PAULA | 210 +-------+------+-----+-----+-------+ 211 | Loc. | Dir. | Sym | pin | pin | 212 +=======+======+=====+=====+=======+ 213 | RIGHT | Y | RX | 9 | 33 | 214 +-------+------+-----+-----+-------+ 215 | RIGHT | X | RX | 5 | 32 | 216 +-------+------+-----+-----+-------+ 217 | LEFT | Y | LY | 9 | 36 | 218 +-------+------+-----+-----+-------+ 219 | LEFT | X | LX | 5 | 35 | 220 +-------+------+-----+-----+-------+ 221 222 With normal (NTSC or PAL) horiz. line rate, the pots will 223 give a full scale (FF) reading with about 500k ohm in one 224 frame time. With proportionally faster horiz. line times, 225 the counters will count proportionally faster. 226 This should be noted when doing variable beam displays. 227 228POTGO 229----- 230 231====== === ==== ==== ====== ================================================ 232NAME rev ADDR type chip Description 233====== === ==== ==== ====== ================================================ 234POTGO 034 W Paula Pot port (4 bit) bi-direction and data, and pot 235 counter start. 236====== === ==== ==== ====== ================================================ 237 238POTINP 239------ 240 241====== === ==== ==== ====== ================================================ 242NAME rev ADDR type chip Description 243====== === ==== ==== ====== ================================================ 244POTINP 016 R Paula Pot pin data read 245====== === ==== ==== ====== ================================================ 246 247 This register controls a 4 bit bi-direction I/O port 248 that shares the same 4 pins as the 4 pot counters above. 249 250 +-------+----------+----------------------------------------------+ 251 | BIT# | FUNCTION | DESCRIPTION | 252 +=======+==========+==============================================+ 253 | 15 | OUTRY | Output enable for Paula pin 33 | 254 +-------+----------+----------------------------------------------+ 255 | 14 | DATRY | I/O data Paula pin 33 | 256 +-------+----------+----------------------------------------------+ 257 | 13 | OUTRX | Output enable for Paula pin 32 | 258 +-------+----------+----------------------------------------------+ 259 | 12 | DATRX | I/O data Paula pin 32 | 260 +-------+----------+----------------------------------------------+ 261 | 11 | OUTLY | Out put enable for Paula pin 36 | 262 +-------+----------+----------------------------------------------+ 263 | 10 | DATLY | I/O data Paula pin 36 | 264 +-------+----------+----------------------------------------------+ 265 | 09 | OUTLX | Output enable for Paula pin 35 | 266 +-------+----------+----------------------------------------------+ 267 | 08 | DATLX | I/O data Paula pin 35 | 268 +-------+----------+----------------------------------------------+ 269 | 07-01 | X | Not used | 270 +-------+----------+----------------------------------------------+ 271 | 00 | START | Start pots (dump capacitors, start counters) | 272 +-------+----------+----------------------------------------------+ 273