1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,sa8775p-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SA8775p Peripheral Authentication Service 8 9maintainers: 10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org> 11 12description: 13 Qualcomm SA8775p SoC Peripheral Authentication Service loads and boots firmware 14 on the Qualcomm DSP Hexagon cores. 15 16properties: 17 compatible: 18 oneOf: 19 - items: 20 - enum: 21 - qcom,qcs8300-adsp-pas 22 - const: qcom,sa8775p-adsp-pas 23 - items: 24 - enum: 25 - qcom,qcs8300-cdsp-pas 26 - const: qcom,sa8775p-cdsp0-pas 27 - items: 28 - enum: 29 - qcom,qcs8300-gpdsp-pas 30 - const: qcom,sa8775p-gpdsp0-pas 31 - enum: 32 - qcom,sa8775p-adsp-pas 33 - qcom,sa8775p-cdsp0-pas 34 - qcom,sa8775p-cdsp1-pas 35 - qcom,sa8775p-gpdsp0-pas 36 - qcom,sa8775p-gpdsp1-pas 37 38 reg: 39 maxItems: 1 40 41 clocks: 42 items: 43 - description: XO clock 44 45 clock-names: 46 items: 47 - const: xo 48 49 qcom,qmp: 50 $ref: /schemas/types.yaml#/definitions/phandle 51 description: Reference to the AOSS side-channel message RAM. 52 53 firmware-name: 54 $ref: /schemas/types.yaml#/definitions/string-array 55 items: 56 - description: Firmware name of the Hexagon core 57 58 memory-region: 59 items: 60 - description: Memory region for main Firmware authentication 61 62 interrupts: 63 maxItems: 5 64 65 interrupt-names: 66 maxItems: 5 67 68required: 69 - compatible 70 - reg 71 - memory-region 72 73allOf: 74 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 75 76 - if: 77 properties: 78 compatible: 79 contains: 80 enum: 81 - qcom,sa8775p-adsp-pas 82 then: 83 properties: 84 power-domains: 85 items: 86 - description: LCX power domain 87 - description: LMX power domain 88 power-domain-names: 89 items: 90 - const: lcx 91 - const: lmx 92 93 - if: 94 properties: 95 compatible: 96 contains: 97 enum: 98 - qcom,sa8775p-cdsp0-pas 99 - qcom,sa8775p-cdsp1-pas 100 then: 101 properties: 102 power-domains: 103 items: 104 - description: CX power domain 105 - description: MXC power domain 106 - description: NSP0 power domain 107 power-domain-names: 108 items: 109 - const: cx 110 - const: mxc 111 - const: nsp 112 113 - if: 114 properties: 115 compatible: 116 contains: 117 enum: 118 - qcom,sa8775p-gpdsp0-pas 119 - qcom,sa8775p-gpdsp1-pas 120 then: 121 properties: 122 power-domains: 123 items: 124 - description: CX power domain 125 - description: MXC power domain 126 power-domain-names: 127 items: 128 - const: cx 129 - const: mxc 130 131unevaluatedProperties: false 132 133examples: 134 - | 135 #include <dt-bindings/clock/qcom,rpmh.h> 136 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> 137 #include <dt-bindings/interrupt-controller/irq.h> 138 #include <dt-bindings/mailbox/qcom-ipcc.h> 139 #include <dt-bindings/power/qcom,rpmhpd.h> 140 141 remoteproc@30000000 { 142 compatible = "qcom,sa8775p-adsp-pas"; 143 reg = <0x30000000 0x100>; 144 145 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, 146 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 147 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 148 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 149 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 150 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; 151 152 clocks = <&rpmhcc RPMH_CXO_CLK>; 153 clock-names = "xo"; 154 155 power-domains = <&rpmhpd RPMHPD_LCX>, <&rpmhpd RPMHPD_LMX>; 156 power-domain-names = "lcx", "lmx"; 157 158 interconnects = <&lpass_ag_noc MASTER_LPASS_PROC 0 &mc_virt SLAVE_EBI1 0>; 159 160 memory-region = <&pil_adsp_mem>; 161 162 qcom,qmp = <&aoss_qmp>; 163 164 qcom,smem-states = <&smp2p_adsp_out 0>; 165 qcom,smem-state-names = "stop"; 166 167 glink-edge { 168 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 169 IPCC_MPROC_SIGNAL_GLINK_QMP 170 IRQ_TYPE_EDGE_RISING>; 171 mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; 172 173 label = "lpass"; 174 qcom,remote-pid = <2>; 175 }; 176 }; 177