xref: /linux/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/renesas,rcar-canfd.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car CAN FD Controller
8
9maintainers:
10  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - renesas,r8a774a1-canfd     # RZ/G2M
18              - renesas,r8a774b1-canfd     # RZ/G2N
19              - renesas,r8a774c0-canfd     # RZ/G2E
20              - renesas,r8a774e1-canfd     # RZ/G2H
21              - renesas,r8a7795-canfd      # R-Car H3
22              - renesas,r8a7796-canfd      # R-Car M3-W
23              - renesas,r8a77961-canfd     # R-Car M3-W+
24              - renesas,r8a77965-canfd     # R-Car M3-N
25              - renesas,r8a77970-canfd     # R-Car V3M
26              - renesas,r8a77980-canfd     # R-Car V3H
27              - renesas,r8a77990-canfd     # R-Car E3
28              - renesas,r8a77995-canfd     # R-Car D3
29          - const: renesas,rcar-gen3-canfd # R-Car Gen3 and RZ/G2
30
31      - items:
32          - enum:
33              - renesas,r8a779a0-canfd     # R-Car V3U
34              - renesas,r8a779g0-canfd     # R-Car V4H
35              - renesas,r8a779h0-canfd     # R-Car V4M
36          - const: renesas,rcar-gen4-canfd # R-Car Gen4
37
38      - items:
39          - enum:
40              - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five
41              - renesas,r9a07g044-canfd    # RZ/G2{L,LC}
42              - renesas,r9a07g054-canfd    # RZ/V2L
43          - const: renesas,rzg2l-canfd     # RZ/G2L family
44
45      - const: renesas,r9a09g047-canfd     # RZ/G3E
46
47  reg:
48    maxItems: 1
49
50  interrupts:
51    oneOf:
52      - items:
53          - description: Channel interrupt
54          - description: Global interrupt
55      - items:
56          - description: CAN global error interrupt
57          - description: CAN receive FIFO interrupt
58          - description: CAN0 error interrupt
59          - description: CAN0 transmit interrupt
60          - description: CAN0 transmit/receive FIFO receive completion interrupt
61          - description: CAN1 error interrupt
62          - description: CAN1 transmit interrupt
63          - description: CAN1 transmit/receive FIFO receive completion interrupt
64          - description: CAN2 error interrupt
65          - description: CAN2 transmit interrupt
66          - description: CAN2 transmit/receive FIFO receive completion interrupt
67          - description: CAN3 error interrupt
68          - description: CAN3 transmit interrupt
69          - description: CAN3 transmit/receive FIFO receive completion interrupt
70          - description: CAN4 error interrupt
71          - description: CAN4 transmit interrupt
72          - description: CAN4 transmit/receive FIFO receive completion interrupt
73          - description: CAN5 error interrupt
74          - description: CAN5 transmit interrupt
75          - description: CAN5 transmit/receive FIFO receive completion interrupt
76        minItems: 8
77
78  interrupt-names:
79    oneOf:
80      - items:
81          - const: ch_int
82          - const: g_int
83      - items:
84          - const: g_err
85          - const: g_recc
86          - const: ch0_err
87          - const: ch0_rec
88          - const: ch0_trx
89          - const: ch1_err
90          - const: ch1_rec
91          - const: ch1_trx
92          - const: ch2_err
93          - const: ch2_rec
94          - const: ch2_trx
95          - const: ch3_err
96          - const: ch3_rec
97          - const: ch3_trx
98          - const: ch4_err
99          - const: ch4_rec
100          - const: ch4_trx
101          - const: ch5_err
102          - const: ch5_rec
103          - const: ch5_trx
104        minItems: 8
105
106  clocks:
107    maxItems: 3
108
109  clock-names:
110    oneOf:
111      - items:
112          - const: fck
113          - const: canfd
114          - const: can_clk
115      - items:
116          - const: fck
117          - const: ram_clk
118          - const: can_clk
119
120  power-domains:
121    maxItems: 1
122
123  resets: true
124
125  renesas,no-can-fd:
126    $ref: /schemas/types.yaml#/definitions/flag
127    description:
128      The controller can operate in either CAN FD only mode (default) or
129      Classical CAN only mode.  The mode is global to all channels.
130      Specify this property to put the controller in Classical CAN only mode.
131
132  assigned-clocks:
133    description:
134      Reference to the CANFD clock.  The CANFD clock is a div6 clock and can be
135      used by both CAN (if present) and CAN FD controllers at the same time.
136      It needs to be scaled to maximum frequency if any of these controllers
137      use it.
138
139  assigned-clock-rates:
140    description: Maximum frequency of the CANFD clock.
141
142patternProperties:
143  "^channel[0-7]$":
144    type: object
145    description:
146      The controller supports multiple channels and each is represented as a
147      child node.  Each channel can be enabled/disabled individually.
148
149    properties:
150      phys:
151        maxItems: 1
152
153    additionalProperties: false
154
155required:
156  - compatible
157  - reg
158  - interrupts
159  - interrupt-names
160  - clocks
161  - clock-names
162  - power-domains
163  - resets
164  - assigned-clocks
165  - assigned-clock-rates
166  - channel0
167  - channel1
168
169allOf:
170  - $ref: can-controller.yaml#
171
172  - if:
173      properties:
174        compatible:
175          contains:
176            enum:
177              - renesas,rzg2l-canfd
178    then:
179      properties:
180        interrupts:
181          maxItems: 8
182
183        interrupt-names:
184          maxItems: 8
185
186        resets:
187          minItems: 2
188          maxItems: 2
189
190        reset-names:
191          minItems: 2
192          maxItems: 2
193
194      required:
195        - reset-names
196
197  - if:
198      properties:
199        compatible:
200          contains:
201            enum:
202              - renesas,rcar-gen3-canfd
203              - renesas,rcar-gen4-canfd
204    then:
205      properties:
206        interrupts:
207          minItems: 2
208          maxItems: 2
209
210        interrupt-names:
211          minItems: 2
212          maxItems: 2
213
214        resets:
215          maxItems: 1
216
217  - if:
218      properties:
219        compatible:
220          contains:
221            const: renesas,r9a09g047-canfd
222    then:
223      properties:
224        interrupts:
225          minItems: 20
226
227        interrupt-names:
228          minItems: 20
229
230        resets:
231          minItems: 2
232          maxItems: 2
233
234        reset-names:
235          minItems: 2
236          maxItems: 2
237
238      required:
239        - reset-names
240
241  - if:
242      properties:
243        compatible:
244          contains:
245            enum:
246              - renesas,rcar-gen3-canfd
247              - renesas,rzg2l-canfd
248    then:
249      patternProperties:
250        "^channel[2-7]$": false
251
252  - if:
253      properties:
254        compatible:
255          contains:
256            const: renesas,r8a779h0-canfd
257    then:
258      patternProperties:
259        "^channel[4-7]$": false
260
261  - if:
262      properties:
263        compatible:
264          contains:
265            const: renesas,r9a09g047-canfd
266    then:
267      patternProperties:
268        "^channel[6-7]$": false
269
270unevaluatedProperties: false
271
272examples:
273  - |
274    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
275    #include <dt-bindings/interrupt-controller/arm-gic.h>
276    #include <dt-bindings/power/r8a7795-sysc.h>
277
278    canfd: can@e66c0000 {
279            compatible = "renesas,r8a7795-canfd",
280                         "renesas,rcar-gen3-canfd";
281            reg = <0xe66c0000 0x8000>;
282            interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
283                         <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
284            interrupt-names = "ch_int", "g_int";
285            clocks = <&cpg CPG_MOD 914>,
286                     <&cpg CPG_CORE R8A7795_CLK_CANFD>,
287                     <&can_clk>;
288            clock-names = "fck", "canfd", "can_clk";
289            assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
290            assigned-clock-rates = <40000000>;
291            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
292            resets = <&cpg 914>;
293
294            channel0 {
295            };
296
297            channel1 {
298            };
299    };
300