1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas SDHI SD/MMC controller
8
9maintainers:
10  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - renesas,sdhi-mmc-r8a77470 # RZ/G1C
17          - renesas,sdhi-r7s72100 # RZ/A1H
18          - renesas,sdhi-r7s9210 # SH-Mobile AG5
19          - renesas,sdhi-r8a73a4 # R-Mobile APE6
20          - renesas,sdhi-r8a7740 # R-Mobile A1
21          - renesas,sdhi-r9a09g057 # RZ/V2H(P)
22          - renesas,sdhi-sh73a0  # R-Mobile APE6
23      - items:
24          - enum:
25              - renesas,sdhi-r8a7778 # R-Car M1
26              - renesas,sdhi-r8a7779 # R-Car H1
27          - const: renesas,rcar-gen1-sdhi # R-Car Gen1
28      - items:
29          - enum:
30              - renesas,sdhi-r8a7742  # RZ/G1H
31              - renesas,sdhi-r8a7743  # RZ/G1M
32              - renesas,sdhi-r8a7744  # RZ/G1N
33              - renesas,sdhi-r8a7745  # RZ/G1E
34              - renesas,sdhi-r8a77470 # RZ/G1C
35              - renesas,sdhi-r8a7790  # R-Car H2
36              - renesas,sdhi-r8a7791  # R-Car M2-W
37              - renesas,sdhi-r8a7792  # R-Car V2H
38              - renesas,sdhi-r8a7793  # R-Car M2-N
39              - renesas,sdhi-r8a7794  # R-Car E2
40          - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
41      - items:
42          - enum:
43              - renesas,sdhi-r8a774a1  # RZ/G2M
44              - renesas,sdhi-r8a774b1  # RZ/G2N
45              - renesas,sdhi-r8a774c0  # RZ/G2E
46              - renesas,sdhi-r8a774e1  # RZ/G2H
47              - renesas,sdhi-r8a7795   # R-Car H3
48              - renesas,sdhi-r8a7796   # R-Car M3-W
49              - renesas,sdhi-r8a77961  # R-Car M3-W+
50              - renesas,sdhi-r8a77965  # R-Car M3-N
51              - renesas,sdhi-r8a77970  # R-Car V3M
52              - renesas,sdhi-r8a77980  # R-Car V3H
53              - renesas,sdhi-r8a77990  # R-Car E3
54              - renesas,sdhi-r8a77995  # R-Car D3
55          - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
56      - items:
57          - enum:
58              - renesas,sdhi-r8a779a0  # R-Car V3U
59              - renesas,sdhi-r8a779f0  # R-Car S4-8
60              - renesas,sdhi-r8a779g0  # R-Car V4H
61              - renesas,sdhi-r8a779h0  # R-Car V4M
62          - const: renesas,rcar-gen4-sdhi # R-Car Gen4
63      - items:
64          - enum:
65              - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five
66              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
67              - renesas,sdhi-r9a07g054 # RZ/V2L
68              - renesas,sdhi-r9a08g045 # RZ/G3S
69              - renesas,sdhi-r9a09g011 # RZ/V2M
70          - const: renesas,rzg2l-sdhi
71      - items:
72          - enum:
73              - renesas,sdhi-r9a09g047 # RZ/G3E
74              - renesas,sdhi-r9a09g056 # RZ/V2N
75          - const: renesas,sdhi-r9a09g057 # RZ/V2H(P)
76
77  reg:
78    maxItems: 1
79
80  interrupts:
81    minItems: 1
82    maxItems: 3
83
84  clocks:
85    minItems: 1
86    maxItems: 4
87
88  clock-names:
89    minItems: 1
90    maxItems: 4
91
92  dmas:
93    minItems: 4
94    maxItems: 4
95
96  dma-names:
97    minItems: 4
98    maxItems: 4
99    items:
100      enum:
101        - tx
102        - rx
103
104  iommus:
105    maxItems: 1
106
107  power-domains:
108    maxItems: 1
109
110  resets:
111    maxItems: 1
112
113  pinctrl-0:
114    minItems: 1
115    maxItems: 2
116
117  pinctrl-1:
118    maxItems: 1
119
120  pinctrl-names: true
121
122  max-frequency: true
123
124allOf:
125  - $ref: mmc-controller.yaml
126
127  - if:
128      properties:
129        compatible:
130          contains:
131            enum:
132              - renesas,sdhi-r9a09g057
133              - renesas,rzg2l-sdhi
134    then:
135      properties:
136        clocks:
137          items:
138            - description: IMCLK, SDHI channel main clock1.
139            - description: CLK_HS, SDHI channel High speed clock which operates
140                           4 times that of SDHI channel main clock1.
141            - description: IMCLK2, SDHI channel main clock2. When this clock is
142                           turned off, external SD card detection cannot be
143                           detected.
144            - description: ACLK, SDHI channel bus clock.
145        clock-names:
146          items:
147            - const: core
148            - const: clkh
149            - const: cd
150            - const: aclk
151      required:
152        - clock-names
153        - resets
154    else:
155      if:
156        properties:
157          compatible:
158            contains:
159              enum:
160                - renesas,rcar-gen2-sdhi
161                - renesas,rcar-gen3-sdhi
162                - renesas,rcar-gen4-sdhi
163      then:
164        properties:
165          clocks:
166            minItems: 1
167            maxItems: 3
168          clock-names:
169            minItems: 1
170            uniqueItems: true
171            items:
172              - const: core
173              - enum: [ clkh, cd ]
174              - const: cd
175      else:
176        properties:
177          clocks:
178            minItems: 1
179            maxItems: 2
180          clock-names:
181            minItems: 1
182            items:
183              - const: core
184              - const: cd
185
186  - if:
187      properties:
188        compatible:
189          contains:
190            const: renesas,sdhi-mmc-r8a77470
191    then:
192      properties:
193        pinctrl-names:
194          items:
195            - const: state_uhs
196    else:
197      properties:
198        pinctrl-names:
199          minItems: 1
200          items:
201            - const: default
202            - const: state_uhs
203
204  - if:
205      properties:
206        compatible:
207          contains:
208            enum:
209              - renesas,sdhi-r7s72100
210              - renesas,sdhi-r7s9210
211    then:
212      required:
213        - clock-names
214      description:
215        The internal card detection logic that exists in these controllers is
216        sectioned off to be run by a separate second clock source to allow
217        the main core clock to be turned off to save power.
218
219  - if:
220      properties:
221        compatible:
222          contains:
223            const: renesas,sdhi-r9a09g057
224    then:
225      properties:
226        vqmmc-regulator:
227          type: object
228          description: VQMMC SD regulator
229          $ref: /schemas/regulator/regulator.yaml#
230          unevaluatedProperties: false
231
232required:
233  - compatible
234  - reg
235  - interrupts
236  - clocks
237  - power-domains
238
239unevaluatedProperties: false
240
241examples:
242  - |
243    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
244    #include <dt-bindings/interrupt-controller/arm-gic.h>
245    #include <dt-bindings/power/r8a7790-sysc.h>
246
247    sdhi0: mmc@ee100000 {
248            compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
249            reg = <0xee100000 0x328>;
250            interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
251            clocks = <&cpg CPG_MOD 314>;
252            dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
253            dma-names = "tx", "rx", "tx", "rx";
254            max-frequency = <195000000>;
255            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
256            resets = <&cpg 314>;
257    };
258
259    sdhi1: mmc@ee120000 {
260             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
261             reg = <0xee120000 0x328>;
262             interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
263             clocks = <&cpg CPG_MOD 313>;
264             dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
265             dma-names = "tx", "rx", "tx", "rx";
266             max-frequency = <195000000>;
267             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
268             resets = <&cpg 313>;
269    };
270
271    sdhi2: mmc@ee140000 {
272             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
273             reg = <0xee140000 0x100>;
274             interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
275             clocks = <&cpg CPG_MOD 312>;
276             dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
277             dma-names = "tx", "rx", "tx", "rx";
278             max-frequency = <97500000>;
279             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
280             resets = <&cpg 312>;
281     };
282
283     sdhi3: mmc@ee160000 {
284              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
285              reg = <0xee160000 0x100>;
286              interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
287              clocks = <&cpg CPG_MOD 311>;
288              dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
289              dma-names = "tx", "rx", "tx", "rx";
290              max-frequency = <97500000>;
291              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
292              resets = <&cpg 311>;
293    };
294