1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/leds.h>
18 #include <linux/linkmode.h>
19 #include <linux/netlink.h>
20 #include <linux/mdio.h>
21 #include <linux/mii.h>
22 #include <linux/mii_timestamper.h>
23 #include <linux/module.h>
24 #include <linux/timer.h>
25 #include <linux/workqueue.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/u64_stats_sync.h>
28 #include <linux/irqreturn.h>
29 #include <linux/iopoll.h>
30 #include <linux/refcount.h>
31
32 #include <linux/atomic.h>
33
34 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
35 SUPPORTED_TP | \
36 SUPPORTED_MII)
37
38 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
39 SUPPORTED_10baseT_Full)
40
41 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
42 SUPPORTED_100baseT_Full)
43
44 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
45 SUPPORTED_1000baseT_Full)
46
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
48 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
57
58 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
59 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
60 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
61 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
62 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
63 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
64 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
65 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
66 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
67 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
68
69 extern const int phy_basic_ports_array[3];
70 extern const int phy_fibre_port_array[1];
71 extern const int phy_all_ports_features_array[7];
72 extern const int phy_10_100_features_array[4];
73 extern const int phy_basic_t1_features_array[3];
74 extern const int phy_basic_t1s_p2mp_features_array[2];
75 extern const int phy_gbit_features_array[2];
76 extern const int phy_10gbit_features_array[1];
77
78 /*
79 * Set phydev->irq to PHY_POLL if interrupts are not supported,
80 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
81 * the attached MAC driver handles the interrupt
82 */
83 #define PHY_POLL -1
84 #define PHY_MAC_INTERRUPT -2
85
86 #define PHY_IS_INTERNAL 0x00000001
87 #define PHY_RST_AFTER_CLK_EN 0x00000002
88 #define PHY_POLL_CABLE_TEST 0x00000004
89 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008
90 #define MDIO_DEVICE_IS_PHY 0x80000000
91
92 /**
93 * enum phy_interface_t - Interface Mode definitions
94 *
95 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
96 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
97 * @PHY_INTERFACE_MODE_MII: Media-independent interface
98 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
99 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
100 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
101 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
102 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
103 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
104 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
105 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
106 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
107 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
108 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
109 * @PHY_INTERFACE_MODE_SMII: Serial MII
110 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
111 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
112 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
113 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
114 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
115 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
116 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
117 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
118 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
119 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
120 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
121 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
122 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
123 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
124 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
125 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
126 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
127 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
128 * @PHY_INTERFACE_MODE_MAX: Book keeping
129 *
130 * Describes the interface between the MAC and PHY.
131 */
132 typedef enum {
133 PHY_INTERFACE_MODE_NA,
134 PHY_INTERFACE_MODE_INTERNAL,
135 PHY_INTERFACE_MODE_MII,
136 PHY_INTERFACE_MODE_GMII,
137 PHY_INTERFACE_MODE_SGMII,
138 PHY_INTERFACE_MODE_TBI,
139 PHY_INTERFACE_MODE_REVMII,
140 PHY_INTERFACE_MODE_RMII,
141 PHY_INTERFACE_MODE_REVRMII,
142 PHY_INTERFACE_MODE_RGMII,
143 PHY_INTERFACE_MODE_RGMII_ID,
144 PHY_INTERFACE_MODE_RGMII_RXID,
145 PHY_INTERFACE_MODE_RGMII_TXID,
146 PHY_INTERFACE_MODE_RTBI,
147 PHY_INTERFACE_MODE_SMII,
148 PHY_INTERFACE_MODE_XGMII,
149 PHY_INTERFACE_MODE_XLGMII,
150 PHY_INTERFACE_MODE_MOCA,
151 PHY_INTERFACE_MODE_PSGMII,
152 PHY_INTERFACE_MODE_QSGMII,
153 PHY_INTERFACE_MODE_TRGMII,
154 PHY_INTERFACE_MODE_100BASEX,
155 PHY_INTERFACE_MODE_1000BASEX,
156 PHY_INTERFACE_MODE_2500BASEX,
157 PHY_INTERFACE_MODE_5GBASER,
158 PHY_INTERFACE_MODE_RXAUI,
159 PHY_INTERFACE_MODE_XAUI,
160 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
161 PHY_INTERFACE_MODE_10GBASER,
162 PHY_INTERFACE_MODE_25GBASER,
163 PHY_INTERFACE_MODE_USXGMII,
164 /* 10GBASE-KR - with Clause 73 AN */
165 PHY_INTERFACE_MODE_10GKR,
166 PHY_INTERFACE_MODE_QUSGMII,
167 PHY_INTERFACE_MODE_1000BASEKX,
168 PHY_INTERFACE_MODE_MAX,
169 } phy_interface_t;
170
171 /* PHY interface mode bitmap handling */
172 #define DECLARE_PHY_INTERFACE_MASK(name) \
173 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
174
phy_interface_zero(unsigned long * intf)175 static inline void phy_interface_zero(unsigned long *intf)
176 {
177 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
178 }
179
phy_interface_empty(const unsigned long * intf)180 static inline bool phy_interface_empty(const unsigned long *intf)
181 {
182 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
183 }
184
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)185 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
186 const unsigned long *b)
187 {
188 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
189 }
190
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)191 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
192 const unsigned long *b)
193 {
194 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
195 }
196
phy_interface_set_rgmii(unsigned long * intf)197 static inline void phy_interface_set_rgmii(unsigned long *intf)
198 {
199 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
200 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
201 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
202 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
203 }
204
205 /*
206 * phy_supported_speeds - return all speeds currently supported by a PHY device
207 */
208 unsigned int phy_supported_speeds(struct phy_device *phy,
209 unsigned int *speeds,
210 unsigned int size);
211
212 /**
213 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
214 * @interface: enum phy_interface_t value
215 *
216 * Description: maps enum &phy_interface_t defined in this file
217 * into the device tree binding of 'phy-mode', so that Ethernet
218 * device driver can get PHY interface from device tree.
219 */
phy_modes(phy_interface_t interface)220 static inline const char *phy_modes(phy_interface_t interface)
221 {
222 switch (interface) {
223 case PHY_INTERFACE_MODE_NA:
224 return "";
225 case PHY_INTERFACE_MODE_INTERNAL:
226 return "internal";
227 case PHY_INTERFACE_MODE_MII:
228 return "mii";
229 case PHY_INTERFACE_MODE_GMII:
230 return "gmii";
231 case PHY_INTERFACE_MODE_SGMII:
232 return "sgmii";
233 case PHY_INTERFACE_MODE_TBI:
234 return "tbi";
235 case PHY_INTERFACE_MODE_REVMII:
236 return "rev-mii";
237 case PHY_INTERFACE_MODE_RMII:
238 return "rmii";
239 case PHY_INTERFACE_MODE_REVRMII:
240 return "rev-rmii";
241 case PHY_INTERFACE_MODE_RGMII:
242 return "rgmii";
243 case PHY_INTERFACE_MODE_RGMII_ID:
244 return "rgmii-id";
245 case PHY_INTERFACE_MODE_RGMII_RXID:
246 return "rgmii-rxid";
247 case PHY_INTERFACE_MODE_RGMII_TXID:
248 return "rgmii-txid";
249 case PHY_INTERFACE_MODE_RTBI:
250 return "rtbi";
251 case PHY_INTERFACE_MODE_SMII:
252 return "smii";
253 case PHY_INTERFACE_MODE_XGMII:
254 return "xgmii";
255 case PHY_INTERFACE_MODE_XLGMII:
256 return "xlgmii";
257 case PHY_INTERFACE_MODE_MOCA:
258 return "moca";
259 case PHY_INTERFACE_MODE_PSGMII:
260 return "psgmii";
261 case PHY_INTERFACE_MODE_QSGMII:
262 return "qsgmii";
263 case PHY_INTERFACE_MODE_TRGMII:
264 return "trgmii";
265 case PHY_INTERFACE_MODE_1000BASEX:
266 return "1000base-x";
267 case PHY_INTERFACE_MODE_1000BASEKX:
268 return "1000base-kx";
269 case PHY_INTERFACE_MODE_2500BASEX:
270 return "2500base-x";
271 case PHY_INTERFACE_MODE_5GBASER:
272 return "5gbase-r";
273 case PHY_INTERFACE_MODE_RXAUI:
274 return "rxaui";
275 case PHY_INTERFACE_MODE_XAUI:
276 return "xaui";
277 case PHY_INTERFACE_MODE_10GBASER:
278 return "10gbase-r";
279 case PHY_INTERFACE_MODE_25GBASER:
280 return "25gbase-r";
281 case PHY_INTERFACE_MODE_USXGMII:
282 return "usxgmii";
283 case PHY_INTERFACE_MODE_10GKR:
284 return "10gbase-kr";
285 case PHY_INTERFACE_MODE_100BASEX:
286 return "100base-x";
287 case PHY_INTERFACE_MODE_QUSGMII:
288 return "qusgmii";
289 default:
290 return "unknown";
291 }
292 }
293
294 #define PHY_INIT_TIMEOUT 100000
295 #define PHY_FORCE_TIMEOUT 10
296
297 #define PHY_MAX_ADDR 32
298
299 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
300 #define PHY_ID_FMT "%s:%02x"
301
302 #define MII_BUS_ID_SIZE 61
303
304 struct device;
305 struct kernel_hwtstamp_config;
306 struct phylink;
307 struct sfp_bus;
308 struct sfp_upstream_ops;
309 struct sk_buff;
310
311 /**
312 * struct mdio_bus_stats - Statistics counters for MDIO busses
313 * @transfers: Total number of transfers, i.e. @writes + @reads
314 * @errors: Number of MDIO transfers that returned an error
315 * @writes: Number of write transfers
316 * @reads: Number of read transfers
317 * @syncp: Synchronisation for incrementing statistics
318 */
319 struct mdio_bus_stats {
320 u64_stats_t transfers;
321 u64_stats_t errors;
322 u64_stats_t writes;
323 u64_stats_t reads;
324 /* Must be last, add new statistics above */
325 struct u64_stats_sync syncp;
326 };
327
328 /**
329 * struct phy_package_shared - Shared information in PHY packages
330 * @base_addr: Base PHY address of PHY package used to combine PHYs
331 * in one package and for offset calculation of phy_package_read/write
332 * @refcnt: Number of PHYs connected to this shared data
333 * @flags: Initialization of PHY package
334 * @priv_size: Size of the shared private data @priv
335 * @priv: Driver private data shared across a PHY package
336 *
337 * Represents a shared structure between different phydev's in the same
338 * package, for example a quad PHY. See phy_package_join() and
339 * phy_package_leave().
340 */
341 struct phy_package_shared {
342 u8 base_addr;
343 refcount_t refcnt;
344 unsigned long flags;
345 size_t priv_size;
346
347 /* private data pointer */
348 /* note that this pointer is shared between different phydevs and
349 * the user has to take care of appropriate locking. It is allocated
350 * and freed automatically by phy_package_join() and
351 * phy_package_leave().
352 */
353 void *priv;
354 };
355
356 /* used as bit number in atomic bitops */
357 #define PHY_SHARED_F_INIT_DONE 0
358 #define PHY_SHARED_F_PROBE_DONE 1
359
360 /**
361 * struct mii_bus - Represents an MDIO bus
362 *
363 * @owner: Who owns this device
364 * @name: User friendly name for this MDIO device, or driver name
365 * @id: Unique identifier for this bus, typical from bus hierarchy
366 * @priv: Driver private data
367 *
368 * The Bus class for PHYs. Devices which provide access to
369 * PHYs should register using this structure
370 */
371 struct mii_bus {
372 struct module *owner;
373 const char *name;
374 char id[MII_BUS_ID_SIZE];
375 void *priv;
376 /** @read: Perform a read transfer on the bus */
377 int (*read)(struct mii_bus *bus, int addr, int regnum);
378 /** @write: Perform a write transfer on the bus */
379 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
380 /** @read_c45: Perform a C45 read transfer on the bus */
381 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
382 /** @write_c45: Perform a C45 write transfer on the bus */
383 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
384 int regnum, u16 val);
385 /** @reset: Perform a reset of the bus */
386 int (*reset)(struct mii_bus *bus);
387
388 /** @stats: Statistic counters per device on the bus */
389 struct mdio_bus_stats stats[PHY_MAX_ADDR];
390
391 /**
392 * @mdio_lock: A lock to ensure that only one thing can read/write
393 * the MDIO bus at a time
394 */
395 struct mutex mdio_lock;
396
397 /** @parent: Parent device of this bus */
398 struct device *parent;
399 /** @state: State of bus structure */
400 enum {
401 MDIOBUS_ALLOCATED = 1,
402 MDIOBUS_REGISTERED,
403 MDIOBUS_UNREGISTERED,
404 MDIOBUS_RELEASED,
405 } state;
406
407 /** @dev: Kernel device representation */
408 struct device dev;
409
410 /** @mdio_map: list of all MDIO devices on bus */
411 struct mdio_device *mdio_map[PHY_MAX_ADDR];
412
413 /** @phy_mask: PHY addresses to be ignored when probing */
414 u32 phy_mask;
415
416 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
417 u32 phy_ignore_ta_mask;
418
419 /**
420 * @irq: An array of interrupts, each PHY's interrupt at the index
421 * matching its address
422 */
423 int irq[PHY_MAX_ADDR];
424
425 /** @reset_delay_us: GPIO reset pulse width in microseconds */
426 int reset_delay_us;
427 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
428 int reset_post_delay_us;
429 /** @reset_gpiod: Reset GPIO descriptor pointer */
430 struct gpio_desc *reset_gpiod;
431
432 /** @shared_lock: protect access to the shared element */
433 struct mutex shared_lock;
434
435 /** @shared: shared state across different PHYs */
436 struct phy_package_shared *shared[PHY_MAX_ADDR];
437 };
438 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
439
440 struct mii_bus *mdiobus_alloc_size(size_t size);
441
442 /**
443 * mdiobus_alloc - Allocate an MDIO bus structure
444 *
445 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
446 * for the driver to register the bus.
447 */
mdiobus_alloc(void)448 static inline struct mii_bus *mdiobus_alloc(void)
449 {
450 return mdiobus_alloc_size(0);
451 }
452
453 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
454 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
455 struct module *owner);
456 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
457 #define devm_mdiobus_register(dev, bus) \
458 __devm_mdiobus_register(dev, bus, THIS_MODULE)
459
460 void mdiobus_unregister(struct mii_bus *bus);
461 void mdiobus_free(struct mii_bus *bus);
462 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)463 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
464 {
465 return devm_mdiobus_alloc_size(dev, 0);
466 }
467
468 struct mii_bus *mdio_find_bus(const char *mdio_name);
469 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
470
471 #define PHY_INTERRUPT_DISABLED false
472 #define PHY_INTERRUPT_ENABLED true
473
474 /**
475 * enum phy_state - PHY state machine states:
476 *
477 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
478 * should be called if and only if the PHY is in this state,
479 * given that the PHY device exists.
480 * - PHY driver probe function will set the state to @PHY_READY
481 *
482 * @PHY_READY: PHY is ready to send and receive packets, but the
483 * controller is not. By default, PHYs which do not implement
484 * probe will be set to this state by phy_probe().
485 * - start will set the state to UP
486 *
487 * @PHY_UP: The PHY and attached device are ready to do work.
488 * Interrupts should be started here.
489 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
490 *
491 * @PHY_NOLINK: PHY is up, but not currently plugged in.
492 * - irq or timer will set @PHY_RUNNING if link comes back
493 * - phy_stop moves to @PHY_HALTED
494 *
495 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
496 * and/or receiving packets
497 * - irq or timer will set @PHY_NOLINK if link goes down
498 * - phy_stop moves to @PHY_HALTED
499 *
500 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
501 * is not expected to work, carrier will be indicated as down. PHY will be
502 * poll once per second, or on interrupt for it current state.
503 * Once complete, move to UP to restart the PHY.
504 * - phy_stop aborts the running test and moves to @PHY_HALTED
505 *
506 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
507 * - phy_start moves to @PHY_UP
508 *
509 * @PHY_ERROR: PHY is up, but is in an error state.
510 * - phy_stop moves to @PHY_HALTED
511 */
512 enum phy_state {
513 PHY_DOWN = 0,
514 PHY_READY,
515 PHY_HALTED,
516 PHY_ERROR,
517 PHY_UP,
518 PHY_RUNNING,
519 PHY_NOLINK,
520 PHY_CABLETEST,
521 };
522
523 #define MDIO_MMD_NUM 32
524
525 /**
526 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
527 * @devices_in_package: IEEE 802.3 devices in package register value.
528 * @mmds_present: bit vector of MMDs present.
529 * @device_ids: The device identifer for each present device.
530 */
531 struct phy_c45_device_ids {
532 u32 devices_in_package;
533 u32 mmds_present;
534 u32 device_ids[MDIO_MMD_NUM];
535 };
536
537 struct macsec_context;
538 struct macsec_ops;
539
540 /**
541 * struct phy_device - An instance of a PHY
542 *
543 * @mdio: MDIO bus this PHY is on
544 * @drv: Pointer to the driver for this PHY instance
545 * @devlink: Create a link between phy dev and mac dev, if the external phy
546 * used by current mac interface is managed by another mac interface.
547 * @phy_id: UID for this device found during discovery
548 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
549 * @is_c45: Set to true if this PHY uses clause 45 addressing.
550 * @is_internal: Set to true if this PHY is internal to a MAC.
551 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
552 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
553 * @has_fixups: Set to true if this PHY has fixups/quirks.
554 * @suspended: Set to true if this PHY has been suspended successfully.
555 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
556 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
557 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
558 * @downshifted_rate: Set true if link speed has been downshifted.
559 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
560 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
561 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
562 * enabled.
563 * @state: State of the PHY for management purposes
564 * @dev_flags: Device-specific flags used by the PHY driver.
565 *
566 * - Bits [15:0] are free to use by the PHY driver to communicate
567 * driver specific behavior.
568 * - Bits [23:16] are currently reserved for future use.
569 * - Bits [31:24] are reserved for defining generic
570 * PHY driver behavior.
571 * @irq: IRQ number of the PHY's interrupt (-1 if none)
572 * @phylink: Pointer to phylink instance for this PHY
573 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
574 * @sfp_bus: SFP bus attached to this PHY's fiber port
575 * @attached_dev: The attached enet driver's device instance ptr
576 * @adjust_link: Callback for the enet controller to respond to changes: in the
577 * link state.
578 * @phy_link_change: Callback for phylink for notification of link change
579 * @macsec_ops: MACsec offloading ops.
580 *
581 * @speed: Current link speed
582 * @duplex: Current duplex
583 * @port: Current port
584 * @pause: Current pause
585 * @asym_pause: Current asymmetric pause
586 * @supported: Combined MAC/PHY supported linkmodes
587 * @advertising: Currently advertised linkmodes
588 * @adv_old: Saved advertised while power saving for WoL
589 * @supported_eee: supported PHY EEE linkmodes
590 * @advertising_eee: Currently advertised EEE linkmodes
591 * @eee_enabled: Flag indicating whether the EEE feature is enabled
592 * @lp_advertising: Current link partner advertised linkmodes
593 * @host_interfaces: PHY interface modes supported by host
594 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
595 * @autoneg: Flag autoneg being used
596 * @rate_matching: Current rate matching mode
597 * @link: Current link state
598 * @autoneg_complete: Flag auto negotiation of the link has completed
599 * @mdix: Current crossover
600 * @mdix_ctrl: User setting of crossover
601 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
602 * @interrupts: Flag interrupts have been enabled
603 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
604 * handling shall be postponed until PHY has resumed
605 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
606 * requiring a rerun of the interrupt handler after resume
607 * @interface: enum phy_interface_t value
608 * @possible_interfaces: bitmap if interface modes that the attached PHY
609 * will switch between depending on media speed.
610 * @skb: Netlink message for cable diagnostics
611 * @nest: Netlink nest used for cable diagnostics
612 * @ehdr: nNtlink header for cable diagnostics
613 * @phy_led_triggers: Array of LED triggers
614 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
615 * @led_link_trigger: LED trigger for link up/down
616 * @last_triggered: last LED trigger for link speed
617 * @leds: list of PHY LED structures
618 * @master_slave_set: User requested master/slave configuration
619 * @master_slave_get: Current master/slave advertisement
620 * @master_slave_state: Current master/slave configuration
621 * @mii_ts: Pointer to time stamper callbacks
622 * @psec: Pointer to Power Sourcing Equipment control struct
623 * @lock: Mutex for serialization access to PHY
624 * @state_queue: Work queue for state machine
625 * @link_down_events: Number of times link was lost
626 * @shared: Pointer to private data shared by phys in one package
627 * @priv: Pointer to driver private data
628 *
629 * interrupts currently only supports enabled or disabled,
630 * but could be changed in the future to support enabling
631 * and disabling specific interrupts
632 *
633 * Contains some infrastructure for polling and interrupt
634 * handling, as well as handling shifts in PHY hardware state
635 */
636 struct phy_device {
637 struct mdio_device mdio;
638
639 /* Information about the PHY type */
640 /* And management functions */
641 struct phy_driver *drv;
642
643 struct device_link *devlink;
644
645 u32 phy_id;
646
647 struct phy_c45_device_ids c45_ids;
648 unsigned is_c45:1;
649 unsigned is_internal:1;
650 unsigned is_pseudo_fixed_link:1;
651 unsigned is_gigabit_capable:1;
652 unsigned has_fixups:1;
653 unsigned suspended:1;
654 unsigned suspended_by_mdio_bus:1;
655 unsigned sysfs_links:1;
656 unsigned loopback_enabled:1;
657 unsigned downshifted_rate:1;
658 unsigned is_on_sfp_module:1;
659 unsigned mac_managed_pm:1;
660 unsigned wol_enabled:1;
661
662 unsigned autoneg:1;
663 /* The most recently read link state */
664 unsigned link:1;
665 unsigned autoneg_complete:1;
666
667 /* Interrupts are enabled */
668 unsigned interrupts:1;
669 unsigned irq_suspended:1;
670 unsigned irq_rerun:1;
671
672 int rate_matching;
673
674 enum phy_state state;
675
676 u32 dev_flags;
677
678 phy_interface_t interface;
679 DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
680
681 /*
682 * forced speed & duplex (no autoneg)
683 * partner speed & duplex & pause (autoneg)
684 */
685 int speed;
686 int duplex;
687 int port;
688 int pause;
689 int asym_pause;
690 u8 master_slave_get;
691 u8 master_slave_set;
692 u8 master_slave_state;
693
694 /* Union of PHY and Attached devices' supported link modes */
695 /* See ethtool.h for more info */
696 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
697 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
698 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
699 /* used with phy_speed_down */
700 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
701 /* used for eee validation */
702 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
703 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
704 bool eee_enabled;
705
706 /* Host supported PHY interface types. Should be ignored if empty. */
707 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
708
709 /* Energy efficient ethernet modes which should be prohibited */
710 u32 eee_broken_modes;
711
712 #ifdef CONFIG_LED_TRIGGER_PHY
713 struct phy_led_trigger *phy_led_triggers;
714 unsigned int phy_num_led_triggers;
715 struct phy_led_trigger *last_triggered;
716
717 struct phy_led_trigger *led_link_trigger;
718 #endif
719 struct list_head leds;
720
721 /*
722 * Interrupt number for this PHY
723 * -1 means no interrupt
724 */
725 int irq;
726
727 /* private data pointer */
728 /* For use by PHYs to maintain extra state */
729 void *priv;
730
731 /* shared data pointer */
732 /* For use by PHYs inside the same package that need a shared state. */
733 struct phy_package_shared *shared;
734
735 /* Reporting cable test results */
736 struct sk_buff *skb;
737 void *ehdr;
738 struct nlattr *nest;
739
740 /* Interrupt and Polling infrastructure */
741 struct delayed_work state_queue;
742
743 struct mutex lock;
744
745 /* This may be modified under the rtnl lock */
746 bool sfp_bus_attached;
747 struct sfp_bus *sfp_bus;
748 struct phylink *phylink;
749 struct net_device *attached_dev;
750 struct mii_timestamper *mii_ts;
751 struct pse_control *psec;
752
753 u8 mdix;
754 u8 mdix_ctrl;
755
756 int pma_extable;
757
758 unsigned int link_down_events;
759
760 void (*phy_link_change)(struct phy_device *phydev, bool up);
761 void (*adjust_link)(struct net_device *dev);
762
763 #if IS_ENABLED(CONFIG_MACSEC)
764 /* MACsec management functions */
765 const struct macsec_ops *macsec_ops;
766 #endif
767 };
768
769 /* Generic phy_device::dev_flags */
770 #define PHY_F_NO_IRQ 0x80000000
771
to_phy_device(const struct device * dev)772 static inline struct phy_device *to_phy_device(const struct device *dev)
773 {
774 return container_of(to_mdio_device(dev), struct phy_device, mdio);
775 }
776
777 /**
778 * struct phy_tdr_config - Configuration of a TDR raw test
779 *
780 * @first: Distance for first data collection point
781 * @last: Distance for last data collection point
782 * @step: Step between data collection points
783 * @pair: Bitmap of cable pairs to collect data for
784 *
785 * A structure containing possible configuration parameters
786 * for a TDR cable test. The driver does not need to implement
787 * all the parameters, but should report what is actually used.
788 * All distances are in centimeters.
789 */
790 struct phy_tdr_config {
791 u32 first;
792 u32 last;
793 u32 step;
794 s8 pair;
795 };
796 #define PHY_PAIR_ALL -1
797
798 /**
799 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
800 * Avoidance) Reconciliation Sublayer.
801 *
802 * @version: read-only PLCA register map version. -1 = not available. Ignored
803 * when setting the configuration. Format is the same as reported by the PLCA
804 * IDVER register (31.CA00). -1 = not available.
805 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
806 * set. 0 = disabled, anything else = enabled.
807 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
808 * Allowed values [0 .. 254]. 255 = node disabled.
809 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
810 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
811 * set. Allowed values [1 .. 255].
812 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
813 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
814 * more details. The to_timer shall be set equal over all nodes.
815 * -1 = not available / don't set. Allowed values [0 .. 255].
816 * @burst_cnt: controls how many additional frames a node is allowed to send in
817 * single transmit opportunity (TO). The default value of 0 means that the
818 * node is allowed exactly one frame per TO. A value of 1 allows two frames
819 * per TO, and so on. -1 = not available / don't set.
820 * Allowed values [0 .. 255].
821 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
822 * frame before interrupting the burst. This value should be set to a value
823 * greater than the MAC inter-packet gap (which is typically 96 bits).
824 * -1 = not available / don't set. Allowed values [0 .. 255].
825 *
826 * A structure containing configuration parameters for setting/getting the PLCA
827 * RS configuration. The driver does not need to implement all the parameters,
828 * but should report what is actually used.
829 */
830 struct phy_plca_cfg {
831 int version;
832 int enabled;
833 int node_id;
834 int node_cnt;
835 int to_tmr;
836 int burst_cnt;
837 int burst_tmr;
838 };
839
840 /**
841 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
842 * Avoidance) Reconciliation Sublayer.
843 *
844 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
845 * register(31.CA03), indicating BEACON activity.
846 *
847 * A structure containing status information of the PLCA RS configuration.
848 * The driver does not need to implement all the parameters, but should report
849 * what is actually used.
850 */
851 struct phy_plca_status {
852 bool pst;
853 };
854
855 /**
856 * struct phy_led: An LED driven by the PHY
857 *
858 * @list: List of LEDs
859 * @phydev: PHY this LED is attached to
860 * @led_cdev: Standard LED class structure
861 * @index: Number of the LED
862 */
863 struct phy_led {
864 struct list_head list;
865 struct phy_device *phydev;
866 struct led_classdev led_cdev;
867 u8 index;
868 };
869
870 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
871
872 /**
873 * struct phy_driver - Driver structure for a particular PHY type
874 *
875 * @mdiodrv: Data common to all MDIO devices
876 * @phy_id: The result of reading the UID registers of this PHY
877 * type, and ANDing them with the phy_id_mask. This driver
878 * only works for PHYs with IDs which match this field
879 * @name: The friendly name of this PHY type
880 * @phy_id_mask: Defines the important bits of the phy_id
881 * @features: A mandatory list of features (speed, duplex, etc)
882 * supported by this PHY
883 * @flags: A bitfield defining certain other features this PHY
884 * supports (like interrupts)
885 * @driver_data: Static driver data
886 *
887 * All functions are optional. If config_aneg or read_status
888 * are not implemented, the phy core uses the genphy versions.
889 * Note that none of these functions should be called from
890 * interrupt time. The goal is for the bus read/write functions
891 * to be able to block when the bus transaction is happening,
892 * and be freed up by an interrupt (The MPC85xx has this ability,
893 * though it is not currently supported in the driver).
894 */
895 struct phy_driver {
896 struct mdio_driver_common mdiodrv;
897 u32 phy_id;
898 char *name;
899 u32 phy_id_mask;
900 const unsigned long * const features;
901 u32 flags;
902 const void *driver_data;
903
904 /**
905 * @soft_reset: Called to issue a PHY software reset
906 */
907 int (*soft_reset)(struct phy_device *phydev);
908
909 /**
910 * @config_init: Called to initialize the PHY,
911 * including after a reset
912 */
913 int (*config_init)(struct phy_device *phydev);
914
915 /**
916 * @probe: Called during discovery. Used to set
917 * up device-specific structures, if any
918 */
919 int (*probe)(struct phy_device *phydev);
920
921 /**
922 * @get_features: Probe the hardware to determine what
923 * abilities it has. Should only set phydev->supported.
924 */
925 int (*get_features)(struct phy_device *phydev);
926
927 /**
928 * @get_rate_matching: Get the supported type of rate matching for a
929 * particular phy interface. This is used by phy consumers to determine
930 * whether to advertise lower-speed modes for that interface. It is
931 * assumed that if a rate matching mode is supported on an interface,
932 * then that interface's rate can be adapted to all slower link speeds
933 * supported by the phy. If the interface is not supported, this should
934 * return %RATE_MATCH_NONE.
935 */
936 int (*get_rate_matching)(struct phy_device *phydev,
937 phy_interface_t iface);
938
939 /* PHY Power Management */
940 /** @suspend: Suspend the hardware, saving state if needed */
941 int (*suspend)(struct phy_device *phydev);
942 /** @resume: Resume the hardware, restoring state if needed */
943 int (*resume)(struct phy_device *phydev);
944
945 /**
946 * @config_aneg: Configures the advertisement and resets
947 * autonegotiation if phydev->autoneg is on,
948 * forces the speed to the current settings in phydev
949 * if phydev->autoneg is off
950 */
951 int (*config_aneg)(struct phy_device *phydev);
952
953 /** @aneg_done: Determines the auto negotiation result */
954 int (*aneg_done)(struct phy_device *phydev);
955
956 /** @read_status: Determines the negotiated speed and duplex */
957 int (*read_status)(struct phy_device *phydev);
958
959 /**
960 * @config_intr: Enables or disables interrupts.
961 * It should also clear any pending interrupts prior to enabling the
962 * IRQs and after disabling them.
963 */
964 int (*config_intr)(struct phy_device *phydev);
965
966 /** @handle_interrupt: Override default interrupt handling */
967 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
968
969 /** @remove: Clears up any memory if needed */
970 void (*remove)(struct phy_device *phydev);
971
972 /**
973 * @match_phy_device: Returns true if this is a suitable
974 * driver for the given phydev. If NULL, matching is based on
975 * phy_id and phy_id_mask.
976 */
977 int (*match_phy_device)(struct phy_device *phydev);
978
979 /**
980 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
981 * register changes to enable Wake on LAN, so set_wol is
982 * provided to be called in the ethernet driver's set_wol
983 * function.
984 */
985 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
986
987 /**
988 * @get_wol: See set_wol, but for checking whether Wake on LAN
989 * is enabled.
990 */
991 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
992
993 /**
994 * @link_change_notify: Called to inform a PHY device driver
995 * when the core is about to change the link state. This
996 * callback is supposed to be used as fixup hook for drivers
997 * that need to take action when the link state
998 * changes. Drivers are by no means allowed to mess with the
999 * PHY device structure in their implementations.
1000 */
1001 void (*link_change_notify)(struct phy_device *dev);
1002
1003 /**
1004 * @read_mmd: PHY specific driver override for reading a MMD
1005 * register. This function is optional for PHY specific
1006 * drivers. When not provided, the default MMD read function
1007 * will be used by phy_read_mmd(), which will use either a
1008 * direct read for Clause 45 PHYs or an indirect read for
1009 * Clause 22 PHYs. devnum is the MMD device number within the
1010 * PHY device, regnum is the register within the selected MMD
1011 * device.
1012 */
1013 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1014
1015 /**
1016 * @write_mmd: PHY specific driver override for writing a MMD
1017 * register. This function is optional for PHY specific
1018 * drivers. When not provided, the default MMD write function
1019 * will be used by phy_write_mmd(), which will use either a
1020 * direct write for Clause 45 PHYs, or an indirect write for
1021 * Clause 22 PHYs. devnum is the MMD device number within the
1022 * PHY device, regnum is the register within the selected MMD
1023 * device. val is the value to be written.
1024 */
1025 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1026 u16 val);
1027
1028 /** @read_page: Return the current PHY register page number */
1029 int (*read_page)(struct phy_device *dev);
1030 /** @write_page: Set the current PHY register page number */
1031 int (*write_page)(struct phy_device *dev, int page);
1032
1033 /**
1034 * @module_info: Get the size and type of the eeprom contained
1035 * within a plug-in module
1036 */
1037 int (*module_info)(struct phy_device *dev,
1038 struct ethtool_modinfo *modinfo);
1039
1040 /**
1041 * @module_eeprom: Get the eeprom information from the plug-in
1042 * module
1043 */
1044 int (*module_eeprom)(struct phy_device *dev,
1045 struct ethtool_eeprom *ee, u8 *data);
1046
1047 /** @cable_test_start: Start a cable test */
1048 int (*cable_test_start)(struct phy_device *dev);
1049
1050 /** @cable_test_tdr_start: Start a raw TDR cable test */
1051 int (*cable_test_tdr_start)(struct phy_device *dev,
1052 const struct phy_tdr_config *config);
1053
1054 /**
1055 * @cable_test_get_status: Once per second, or on interrupt,
1056 * request the status of the test.
1057 */
1058 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1059
1060 /* Get statistics from the PHY using ethtool */
1061 /** @get_sset_count: Number of statistic counters */
1062 int (*get_sset_count)(struct phy_device *dev);
1063 /** @get_strings: Names of the statistic counters */
1064 void (*get_strings)(struct phy_device *dev, u8 *data);
1065 /** @get_stats: Return the statistic counter values */
1066 void (*get_stats)(struct phy_device *dev,
1067 struct ethtool_stats *stats, u64 *data);
1068
1069 /* Get and Set PHY tunables */
1070 /** @get_tunable: Return the value of a tunable */
1071 int (*get_tunable)(struct phy_device *dev,
1072 struct ethtool_tunable *tuna, void *data);
1073 /** @set_tunable: Set the value of a tunable */
1074 int (*set_tunable)(struct phy_device *dev,
1075 struct ethtool_tunable *tuna,
1076 const void *data);
1077 /** @set_loopback: Set the loopback mood of the PHY */
1078 int (*set_loopback)(struct phy_device *dev, bool enable);
1079 /** @get_sqi: Get the signal quality indication */
1080 int (*get_sqi)(struct phy_device *dev);
1081 /** @get_sqi_max: Get the maximum signal quality indication */
1082 int (*get_sqi_max)(struct phy_device *dev);
1083
1084 /* PLCA RS interface */
1085 /** @get_plca_cfg: Return the current PLCA configuration */
1086 int (*get_plca_cfg)(struct phy_device *dev,
1087 struct phy_plca_cfg *plca_cfg);
1088 /** @set_plca_cfg: Set the PLCA configuration */
1089 int (*set_plca_cfg)(struct phy_device *dev,
1090 const struct phy_plca_cfg *plca_cfg);
1091 /** @get_plca_status: Return the current PLCA status info */
1092 int (*get_plca_status)(struct phy_device *dev,
1093 struct phy_plca_status *plca_st);
1094
1095 /**
1096 * @led_brightness_set: Set a PHY LED brightness. Index
1097 * indicates which of the PHYs led should be set. Value
1098 * follows the standard LED class meaning, e.g. LED_OFF,
1099 * LED_HALF, LED_FULL.
1100 */
1101 int (*led_brightness_set)(struct phy_device *dev,
1102 u8 index, enum led_brightness value);
1103
1104 /**
1105 * @led_blink_set: Set a PHY LED brightness. Index indicates
1106 * which of the PHYs led should be configured to blink. Delays
1107 * are in milliseconds and if both are zero then a sensible
1108 * default should be chosen. The call should adjust the
1109 * timings in that case and if it can't match the values
1110 * specified exactly.
1111 */
1112 int (*led_blink_set)(struct phy_device *dev, u8 index,
1113 unsigned long *delay_on,
1114 unsigned long *delay_off);
1115 /**
1116 * @led_hw_is_supported: Can the HW support the given rules.
1117 * @dev: PHY device which has the LED
1118 * @index: Which LED of the PHY device
1119 * @rules The core is interested in these rules
1120 *
1121 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1122 */
1123 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1124 unsigned long rules);
1125 /**
1126 * @led_hw_control_set: Set the HW to control the LED
1127 * @dev: PHY device which has the LED
1128 * @index: Which LED of the PHY device
1129 * @rules The rules used to control the LED
1130 *
1131 * Returns 0, or a an error code.
1132 */
1133 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1134 unsigned long rules);
1135 /**
1136 * @led_hw_control_get: Get how the HW is controlling the LED
1137 * @dev: PHY device which has the LED
1138 * @index: Which LED of the PHY device
1139 * @rules Pointer to the rules used to control the LED
1140 *
1141 * Set *@rules to how the HW is currently blinking. Returns 0
1142 * on success, or a error code if the current blinking cannot
1143 * be represented in rules, or some other error happens.
1144 */
1145 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1146 unsigned long *rules);
1147
1148 };
1149 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
1150 struct phy_driver, mdiodrv)
1151
1152 #define PHY_ANY_ID "MATCH ANY PHY"
1153 #define PHY_ANY_UID 0xffffffff
1154
1155 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1156 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1157 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1158
1159 /**
1160 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1161 * @id1: first PHY ID
1162 * @id2: second PHY ID
1163 * @mask: the PHY ID mask, set bits are significant in matching
1164 *
1165 * Return true if the bits from @id1 and @id2 specified by @mask match.
1166 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1167 */
phy_id_compare(u32 id1,u32 id2,u32 mask)1168 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1169 {
1170 return !((id1 ^ id2) & mask);
1171 }
1172
1173 /**
1174 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1175 * @phydev: the PHY device
1176 * @id: the PHY ID to be matched
1177 *
1178 * Compare the @phydev clause 22 ID with the provided @id and return true or
1179 * false depending whether it matches, using the bound driver mask. The
1180 * @phydev must be bound to a driver.
1181 */
phydev_id_compare(struct phy_device * phydev,u32 id)1182 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1183 {
1184 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1185 }
1186
1187 /* A Structure for boards to register fixups with the PHY Lib */
1188 struct phy_fixup {
1189 struct list_head list;
1190 char bus_id[MII_BUS_ID_SIZE + 3];
1191 u32 phy_uid;
1192 u32 phy_uid_mask;
1193 int (*run)(struct phy_device *phydev);
1194 };
1195
1196 const char *phy_speed_to_str(int speed);
1197 const char *phy_duplex_to_str(unsigned int duplex);
1198 const char *phy_rate_matching_to_str(int rate_matching);
1199
1200 int phy_interface_num_ports(phy_interface_t interface);
1201
1202 /* A structure for mapping a particular speed and duplex
1203 * combination to a particular SUPPORTED and ADVERTISED value
1204 */
1205 struct phy_setting {
1206 u32 speed;
1207 u8 duplex;
1208 u8 bit;
1209 };
1210
1211 const struct phy_setting *
1212 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1213 bool exact);
1214 size_t phy_speeds(unsigned int *speeds, size_t size,
1215 unsigned long *mask);
1216 void of_set_phy_supported(struct phy_device *phydev);
1217 void of_set_phy_eee_broken(struct phy_device *phydev);
1218 int phy_speed_down_core(struct phy_device *phydev);
1219
1220 /**
1221 * phy_is_started - Convenience function to check whether PHY is started
1222 * @phydev: The phy_device struct
1223 */
phy_is_started(struct phy_device * phydev)1224 static inline bool phy_is_started(struct phy_device *phydev)
1225 {
1226 return phydev->state >= PHY_UP;
1227 }
1228
1229 void phy_resolve_aneg_pause(struct phy_device *phydev);
1230 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1231 void phy_check_downshift(struct phy_device *phydev);
1232
1233 /**
1234 * phy_read - Convenience function for reading a given PHY register
1235 * @phydev: the phy_device struct
1236 * @regnum: register number to read
1237 *
1238 * NOTE: MUST NOT be called from interrupt context,
1239 * because the bus read/write functions may wait for an interrupt
1240 * to conclude the operation.
1241 */
phy_read(struct phy_device * phydev,u32 regnum)1242 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1243 {
1244 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1245 }
1246
1247 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1248 timeout_us, sleep_before_read) \
1249 ({ \
1250 int __ret, __val; \
1251 __ret = read_poll_timeout(__val = phy_read, val, \
1252 __val < 0 || (cond), \
1253 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1254 if (__val < 0) \
1255 __ret = __val; \
1256 if (__ret) \
1257 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1258 __ret; \
1259 })
1260
1261 /**
1262 * __phy_read - convenience function for reading a given PHY register
1263 * @phydev: the phy_device struct
1264 * @regnum: register number to read
1265 *
1266 * The caller must have taken the MDIO bus lock.
1267 */
__phy_read(struct phy_device * phydev,u32 regnum)1268 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1269 {
1270 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1271 }
1272
1273 /**
1274 * phy_write - Convenience function for writing a given PHY register
1275 * @phydev: the phy_device struct
1276 * @regnum: register number to write
1277 * @val: value to write to @regnum
1278 *
1279 * NOTE: MUST NOT be called from interrupt context,
1280 * because the bus read/write functions may wait for an interrupt
1281 * to conclude the operation.
1282 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1283 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1284 {
1285 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1286 }
1287
1288 /**
1289 * __phy_write - Convenience function for writing a given PHY register
1290 * @phydev: the phy_device struct
1291 * @regnum: register number to write
1292 * @val: value to write to @regnum
1293 *
1294 * The caller must have taken the MDIO bus lock.
1295 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1296 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1297 {
1298 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1299 val);
1300 }
1301
1302 /**
1303 * __phy_modify_changed() - Convenience function for modifying a PHY register
1304 * @phydev: a pointer to a &struct phy_device
1305 * @regnum: register number
1306 * @mask: bit mask of bits to clear
1307 * @set: bit mask of bits to set
1308 *
1309 * Unlocked helper function which allows a PHY register to be modified as
1310 * new register value = (old register value & ~mask) | set
1311 *
1312 * Returns negative errno, 0 if there was no change, and 1 in case of change
1313 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1314 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1315 u16 mask, u16 set)
1316 {
1317 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1318 regnum, mask, set);
1319 }
1320
1321 /*
1322 * phy_read_mmd - Convenience function for reading a register
1323 * from an MMD on a given PHY.
1324 */
1325 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1326
1327 /**
1328 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1329 * condition is met or a timeout occurs
1330 *
1331 * @phydev: The phy_device struct
1332 * @devaddr: The MMD to read from
1333 * @regnum: The register on the MMD to read
1334 * @val: Variable to read the register into
1335 * @cond: Break condition (usually involving @val)
1336 * @sleep_us: Maximum time to sleep between reads in us (0
1337 * tight-loops). Should be less than ~20ms since usleep_range
1338 * is used (see Documentation/timers/timers-howto.rst).
1339 * @timeout_us: Timeout in us, 0 means never timeout
1340 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1341 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1342 * case, the last read value at @args is stored in @val. Must not
1343 * be called from atomic context if sleep_us or timeout_us are used.
1344 */
1345 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1346 sleep_us, timeout_us, sleep_before_read) \
1347 ({ \
1348 int __ret, __val; \
1349 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1350 __val < 0 || (cond), \
1351 sleep_us, timeout_us, sleep_before_read, \
1352 phydev, devaddr, regnum); \
1353 if (__val < 0) \
1354 __ret = __val; \
1355 if (__ret) \
1356 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1357 __ret; \
1358 })
1359
1360 /*
1361 * __phy_read_mmd - Convenience function for reading a register
1362 * from an MMD on a given PHY.
1363 */
1364 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1365
1366 /*
1367 * phy_write_mmd - Convenience function for writing a register
1368 * on an MMD on a given PHY.
1369 */
1370 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1371
1372 /*
1373 * __phy_write_mmd - Convenience function for writing a register
1374 * on an MMD on a given PHY.
1375 */
1376 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1377
1378 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1379 u16 set);
1380 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1381 u16 set);
1382 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1383 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1384
1385 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1386 u16 mask, u16 set);
1387 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1388 u16 mask, u16 set);
1389 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1390 u16 mask, u16 set);
1391 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1392 u16 mask, u16 set);
1393
1394 /**
1395 * __phy_set_bits - Convenience function for setting bits in a PHY register
1396 * @phydev: the phy_device struct
1397 * @regnum: register number to write
1398 * @val: bits to set
1399 *
1400 * The caller must have taken the MDIO bus lock.
1401 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1402 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1403 {
1404 return __phy_modify(phydev, regnum, 0, val);
1405 }
1406
1407 /**
1408 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1409 * @phydev: the phy_device struct
1410 * @regnum: register number to write
1411 * @val: bits to clear
1412 *
1413 * The caller must have taken the MDIO bus lock.
1414 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1415 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1416 u16 val)
1417 {
1418 return __phy_modify(phydev, regnum, val, 0);
1419 }
1420
1421 /**
1422 * phy_set_bits - Convenience function for setting bits in a PHY register
1423 * @phydev: the phy_device struct
1424 * @regnum: register number to write
1425 * @val: bits to set
1426 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1427 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1428 {
1429 return phy_modify(phydev, regnum, 0, val);
1430 }
1431
1432 /**
1433 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1434 * @phydev: the phy_device struct
1435 * @regnum: register number to write
1436 * @val: bits to clear
1437 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1438 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1439 {
1440 return phy_modify(phydev, regnum, val, 0);
1441 }
1442
1443 /**
1444 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1445 * on MMD
1446 * @phydev: the phy_device struct
1447 * @devad: the MMD containing register to modify
1448 * @regnum: register number to modify
1449 * @val: bits to set
1450 *
1451 * The caller must have taken the MDIO bus lock.
1452 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1453 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1454 u32 regnum, u16 val)
1455 {
1456 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1457 }
1458
1459 /**
1460 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1461 * on MMD
1462 * @phydev: the phy_device struct
1463 * @devad: the MMD containing register to modify
1464 * @regnum: register number to modify
1465 * @val: bits to clear
1466 *
1467 * The caller must have taken the MDIO bus lock.
1468 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1469 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1470 u32 regnum, u16 val)
1471 {
1472 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1473 }
1474
1475 /**
1476 * phy_set_bits_mmd - Convenience function for setting bits in a register
1477 * on MMD
1478 * @phydev: the phy_device struct
1479 * @devad: the MMD containing register to modify
1480 * @regnum: register number to modify
1481 * @val: bits to set
1482 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1483 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1484 u32 regnum, u16 val)
1485 {
1486 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1487 }
1488
1489 /**
1490 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1491 * on MMD
1492 * @phydev: the phy_device struct
1493 * @devad: the MMD containing register to modify
1494 * @regnum: register number to modify
1495 * @val: bits to clear
1496 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1497 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1498 u32 regnum, u16 val)
1499 {
1500 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1501 }
1502
1503 /**
1504 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1505 * @phydev: the phy_device struct
1506 *
1507 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1508 * PHY_MAC_INTERRUPT
1509 */
phy_interrupt_is_valid(struct phy_device * phydev)1510 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1511 {
1512 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1513 }
1514
1515 /**
1516 * phy_polling_mode - Convenience function for testing whether polling is
1517 * used to detect PHY status changes
1518 * @phydev: the phy_device struct
1519 */
phy_polling_mode(struct phy_device * phydev)1520 static inline bool phy_polling_mode(struct phy_device *phydev)
1521 {
1522 if (phydev->state == PHY_CABLETEST)
1523 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1524 return true;
1525
1526 return phydev->irq == PHY_POLL;
1527 }
1528
1529 /**
1530 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1531 * @phydev: the phy_device struct
1532 */
phy_has_hwtstamp(struct phy_device * phydev)1533 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1534 {
1535 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1536 }
1537
1538 /**
1539 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1540 * @phydev: the phy_device struct
1541 */
phy_has_rxtstamp(struct phy_device * phydev)1542 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1543 {
1544 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1545 }
1546
1547 /**
1548 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1549 * PTP hardware clock capabilities.
1550 * @phydev: the phy_device struct
1551 */
phy_has_tsinfo(struct phy_device * phydev)1552 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1553 {
1554 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1555 }
1556
1557 /**
1558 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1559 * @phydev: the phy_device struct
1560 */
phy_has_txtstamp(struct phy_device * phydev)1561 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1562 {
1563 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1564 }
1565
phy_hwtstamp(struct phy_device * phydev,struct kernel_hwtstamp_config * cfg,struct netlink_ext_ack * extack)1566 static inline int phy_hwtstamp(struct phy_device *phydev,
1567 struct kernel_hwtstamp_config *cfg,
1568 struct netlink_ext_ack *extack)
1569 {
1570 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1571 }
1572
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1573 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1574 int type)
1575 {
1576 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1577 }
1578
phy_ts_info(struct phy_device * phydev,struct ethtool_ts_info * tsinfo)1579 static inline int phy_ts_info(struct phy_device *phydev,
1580 struct ethtool_ts_info *tsinfo)
1581 {
1582 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1583 }
1584
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1585 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1586 int type)
1587 {
1588 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1589 }
1590
1591 /**
1592 * phy_is_internal - Convenience function for testing if a PHY is internal
1593 * @phydev: the phy_device struct
1594 */
phy_is_internal(struct phy_device * phydev)1595 static inline bool phy_is_internal(struct phy_device *phydev)
1596 {
1597 return phydev->is_internal;
1598 }
1599
1600 /**
1601 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1602 * @phydev: the phy_device struct
1603 */
phy_on_sfp(struct phy_device * phydev)1604 static inline bool phy_on_sfp(struct phy_device *phydev)
1605 {
1606 return phydev->is_on_sfp_module;
1607 }
1608
1609 /**
1610 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1611 * PHY interface mode is RGMII (all variants)
1612 * @mode: the &phy_interface_t enum
1613 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1614 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1615 {
1616 return mode >= PHY_INTERFACE_MODE_RGMII &&
1617 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1618 };
1619
1620 /**
1621 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1622 * negotiation
1623 * @mode: one of &enum phy_interface_t
1624 *
1625 * Returns true if the PHY interface mode uses the 16-bit negotiation
1626 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1627 */
phy_interface_mode_is_8023z(phy_interface_t mode)1628 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1629 {
1630 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1631 mode == PHY_INTERFACE_MODE_2500BASEX;
1632 }
1633
1634 /**
1635 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1636 * is RGMII (all variants)
1637 * @phydev: the phy_device struct
1638 */
phy_interface_is_rgmii(struct phy_device * phydev)1639 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1640 {
1641 return phy_interface_mode_is_rgmii(phydev->interface);
1642 };
1643
1644 /**
1645 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1646 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1647 * @phydev: the phy_device struct
1648 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1649 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1650 {
1651 return phydev->is_pseudo_fixed_link;
1652 }
1653
1654 int phy_save_page(struct phy_device *phydev);
1655 int phy_select_page(struct phy_device *phydev, int page);
1656 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1657 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1658 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1659 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1660 u16 mask, u16 set);
1661 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1662 u16 mask, u16 set);
1663
1664 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1665 bool is_c45,
1666 struct phy_c45_device_ids *c45_ids);
1667 #if IS_ENABLED(CONFIG_PHYLIB)
1668 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1669 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1670 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1671 struct phy_device *device_phy_find_device(struct device *dev);
1672 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1673 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1674 int phy_device_register(struct phy_device *phy);
1675 void phy_device_free(struct phy_device *phydev);
1676 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1677 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1678 {
1679 return 0;
1680 }
1681 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1682 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1683 {
1684 return 0;
1685 }
1686
1687 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1688 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1689 {
1690 return NULL;
1691 }
1692
device_phy_find_device(struct device * dev)1693 static inline struct phy_device *device_phy_find_device(struct device *dev)
1694 {
1695 return NULL;
1696 }
1697
1698 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1699 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1700 {
1701 return NULL;
1702 }
1703
1704 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1705 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1706 {
1707 return NULL;
1708 }
1709
phy_device_register(struct phy_device * phy)1710 static inline int phy_device_register(struct phy_device *phy)
1711 {
1712 return 0;
1713 }
1714
phy_device_free(struct phy_device * phydev)1715 static inline void phy_device_free(struct phy_device *phydev) { }
1716 #endif /* CONFIG_PHYLIB */
1717 void phy_device_remove(struct phy_device *phydev);
1718 int phy_get_c45_ids(struct phy_device *phydev);
1719 int phy_init_hw(struct phy_device *phydev);
1720 int phy_suspend(struct phy_device *phydev);
1721 int phy_resume(struct phy_device *phydev);
1722 int __phy_resume(struct phy_device *phydev);
1723 int phy_loopback(struct phy_device *phydev, bool enable);
1724 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1725 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1726 int phy_sfp_probe(struct phy_device *phydev,
1727 const struct sfp_upstream_ops *ops);
1728 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1729 phy_interface_t interface);
1730 struct phy_device *phy_find_first(struct mii_bus *bus);
1731 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1732 u32 flags, phy_interface_t interface);
1733 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1734 void (*handler)(struct net_device *),
1735 phy_interface_t interface);
1736 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1737 void (*handler)(struct net_device *),
1738 phy_interface_t interface);
1739 void phy_disconnect(struct phy_device *phydev);
1740 void phy_detach(struct phy_device *phydev);
1741 void phy_start(struct phy_device *phydev);
1742 void phy_stop(struct phy_device *phydev);
1743 int phy_config_aneg(struct phy_device *phydev);
1744 int _phy_start_aneg(struct phy_device *phydev);
1745 int phy_start_aneg(struct phy_device *phydev);
1746 int phy_aneg_done(struct phy_device *phydev);
1747 int phy_speed_down(struct phy_device *phydev, bool sync);
1748 int phy_speed_up(struct phy_device *phydev);
1749 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1750
1751 int phy_restart_aneg(struct phy_device *phydev);
1752 int phy_reset_after_clk_enable(struct phy_device *phydev);
1753
1754 #if IS_ENABLED(CONFIG_PHYLIB)
1755 int phy_start_cable_test(struct phy_device *phydev,
1756 struct netlink_ext_ack *extack);
1757 int phy_start_cable_test_tdr(struct phy_device *phydev,
1758 struct netlink_ext_ack *extack,
1759 const struct phy_tdr_config *config);
1760 #else
1761 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1762 int phy_start_cable_test(struct phy_device *phydev,
1763 struct netlink_ext_ack *extack)
1764 {
1765 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1766 return -EOPNOTSUPP;
1767 }
1768 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1769 int phy_start_cable_test_tdr(struct phy_device *phydev,
1770 struct netlink_ext_ack *extack,
1771 const struct phy_tdr_config *config)
1772 {
1773 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1774 return -EOPNOTSUPP;
1775 }
1776 #endif
1777
phy_device_reset(struct phy_device * phydev,int value)1778 static inline void phy_device_reset(struct phy_device *phydev, int value)
1779 {
1780 mdio_device_reset(&phydev->mdio, value);
1781 }
1782
1783 #define phydev_err(_phydev, format, args...) \
1784 dev_err(&_phydev->mdio.dev, format, ##args)
1785
1786 #define phydev_err_probe(_phydev, err, format, args...) \
1787 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1788
1789 #define phydev_info(_phydev, format, args...) \
1790 dev_info(&_phydev->mdio.dev, format, ##args)
1791
1792 #define phydev_warn(_phydev, format, args...) \
1793 dev_warn(&_phydev->mdio.dev, format, ##args)
1794
1795 #define phydev_dbg(_phydev, format, args...) \
1796 dev_dbg(&_phydev->mdio.dev, format, ##args)
1797
phydev_name(const struct phy_device * phydev)1798 static inline const char *phydev_name(const struct phy_device *phydev)
1799 {
1800 return dev_name(&phydev->mdio.dev);
1801 }
1802
phy_lock_mdio_bus(struct phy_device * phydev)1803 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1804 {
1805 mutex_lock(&phydev->mdio.bus->mdio_lock);
1806 }
1807
phy_unlock_mdio_bus(struct phy_device * phydev)1808 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1809 {
1810 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1811 }
1812
1813 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1814 __printf(2, 3);
1815 char *phy_attached_info_irq(struct phy_device *phydev)
1816 __malloc;
1817 void phy_attached_info(struct phy_device *phydev);
1818
1819 /* Clause 22 PHY */
1820 int genphy_read_abilities(struct phy_device *phydev);
1821 int genphy_setup_forced(struct phy_device *phydev);
1822 int genphy_restart_aneg(struct phy_device *phydev);
1823 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1824 int genphy_config_eee_advert(struct phy_device *phydev);
1825 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1826 int genphy_aneg_done(struct phy_device *phydev);
1827 int genphy_update_link(struct phy_device *phydev);
1828 int genphy_read_lpa(struct phy_device *phydev);
1829 int genphy_read_status_fixed(struct phy_device *phydev);
1830 int genphy_read_status(struct phy_device *phydev);
1831 int genphy_read_master_slave(struct phy_device *phydev);
1832 int genphy_suspend(struct phy_device *phydev);
1833 int genphy_resume(struct phy_device *phydev);
1834 int genphy_loopback(struct phy_device *phydev, bool enable);
1835 int genphy_soft_reset(struct phy_device *phydev);
1836 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1837
genphy_config_aneg(struct phy_device * phydev)1838 static inline int genphy_config_aneg(struct phy_device *phydev)
1839 {
1840 return __genphy_config_aneg(phydev, false);
1841 }
1842
genphy_no_config_intr(struct phy_device * phydev)1843 static inline int genphy_no_config_intr(struct phy_device *phydev)
1844 {
1845 return 0;
1846 }
1847 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1848 u16 regnum);
1849 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1850 u16 regnum, u16 val);
1851
1852 /* Clause 37 */
1853 int genphy_c37_config_aneg(struct phy_device *phydev);
1854 int genphy_c37_read_status(struct phy_device *phydev);
1855
1856 /* Clause 45 PHY */
1857 int genphy_c45_restart_aneg(struct phy_device *phydev);
1858 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1859 int genphy_c45_aneg_done(struct phy_device *phydev);
1860 int genphy_c45_read_link(struct phy_device *phydev);
1861 int genphy_c45_read_lpa(struct phy_device *phydev);
1862 int genphy_c45_read_pma(struct phy_device *phydev);
1863 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1864 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1865 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1866 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1867 int genphy_c45_read_mdix(struct phy_device *phydev);
1868 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1869 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1870 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1871 int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1872 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1873 int genphy_c45_read_status(struct phy_device *phydev);
1874 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1875 int genphy_c45_config_aneg(struct phy_device *phydev);
1876 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1877 int genphy_c45_pma_resume(struct phy_device *phydev);
1878 int genphy_c45_pma_suspend(struct phy_device *phydev);
1879 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1880 int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1881 struct phy_plca_cfg *plca_cfg);
1882 int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1883 const struct phy_plca_cfg *plca_cfg);
1884 int genphy_c45_plca_get_status(struct phy_device *phydev,
1885 struct phy_plca_status *plca_st);
1886 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1887 unsigned long *lp, bool *is_enabled);
1888 int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1889 struct ethtool_eee *data);
1890 int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1891 struct ethtool_eee *data);
1892 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1893 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1894 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1895
1896 /* Generic C45 PHY driver */
1897 extern struct phy_driver genphy_c45_driver;
1898
1899 /* The gen10g_* functions are the old Clause 45 stub */
1900 int gen10g_config_aneg(struct phy_device *phydev);
1901
phy_read_status(struct phy_device * phydev)1902 static inline int phy_read_status(struct phy_device *phydev)
1903 {
1904 if (!phydev->drv)
1905 return -EIO;
1906
1907 if (phydev->drv->read_status)
1908 return phydev->drv->read_status(phydev);
1909 else
1910 return genphy_read_status(phydev);
1911 }
1912
1913 void phy_driver_unregister(struct phy_driver *drv);
1914 void phy_drivers_unregister(struct phy_driver *drv, int n);
1915 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1916 int phy_drivers_register(struct phy_driver *new_driver, int n,
1917 struct module *owner);
1918 void phy_error(struct phy_device *phydev);
1919 void phy_state_machine(struct work_struct *work);
1920 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1921 void phy_trigger_machine(struct phy_device *phydev);
1922 void phy_mac_interrupt(struct phy_device *phydev);
1923 void phy_start_machine(struct phy_device *phydev);
1924 void phy_stop_machine(struct phy_device *phydev);
1925 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1926 struct ethtool_link_ksettings *cmd);
1927 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1928 const struct ethtool_link_ksettings *cmd);
1929 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1930 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1931 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1932 int phy_disable_interrupts(struct phy_device *phydev);
1933 void phy_request_interrupt(struct phy_device *phydev);
1934 void phy_free_interrupt(struct phy_device *phydev);
1935 void phy_print_status(struct phy_device *phydev);
1936 int phy_get_rate_matching(struct phy_device *phydev,
1937 phy_interface_t iface);
1938 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1939 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1940 void phy_advertise_supported(struct phy_device *phydev);
1941 void phy_support_sym_pause(struct phy_device *phydev);
1942 void phy_support_asym_pause(struct phy_device *phydev);
1943 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1944 bool autoneg);
1945 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1946 bool phy_validate_pause(struct phy_device *phydev,
1947 struct ethtool_pauseparam *pp);
1948 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1949
1950 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1951 const int *delay_values, int size, bool is_rx);
1952
1953 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1954 bool *tx_pause, bool *rx_pause);
1955
1956 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1957 int (*run)(struct phy_device *));
1958 int phy_register_fixup_for_id(const char *bus_id,
1959 int (*run)(struct phy_device *));
1960 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1961 int (*run)(struct phy_device *));
1962
1963 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1964 int phy_unregister_fixup_for_id(const char *bus_id);
1965 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1966
1967 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1968 int phy_get_eee_err(struct phy_device *phydev);
1969 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1970 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1971 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1972 void phy_ethtool_get_wol(struct phy_device *phydev,
1973 struct ethtool_wolinfo *wol);
1974 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1975 struct ethtool_link_ksettings *cmd);
1976 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1977 const struct ethtool_link_ksettings *cmd);
1978 int phy_ethtool_nway_reset(struct net_device *ndev);
1979 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size);
1980 void phy_package_leave(struct phy_device *phydev);
1981 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1982 int base_addr, size_t priv_size);
1983
1984 int __init mdio_bus_init(void);
1985 void mdio_bus_exit(void);
1986
1987 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1988 int phy_ethtool_get_sset_count(struct phy_device *phydev);
1989 int phy_ethtool_get_stats(struct phy_device *phydev,
1990 struct ethtool_stats *stats, u64 *data);
1991 int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
1992 struct phy_plca_cfg *plca_cfg);
1993 int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
1994 const struct phy_plca_cfg *plca_cfg,
1995 struct netlink_ext_ack *extack);
1996 int phy_ethtool_get_plca_status(struct phy_device *phydev,
1997 struct phy_plca_status *plca_st);
1998
1999 int __phy_hwtstamp_get(struct phy_device *phydev,
2000 struct kernel_hwtstamp_config *config);
2001 int __phy_hwtstamp_set(struct phy_device *phydev,
2002 struct kernel_hwtstamp_config *config,
2003 struct netlink_ext_ack *extack);
2004
phy_package_address(struct phy_device * phydev,unsigned int addr_offset)2005 static inline int phy_package_address(struct phy_device *phydev,
2006 unsigned int addr_offset)
2007 {
2008 struct phy_package_shared *shared = phydev->shared;
2009 u8 base_addr = shared->base_addr;
2010
2011 if (addr_offset >= PHY_MAX_ADDR - base_addr)
2012 return -EIO;
2013
2014 /* we know that addr will be in the range 0..31 and thus the
2015 * implicit cast to a signed int is not a problem.
2016 */
2017 return base_addr + addr_offset;
2018 }
2019
phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2020 static inline int phy_package_read(struct phy_device *phydev,
2021 unsigned int addr_offset, u32 regnum)
2022 {
2023 int addr = phy_package_address(phydev, addr_offset);
2024
2025 if (addr < 0)
2026 return addr;
2027
2028 return mdiobus_read(phydev->mdio.bus, addr, regnum);
2029 }
2030
__phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2031 static inline int __phy_package_read(struct phy_device *phydev,
2032 unsigned int addr_offset, u32 regnum)
2033 {
2034 int addr = phy_package_address(phydev, addr_offset);
2035
2036 if (addr < 0)
2037 return addr;
2038
2039 return __mdiobus_read(phydev->mdio.bus, addr, regnum);
2040 }
2041
phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2042 static inline int phy_package_write(struct phy_device *phydev,
2043 unsigned int addr_offset, u32 regnum,
2044 u16 val)
2045 {
2046 int addr = phy_package_address(phydev, addr_offset);
2047
2048 if (addr < 0)
2049 return addr;
2050
2051 return mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2052 }
2053
__phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2054 static inline int __phy_package_write(struct phy_device *phydev,
2055 unsigned int addr_offset, u32 regnum,
2056 u16 val)
2057 {
2058 int addr = phy_package_address(phydev, addr_offset);
2059
2060 if (addr < 0)
2061 return addr;
2062
2063 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2064 }
2065
2066 int __phy_package_read_mmd(struct phy_device *phydev,
2067 unsigned int addr_offset, int devad,
2068 u32 regnum);
2069
2070 int phy_package_read_mmd(struct phy_device *phydev,
2071 unsigned int addr_offset, int devad,
2072 u32 regnum);
2073
2074 int __phy_package_write_mmd(struct phy_device *phydev,
2075 unsigned int addr_offset, int devad,
2076 u32 regnum, u16 val);
2077
2078 int phy_package_write_mmd(struct phy_device *phydev,
2079 unsigned int addr_offset, int devad,
2080 u32 regnum, u16 val);
2081
__phy_package_set_once(struct phy_device * phydev,unsigned int b)2082 static inline bool __phy_package_set_once(struct phy_device *phydev,
2083 unsigned int b)
2084 {
2085 struct phy_package_shared *shared = phydev->shared;
2086
2087 if (!shared)
2088 return false;
2089
2090 return !test_and_set_bit(b, &shared->flags);
2091 }
2092
phy_package_init_once(struct phy_device * phydev)2093 static inline bool phy_package_init_once(struct phy_device *phydev)
2094 {
2095 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2096 }
2097
phy_package_probe_once(struct phy_device * phydev)2098 static inline bool phy_package_probe_once(struct phy_device *phydev)
2099 {
2100 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2101 }
2102
2103 extern struct bus_type mdio_bus_type;
2104
2105 struct mdio_board_info {
2106 const char *bus_id;
2107 char modalias[MDIO_NAME_SIZE];
2108 int mdio_addr;
2109 const void *platform_data;
2110 };
2111
2112 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
2113 int mdiobus_register_board_info(const struct mdio_board_info *info,
2114 unsigned int n);
2115 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)2116 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2117 unsigned int n)
2118 {
2119 return 0;
2120 }
2121 #endif
2122
2123
2124 /**
2125 * phy_module_driver() - Helper macro for registering PHY drivers
2126 * @__phy_drivers: array of PHY drivers to register
2127 * @__count: Numbers of members in array
2128 *
2129 * Helper macro for PHY drivers which do not do anything special in module
2130 * init/exit. Each module may only use this macro once, and calling it
2131 * replaces module_init() and module_exit().
2132 */
2133 #define phy_module_driver(__phy_drivers, __count) \
2134 static int __init phy_module_init(void) \
2135 { \
2136 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2137 } \
2138 module_init(phy_module_init); \
2139 static void __exit phy_module_exit(void) \
2140 { \
2141 phy_drivers_unregister(__phy_drivers, __count); \
2142 } \
2143 module_exit(phy_module_exit)
2144
2145 #define module_phy_driver(__phy_drivers) \
2146 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2147
2148 bool phy_driver_is_genphy(struct phy_device *phydev);
2149 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2150
2151 #endif /* __PHY_H */
2152