1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Serial Port driver for Open Firmware platform devices
4 *
5 * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
6 */
7 #include <linux/console.h>
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/serial_core.h>
11 #include <linux/serial_reg.h>
12 #include <linux/of_address.h>
13 #include <linux/of_irq.h>
14 #include <linux/of_platform.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/clk.h>
17 #include <linux/reset.h>
18
19 #include "8250.h"
20
21 struct of_serial_info {
22 struct clk *clk;
23 struct reset_control *rst;
24 int type;
25 int line;
26 };
27
28 /*
29 * Fill a struct uart_port for a given device node
30 */
of_platform_serial_setup(struct platform_device * ofdev,int type,struct uart_8250_port * up,struct of_serial_info * info)31 static int of_platform_serial_setup(struct platform_device *ofdev,
32 int type, struct uart_8250_port *up,
33 struct of_serial_info *info)
34 {
35 struct resource resource;
36 struct device *dev = &ofdev->dev;
37 struct device_node *np = dev->of_node;
38 struct uart_port *port = &up->port;
39 u32 clk, spd, prop;
40 int ret, irq;
41
42 memset(port, 0, sizeof *port);
43
44 pm_runtime_enable(&ofdev->dev);
45 pm_runtime_get_sync(&ofdev->dev);
46
47 if (of_property_read_u32(np, "clock-frequency", &clk)) {
48
49 /* Get clk rate through clk driver if present */
50 info->clk = devm_clk_get_enabled(dev, NULL);
51 if (IS_ERR(info->clk)) {
52 ret = dev_err_probe(dev, PTR_ERR(info->clk), "failed to get clock\n");
53 goto err_pmruntime;
54 }
55
56 clk = clk_get_rate(info->clk);
57 }
58 /* If current-speed was set, then try not to change it. */
59 if (of_property_read_u32(np, "current-speed", &spd) == 0)
60 port->custom_divisor = clk / (16 * spd);
61
62 ret = of_address_to_resource(np, 0, &resource);
63 if (ret) {
64 dev_err_probe(dev, ret, "invalid address\n");
65 goto err_pmruntime;
66 }
67
68 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
69 UPF_FIXED_TYPE;
70 spin_lock_init(&port->lock);
71
72 if (resource_type(&resource) == IORESOURCE_IO) {
73 port->iotype = UPIO_PORT;
74 port->iobase = resource.start;
75 } else {
76 port->mapbase = resource.start;
77 port->mapsize = resource_size(&resource);
78
79 /* Check for shifted address mapping */
80 if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
81 if (prop >= port->mapsize) {
82 ret = dev_err_probe(dev, -EINVAL, "reg-offset %u exceeds region size %pa\n",
83 prop, &port->mapsize);
84 goto err_pmruntime;
85 }
86
87 port->mapbase += prop;
88 port->mapsize -= prop;
89 }
90
91 port->iotype = UPIO_MEM;
92 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
93 switch (prop) {
94 case 1:
95 port->iotype = UPIO_MEM;
96 break;
97 case 2:
98 port->iotype = UPIO_MEM16;
99 break;
100 case 4:
101 port->iotype = of_device_is_big_endian(np) ?
102 UPIO_MEM32BE : UPIO_MEM32;
103 break;
104 default:
105 ret = dev_err_probe(dev, -EINVAL, "unsupported reg-io-width (%u)\n",
106 prop);
107 goto err_pmruntime;
108 }
109 }
110 port->flags |= UPF_IOREMAP;
111 }
112
113 /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
114 if (of_device_is_compatible(np, "mrvl,mmp-uart"))
115 port->regshift = 2;
116
117 /* Check for registers offset within the devices address range */
118 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
119 port->regshift = prop;
120
121 /* Check for fifo size */
122 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
123 port->fifosize = prop;
124
125 /* Check for a fixed line number */
126 ret = of_alias_get_id(np, "serial");
127 if (ret >= 0)
128 port->line = ret;
129
130 irq = of_irq_get(np, 0);
131 if (irq < 0) {
132 if (irq == -EPROBE_DEFER) {
133 ret = -EPROBE_DEFER;
134 goto err_pmruntime;
135 }
136 /* IRQ support not mandatory */
137 irq = 0;
138 }
139
140 port->irq = irq;
141
142 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
143 if (IS_ERR(info->rst)) {
144 ret = PTR_ERR(info->rst);
145 goto err_pmruntime;
146 }
147
148 ret = reset_control_deassert(info->rst);
149 if (ret)
150 goto err_pmruntime;
151
152 port->type = type;
153 port->uartclk = clk;
154
155 if (of_property_read_bool(np, "no-loopback-test"))
156 port->flags |= UPF_SKIP_TEST;
157
158 port->dev = &ofdev->dev;
159 port->rs485_config = serial8250_em485_config;
160 port->rs485_supported = serial8250_em485_supported;
161 up->rs485_start_tx = serial8250_em485_start_tx;
162 up->rs485_stop_tx = serial8250_em485_stop_tx;
163
164 switch (type) {
165 case PORT_RT2880:
166 ret = rt288x_setup(port);
167 if (ret)
168 goto err_pmruntime;
169 break;
170 }
171
172 if (IS_REACHABLE(CONFIG_SERIAL_8250_FSL) &&
173 (of_device_is_compatible(np, "fsl,ns16550") ||
174 of_device_is_compatible(np, "fsl,16550-FIFO64"))) {
175 port->handle_irq = fsl8250_handle_irq;
176 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
177 }
178
179 return 0;
180 err_pmruntime:
181 pm_runtime_put_sync(&ofdev->dev);
182 pm_runtime_disable(&ofdev->dev);
183 return ret;
184 }
185
186 /*
187 * Try to register a serial port
188 */
of_platform_serial_probe(struct platform_device * ofdev)189 static int of_platform_serial_probe(struct platform_device *ofdev)
190 {
191 struct of_serial_info *info;
192 struct uart_8250_port port8250;
193 unsigned int port_type;
194 u32 tx_threshold;
195 int ret;
196
197 if (IS_ENABLED(CONFIG_SERIAL_8250_BCM7271) &&
198 of_device_is_compatible(ofdev->dev.of_node, "brcm,bcm7271-uart"))
199 return -ENODEV;
200
201 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev);
202 if (port_type == PORT_UNKNOWN)
203 return -EINVAL;
204
205 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
206 return -EBUSY;
207
208 info = kzalloc(sizeof(*info), GFP_KERNEL);
209 if (info == NULL)
210 return -ENOMEM;
211
212 memset(&port8250, 0, sizeof(port8250));
213 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info);
214 if (ret)
215 goto err_free;
216
217 if (port8250.port.fifosize)
218 port8250.capabilities = UART_CAP_FIFO;
219
220 /* Check for TX FIFO threshold & set tx_loadsz */
221 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
222 &tx_threshold) == 0) &&
223 (tx_threshold < port8250.port.fifosize))
224 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
225
226 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
227 port8250.capabilities |= UART_CAP_AFE;
228
229 if (of_property_read_u32(ofdev->dev.of_node,
230 "overrun-throttle-ms",
231 &port8250.overrun_backoff_time_ms) != 0)
232 port8250.overrun_backoff_time_ms = 0;
233
234 ret = serial8250_register_8250_port(&port8250);
235 if (ret < 0)
236 goto err_dispose;
237
238 info->type = port_type;
239 info->line = ret;
240 platform_set_drvdata(ofdev, info);
241 return 0;
242 err_dispose:
243 irq_dispose_mapping(port8250.port.irq);
244 pm_runtime_put_sync(&ofdev->dev);
245 pm_runtime_disable(&ofdev->dev);
246 err_free:
247 kfree(info);
248 return ret;
249 }
250
251 /*
252 * Release a line
253 */
of_platform_serial_remove(struct platform_device * ofdev)254 static void of_platform_serial_remove(struct platform_device *ofdev)
255 {
256 struct of_serial_info *info = platform_get_drvdata(ofdev);
257
258 serial8250_unregister_port(info->line);
259
260 reset_control_assert(info->rst);
261 pm_runtime_put_sync(&ofdev->dev);
262 pm_runtime_disable(&ofdev->dev);
263 kfree(info);
264 }
265
266 #ifdef CONFIG_PM_SLEEP
of_serial_suspend(struct device * dev)267 static int of_serial_suspend(struct device *dev)
268 {
269 struct of_serial_info *info = dev_get_drvdata(dev);
270 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
271 struct uart_port *port = &port8250->port;
272
273 serial8250_suspend_port(info->line);
274
275 if (!uart_console(port) || console_suspend_enabled) {
276 pm_runtime_put_sync(dev);
277 clk_disable_unprepare(info->clk);
278 }
279 return 0;
280 }
281
of_serial_resume(struct device * dev)282 static int of_serial_resume(struct device *dev)
283 {
284 struct of_serial_info *info = dev_get_drvdata(dev);
285 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
286 struct uart_port *port = &port8250->port;
287
288 if (!uart_console(port) || console_suspend_enabled) {
289 pm_runtime_get_sync(dev);
290 clk_prepare_enable(info->clk);
291 }
292
293 serial8250_resume_port(info->line);
294
295 return 0;
296 }
297 #endif
298 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
299
300 /*
301 * A few common types, add more as needed.
302 */
303 static const struct of_device_id of_platform_serial_table[] = {
304 { .compatible = "ns8250", .data = (void *)PORT_8250, },
305 { .compatible = "ns16450", .data = (void *)PORT_16450, },
306 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
307 { .compatible = "ns16550", .data = (void *)PORT_16550, },
308 { .compatible = "ns16750", .data = (void *)PORT_16750, },
309 { .compatible = "ns16850", .data = (void *)PORT_16850, },
310 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
311 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
312 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
313 { .compatible = "altr,16550-FIFO32",
314 .data = (void *)PORT_ALTR_16550_F32, },
315 { .compatible = "altr,16550-FIFO64",
316 .data = (void *)PORT_ALTR_16550_F64, },
317 { .compatible = "altr,16550-FIFO128",
318 .data = (void *)PORT_ALTR_16550_F128, },
319 { .compatible = "fsl,16550-FIFO64",
320 .data = (void *)PORT_16550A_FSL64, },
321 { .compatible = "mediatek,mtk-btif",
322 .data = (void *)PORT_MTK_BTIF, },
323 { .compatible = "mrvl,mmp-uart",
324 .data = (void *)PORT_XSCALE, },
325 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
326 { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, },
327 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
328 { /* end of list */ },
329 };
330 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
331
332 static struct platform_driver of_platform_serial_driver = {
333 .driver = {
334 .name = "of_serial",
335 .of_match_table = of_platform_serial_table,
336 .pm = &of_serial_pm_ops,
337 },
338 .probe = of_platform_serial_probe,
339 .remove_new = of_platform_serial_remove,
340 };
341
342 module_platform_driver(of_platform_serial_driver);
343
344 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
345 MODULE_LICENSE("GPL");
346 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
347