1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Mediatek 8250 driver.
4 *
5 * Copyright (c) 2014 MundoReader S.L.
6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 */
8 #include <linux/clk.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_platform.h>
13 #include <linux/pinctrl/consumer.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/serial_8250.h>
17 #include <linux/serial_reg.h>
18 #include <linux/console.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22
23 #include "8250.h"
24
25 #define MTK_UART_HIGHS 0x09 /* Highspeed register */
26 #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
27 #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
28 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
29 #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */
30 #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */
31 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
32 #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
33 #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
34 #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
35 #define MTK_UART_DEBUG0 0x18
36 #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */
37 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
38 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
39
40 #define MTK_UART_EFR 38 /* I/O: Extended Features Register */
41 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
42 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
43 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
44 #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */
45 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
46 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
47 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
48 #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
49 #define MTK_UART_DMA_EN_TX 0x2
50 #define MTK_UART_DMA_EN_RX 0x5
51
52 #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */
53 #define MTK_UART_RX_SIZE 0x8000
54 #define MTK_UART_TX_TRIGGER 1
55 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
56
57 #define MTK_UART_XON1 40 /* I/O: Xon character 1 */
58 #define MTK_UART_XOFF1 42 /* I/O: Xoff character 1 */
59
60 #ifdef CONFIG_SERIAL_8250_DMA
61 enum dma_rx_status {
62 DMA_RX_START = 0,
63 DMA_RX_RUNNING = 1,
64 DMA_RX_SHUTDOWN = 2,
65 };
66 #endif
67
68 struct mtk8250_data {
69 int line;
70 unsigned int rx_pos;
71 unsigned int clk_count;
72 struct clk *uart_clk;
73 struct clk *bus_clk;
74 struct uart_8250_dma *dma;
75 #ifdef CONFIG_SERIAL_8250_DMA
76 enum dma_rx_status rx_status;
77 #endif
78 int rx_wakeup_irq;
79 };
80
81 /* flow control mode */
82 enum {
83 MTK_UART_FC_NONE,
84 MTK_UART_FC_SW,
85 MTK_UART_FC_HW,
86 };
87
88 #ifdef CONFIG_SERIAL_8250_DMA
89 static void mtk8250_rx_dma(struct uart_8250_port *up);
90
mtk8250_dma_rx_complete(void * param)91 static void mtk8250_dma_rx_complete(void *param)
92 {
93 struct uart_8250_port *up = param;
94 struct uart_8250_dma *dma = up->dma;
95 struct mtk8250_data *data = up->port.private_data;
96 struct tty_port *tty_port = &up->port.state->port;
97 struct dma_tx_state state;
98 int copied, total, cnt;
99 unsigned char *ptr;
100 unsigned long flags;
101
102 if (data->rx_status == DMA_RX_SHUTDOWN)
103 return;
104
105 uart_port_lock_irqsave(&up->port, &flags);
106
107 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
108 total = dma->rx_size - state.residue;
109 cnt = total;
110
111 if ((data->rx_pos + cnt) > dma->rx_size)
112 cnt = dma->rx_size - data->rx_pos;
113
114 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
115 copied = tty_insert_flip_string(tty_port, ptr, cnt);
116 data->rx_pos += cnt;
117
118 if (total > cnt) {
119 ptr = (unsigned char *)(dma->rx_buf);
120 cnt = total - cnt;
121 copied += tty_insert_flip_string(tty_port, ptr, cnt);
122 data->rx_pos = cnt;
123 }
124
125 up->port.icount.rx += copied;
126
127 tty_flip_buffer_push(tty_port);
128
129 mtk8250_rx_dma(up);
130
131 uart_port_unlock_irqrestore(&up->port, flags);
132 }
133
mtk8250_rx_dma(struct uart_8250_port * up)134 static void mtk8250_rx_dma(struct uart_8250_port *up)
135 {
136 struct uart_8250_dma *dma = up->dma;
137 struct dma_async_tx_descriptor *desc;
138
139 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
140 dma->rx_size, DMA_DEV_TO_MEM,
141 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
142 if (!desc) {
143 pr_err("failed to prepare rx slave single\n");
144 return;
145 }
146
147 desc->callback = mtk8250_dma_rx_complete;
148 desc->callback_param = up;
149
150 dma->rx_cookie = dmaengine_submit(desc);
151
152 dma_async_issue_pending(dma->rxchan);
153 }
154
mtk8250_dma_enable(struct uart_8250_port * up)155 static void mtk8250_dma_enable(struct uart_8250_port *up)
156 {
157 struct uart_8250_dma *dma = up->dma;
158 struct mtk8250_data *data = up->port.private_data;
159 int lcr = serial_in(up, UART_LCR);
160
161 if (data->rx_status != DMA_RX_START)
162 return;
163
164 dma->rxconf.src_port_window_size = dma->rx_size;
165 dma->rxconf.src_addr = dma->rx_addr;
166
167 dma->txconf.dst_port_window_size = UART_XMIT_SIZE;
168 dma->txconf.dst_addr = dma->tx_addr;
169
170 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
171 UART_FCR_CLEAR_XMIT);
172 serial_out(up, MTK_UART_DMA_EN,
173 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
174
175 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
176 serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
177 serial_out(up, UART_LCR, lcr);
178
179 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
180 pr_err("failed to configure rx dma channel\n");
181 if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
182 pr_err("failed to configure tx dma channel\n");
183
184 data->rx_status = DMA_RX_RUNNING;
185 data->rx_pos = 0;
186 mtk8250_rx_dma(up);
187 }
188 #endif
189
mtk8250_startup(struct uart_port * port)190 static int mtk8250_startup(struct uart_port *port)
191 {
192 #ifdef CONFIG_SERIAL_8250_DMA
193 struct uart_8250_port *up = up_to_u8250p(port);
194 struct mtk8250_data *data = port->private_data;
195
196 /* disable DMA for console */
197 if (uart_console(port))
198 up->dma = NULL;
199
200 if (up->dma) {
201 data->rx_status = DMA_RX_START;
202 uart_circ_clear(&port->state->xmit);
203 }
204 #endif
205 memset(&port->icount, 0, sizeof(port->icount));
206
207 return serial8250_do_startup(port);
208 }
209
mtk8250_shutdown(struct uart_port * port)210 static void mtk8250_shutdown(struct uart_port *port)
211 {
212 #ifdef CONFIG_SERIAL_8250_DMA
213 struct uart_8250_port *up = up_to_u8250p(port);
214 struct mtk8250_data *data = port->private_data;
215
216 if (up->dma)
217 data->rx_status = DMA_RX_SHUTDOWN;
218 #endif
219
220 return serial8250_do_shutdown(port);
221 }
222
mtk8250_disable_intrs(struct uart_8250_port * up,int mask)223 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
224 {
225 /* Port locked to synchronize UART_IER access against the console. */
226 lockdep_assert_held_once(&up->port.lock);
227
228 serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
229 }
230
mtk8250_enable_intrs(struct uart_8250_port * up,int mask)231 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
232 {
233 /* Port locked to synchronize UART_IER access against the console. */
234 lockdep_assert_held_once(&up->port.lock);
235
236 serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
237 }
238
mtk8250_set_flow_ctrl(struct uart_8250_port * up,int mode)239 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
240 {
241 struct uart_port *port = &up->port;
242 int lcr = serial_in(up, UART_LCR);
243
244 /* Port locked to synchronize UART_IER access against the console. */
245 lockdep_assert_held_once(&port->lock);
246
247 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
248 serial_out(up, MTK_UART_EFR, UART_EFR_ECB);
249 serial_out(up, UART_LCR, lcr);
250 lcr = serial_in(up, UART_LCR);
251
252 switch (mode) {
253 case MTK_UART_FC_NONE:
254 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
255 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
256 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
257 serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &
258 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
259 serial_out(up, UART_LCR, lcr);
260 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
261 MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
262 break;
263
264 case MTK_UART_FC_HW:
265 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
266 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
267 serial_out(up, UART_MCR, UART_MCR_RTS);
268 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
269
270 /*enable hw flow control*/
271 serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |
272 (serial_in(up, MTK_UART_EFR) &
273 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
274
275 serial_out(up, UART_LCR, lcr);
276 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
277 mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
278 break;
279
280 case MTK_UART_FC_SW: /*MTK software flow control */
281 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
282 serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
283 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
284
285 /*enable sw flow control */
286 serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
287 (serial_in(up, MTK_UART_EFR) &
288 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
289
290 serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));
291 serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));
292 serial_out(up, UART_LCR, lcr);
293 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
294 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
295 break;
296 default:
297 break;
298 }
299 }
300
301 static void
mtk8250_set_termios(struct uart_port * port,struct ktermios * termios,const struct ktermios * old)302 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
303 const struct ktermios *old)
304 {
305 static const unsigned short fraction_L_mapping[] = {
306 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
307 };
308 static const unsigned short fraction_M_mapping[] = {
309 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
310 };
311 struct uart_8250_port *up = up_to_u8250p(port);
312 unsigned int baud, quot, fraction;
313 unsigned long flags;
314 int mode;
315
316 #ifdef CONFIG_SERIAL_8250_DMA
317 if (up->dma) {
318 if (uart_console(port)) {
319 devm_kfree(up->port.dev, up->dma);
320 up->dma = NULL;
321 } else {
322 mtk8250_dma_enable(up);
323 }
324 }
325 #endif
326
327 /*
328 * Store the requested baud rate before calling the generic 8250
329 * set_termios method. Standard 8250 port expects bauds to be
330 * no higher than (uartclk / 16) so the baud will be clamped if it
331 * gets out of that bound. Mediatek 8250 port supports speed
332 * higher than that, therefore we'll get original baud rate back
333 * after calling the generic set_termios method and recalculate
334 * the speed later in this method.
335 */
336 baud = tty_termios_baud_rate(termios);
337
338 serial8250_do_set_termios(port, termios, NULL);
339
340 tty_termios_encode_baud_rate(termios, baud, baud);
341
342 /*
343 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
344 *
345 * We need to recalcualte the quot register, as the claculation depends
346 * on the vaule in the highspeed register.
347 *
348 * Some baudrates are not supported by the chip, so we use the next
349 * lower rate supported and update termios c_flag.
350 *
351 * If highspeed register is set to 3, we need to specify sample count
352 * and sample point to increase accuracy. If not, we reset the
353 * registers to their default values.
354 */
355 baud = uart_get_baud_rate(port, termios, old,
356 port->uartclk / 16 / UART_DIV_MAX,
357 port->uartclk);
358
359 if (baud < 115200) {
360 serial_port_out(port, MTK_UART_HIGHS, 0x0);
361 quot = uart_get_divisor(port, baud);
362 } else {
363 serial_port_out(port, MTK_UART_HIGHS, 0x3);
364 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
365 }
366
367 /*
368 * Ok, we're now changing the port state. Do it with
369 * interrupts disabled.
370 */
371 uart_port_lock_irqsave(port, &flags);
372
373 /*
374 * Update the per-port timeout.
375 */
376 uart_update_timeout(port, termios->c_cflag, baud);
377
378 /* set DLAB we have cval saved in up->lcr from the call to the core */
379 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
380 serial_dl_write(up, quot);
381
382 /* reset DLAB */
383 serial_port_out(port, UART_LCR, up->lcr);
384
385 if (baud >= 115200) {
386 unsigned int tmp;
387
388 tmp = (port->uartclk / (baud * quot)) - 1;
389 serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
390 serial_port_out(port, MTK_UART_SAMPLE_POINT,
391 (tmp >> 1) - 1);
392
393 /*count fraction to set fractoin register */
394 fraction = ((port->uartclk * 100) / baud / quot) % 100;
395 fraction = DIV_ROUND_CLOSEST(fraction, 10);
396 serial_port_out(port, MTK_UART_FRACDIV_L,
397 fraction_L_mapping[fraction]);
398 serial_port_out(port, MTK_UART_FRACDIV_M,
399 fraction_M_mapping[fraction]);
400 } else {
401 serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
402 serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
403 serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
404 serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
405 }
406
407 if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
408 mode = MTK_UART_FC_HW;
409 else if (termios->c_iflag & CRTSCTS)
410 mode = MTK_UART_FC_SW;
411 else
412 mode = MTK_UART_FC_NONE;
413
414 mtk8250_set_flow_ctrl(up, mode);
415
416 if (uart_console(port))
417 up->port.cons->cflag = termios->c_cflag;
418
419 uart_port_unlock_irqrestore(port, flags);
420 /* Don't rewrite B0 */
421 if (tty_termios_baud_rate(termios))
422 tty_termios_encode_baud_rate(termios, baud, baud);
423 }
424
mtk8250_runtime_suspend(struct device * dev)425 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
426 {
427 struct mtk8250_data *data = dev_get_drvdata(dev);
428 struct uart_8250_port *up = serial8250_get_port(data->line);
429
430 /* wait until UART in idle status */
431 while
432 (serial_in(up, MTK_UART_DEBUG0));
433
434 clk_disable_unprepare(data->bus_clk);
435
436 return 0;
437 }
438
mtk8250_runtime_resume(struct device * dev)439 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
440 {
441 struct mtk8250_data *data = dev_get_drvdata(dev);
442
443 clk_prepare_enable(data->bus_clk);
444
445 return 0;
446 }
447
448 static void
mtk8250_do_pm(struct uart_port * port,unsigned int state,unsigned int old)449 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
450 {
451 if (!state)
452 pm_runtime_get_sync(port->dev);
453
454 serial8250_do_pm(port, state, old);
455
456 if (state)
457 pm_runtime_put_sync_suspend(port->dev);
458 }
459
460 #ifdef CONFIG_SERIAL_8250_DMA
mtk8250_dma_filter(struct dma_chan * chan,void * param)461 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
462 {
463 return false;
464 }
465 #endif
466
mtk8250_probe_of(struct platform_device * pdev,struct uart_port * p,struct mtk8250_data * data)467 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
468 struct mtk8250_data *data)
469 {
470 #ifdef CONFIG_SERIAL_8250_DMA
471 int dmacnt;
472 #endif
473
474 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
475 if (IS_ERR(data->uart_clk)) {
476 /*
477 * For compatibility with older device trees try unnamed
478 * clk when no baud clk can be found.
479 */
480 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
481 if (IS_ERR(data->uart_clk)) {
482 dev_warn(&pdev->dev, "Can't get uart clock\n");
483 return PTR_ERR(data->uart_clk);
484 }
485
486 return 0;
487 }
488
489 data->bus_clk = devm_clk_get_enabled(&pdev->dev, "bus");
490 if (IS_ERR(data->bus_clk))
491 return PTR_ERR(data->bus_clk);
492
493 data->dma = NULL;
494 #ifdef CONFIG_SERIAL_8250_DMA
495 dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
496 if (dmacnt == 2) {
497 data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
498 GFP_KERNEL);
499 if (!data->dma)
500 return -ENOMEM;
501
502 data->dma->fn = mtk8250_dma_filter;
503 data->dma->rx_size = MTK_UART_RX_SIZE;
504 data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
505 data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
506 }
507 #endif
508
509 return 0;
510 }
511
mtk8250_probe(struct platform_device * pdev)512 static int mtk8250_probe(struct platform_device *pdev)
513 {
514 struct uart_8250_port uart = {};
515 struct mtk8250_data *data;
516 struct resource *regs;
517 int irq, err;
518
519 irq = platform_get_irq(pdev, 0);
520 if (irq < 0)
521 return irq;
522
523 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
524 if (!regs) {
525 dev_err(&pdev->dev, "no registers defined\n");
526 return -EINVAL;
527 }
528
529 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
530 resource_size(regs));
531 if (!uart.port.membase)
532 return -ENOMEM;
533
534 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
535 if (!data)
536 return -ENOMEM;
537
538 data->clk_count = 0;
539
540 if (pdev->dev.of_node) {
541 err = mtk8250_probe_of(pdev, &uart.port, data);
542 if (err)
543 return err;
544 } else
545 return -ENODEV;
546
547 spin_lock_init(&uart.port.lock);
548 uart.port.mapbase = regs->start;
549 uart.port.irq = irq;
550 uart.port.pm = mtk8250_do_pm;
551 uart.port.type = PORT_16550;
552 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
553 uart.port.dev = &pdev->dev;
554 uart.port.iotype = UPIO_MEM32;
555 uart.port.regshift = 2;
556 uart.port.private_data = data;
557 uart.port.shutdown = mtk8250_shutdown;
558 uart.port.startup = mtk8250_startup;
559 uart.port.set_termios = mtk8250_set_termios;
560 uart.port.uartclk = clk_get_rate(data->uart_clk);
561 #ifdef CONFIG_SERIAL_8250_DMA
562 if (data->dma)
563 uart.dma = data->dma;
564 #endif
565
566 /* Disable Rate Fix function */
567 writel(0x0, uart.port.membase +
568 (MTK_UART_RATE_FIX << uart.port.regshift));
569
570 platform_set_drvdata(pdev, data);
571
572 data->line = serial8250_register_8250_port(&uart);
573 if (data->line < 0)
574 return data->line;
575
576 data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
577
578 pm_runtime_set_active(&pdev->dev);
579 pm_runtime_enable(&pdev->dev);
580
581 return 0;
582 }
583
mtk8250_remove(struct platform_device * pdev)584 static void mtk8250_remove(struct platform_device *pdev)
585 {
586 struct mtk8250_data *data = platform_get_drvdata(pdev);
587
588 pm_runtime_get_sync(&pdev->dev);
589
590 serial8250_unregister_port(data->line);
591
592 pm_runtime_disable(&pdev->dev);
593 pm_runtime_put_noidle(&pdev->dev);
594 }
595
mtk8250_suspend(struct device * dev)596 static int __maybe_unused mtk8250_suspend(struct device *dev)
597 {
598 struct mtk8250_data *data = dev_get_drvdata(dev);
599 int irq = data->rx_wakeup_irq;
600 int err;
601
602 serial8250_suspend_port(data->line);
603
604 pinctrl_pm_select_sleep_state(dev);
605 if (irq >= 0) {
606 err = enable_irq_wake(irq);
607 if (err) {
608 dev_err(dev,
609 "failed to enable irq wake on IRQ %d: %d\n",
610 irq, err);
611 pinctrl_pm_select_default_state(dev);
612 serial8250_resume_port(data->line);
613 return err;
614 }
615 }
616
617 return 0;
618 }
619
mtk8250_resume(struct device * dev)620 static int __maybe_unused mtk8250_resume(struct device *dev)
621 {
622 struct mtk8250_data *data = dev_get_drvdata(dev);
623 int irq = data->rx_wakeup_irq;
624
625 if (irq >= 0)
626 disable_irq_wake(irq);
627 pinctrl_pm_select_default_state(dev);
628
629 serial8250_resume_port(data->line);
630
631 return 0;
632 }
633
634 static const struct dev_pm_ops mtk8250_pm_ops = {
635 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
636 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
637 NULL)
638 };
639
640 static const struct of_device_id mtk8250_of_match[] = {
641 { .compatible = "mediatek,mt6577-uart" },
642 { /* Sentinel */ }
643 };
644 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
645
646 static struct platform_driver mtk8250_platform_driver = {
647 .driver = {
648 .name = "mt6577-uart",
649 .pm = &mtk8250_pm_ops,
650 .of_match_table = mtk8250_of_match,
651 },
652 .probe = mtk8250_probe,
653 .remove_new = mtk8250_remove,
654 };
655 module_platform_driver(mtk8250_platform_driver);
656
657 #ifdef CONFIG_SERIAL_8250_CONSOLE
early_mtk8250_setup(struct earlycon_device * device,const char * options)658 static int __init early_mtk8250_setup(struct earlycon_device *device,
659 const char *options)
660 {
661 if (!device->port.membase)
662 return -ENODEV;
663
664 device->port.iotype = UPIO_MEM32;
665 device->port.regshift = 2;
666
667 return early_serial8250_setup(device, NULL);
668 }
669
670 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
671 #endif
672
673 MODULE_AUTHOR("Matthias Brugger");
674 MODULE_LICENSE("GPL");
675 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
676