1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2016 MediaTek Inc.
4 * Author: PC Chen <pc.chen@mediatek.com>
5 * Tiffany Lin <tiffany.lin@mediatek.com>
6 */
7
8 #include <linux/slab.h>
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_runtime.h>
15 #include <media/v4l2-event.h>
16 #include <media/v4l2-mem2mem.h>
17 #include <media/videobuf2-dma-contig.h>
18
19 #include "mtk_vcodec_enc.h"
20 #include "mtk_vcodec_enc_pm.h"
21 #include "../common/mtk_vcodec_intr.h"
22
23 static const struct mtk_video_fmt mtk_video_formats_output[] = {
24 {
25 .fourcc = V4L2_PIX_FMT_NV12M,
26 .type = MTK_FMT_FRAME,
27 .num_planes = 2,
28 },
29 {
30 .fourcc = V4L2_PIX_FMT_NV21M,
31 .type = MTK_FMT_FRAME,
32 .num_planes = 2,
33 },
34 {
35 .fourcc = V4L2_PIX_FMT_YUV420M,
36 .type = MTK_FMT_FRAME,
37 .num_planes = 3,
38 },
39 {
40 .fourcc = V4L2_PIX_FMT_YVU420M,
41 .type = MTK_FMT_FRAME,
42 .num_planes = 3,
43 },
44 };
45
46 static const struct mtk_video_fmt mtk_video_formats_capture_h264[] = {
47 {
48 .fourcc = V4L2_PIX_FMT_H264,
49 .type = MTK_FMT_ENC,
50 .num_planes = 1,
51 },
52 };
53
54 static const struct mtk_video_fmt mtk_video_formats_capture_vp8[] = {
55 {
56 .fourcc = V4L2_PIX_FMT_VP8,
57 .type = MTK_FMT_ENC,
58 .num_planes = 1,
59 },
60 };
61
clean_irq_status(unsigned int irq_status,void __iomem * addr)62 static void clean_irq_status(unsigned int irq_status, void __iomem *addr)
63 {
64 if (irq_status & MTK_VENC_IRQ_STATUS_PAUSE)
65 writel(MTK_VENC_IRQ_STATUS_PAUSE, addr);
66
67 if (irq_status & MTK_VENC_IRQ_STATUS_SWITCH)
68 writel(MTK_VENC_IRQ_STATUS_SWITCH, addr);
69
70 if (irq_status & MTK_VENC_IRQ_STATUS_DRAM)
71 writel(MTK_VENC_IRQ_STATUS_DRAM, addr);
72
73 if (irq_status & MTK_VENC_IRQ_STATUS_SPS)
74 writel(MTK_VENC_IRQ_STATUS_SPS, addr);
75
76 if (irq_status & MTK_VENC_IRQ_STATUS_PPS)
77 writel(MTK_VENC_IRQ_STATUS_PPS, addr);
78
79 if (irq_status & MTK_VENC_IRQ_STATUS_FRM)
80 writel(MTK_VENC_IRQ_STATUS_FRM, addr);
81
82 }
mtk_vcodec_enc_irq_handler(int irq,void * priv)83 static irqreturn_t mtk_vcodec_enc_irq_handler(int irq, void *priv)
84 {
85 struct mtk_vcodec_enc_dev *dev = priv;
86 struct mtk_vcodec_enc_ctx *ctx;
87 unsigned long flags;
88 void __iomem *addr;
89 int core_id;
90
91 spin_lock_irqsave(&dev->irqlock, flags);
92 ctx = dev->curr_ctx;
93 spin_unlock_irqrestore(&dev->irqlock, flags);
94
95 core_id = dev->venc_pdata->core_id;
96 if (core_id < 0 || core_id >= NUM_MAX_VCODEC_REG_BASE) {
97 mtk_v4l2_venc_err(ctx, "Invalid core id: %d, ctx id: %d", core_id, ctx->id);
98 return IRQ_HANDLED;
99 }
100
101 mtk_v4l2_venc_dbg(1, ctx, "id: %d, core id: %d", ctx->id, core_id);
102
103 addr = dev->reg_base[core_id] + MTK_VENC_IRQ_ACK_OFFSET;
104
105 ctx->irq_status = readl(dev->reg_base[core_id] +
106 (MTK_VENC_IRQ_STATUS_OFFSET));
107
108 clean_irq_status(ctx->irq_status, addr);
109
110 wake_up_enc_ctx(ctx, MTK_INST_IRQ_RECEIVED, 0);
111 return IRQ_HANDLED;
112 }
113
fops_vcodec_open(struct file * file)114 static int fops_vcodec_open(struct file *file)
115 {
116 struct mtk_vcodec_enc_dev *dev = video_drvdata(file);
117 struct mtk_vcodec_enc_ctx *ctx = NULL;
118 int ret = 0;
119 struct vb2_queue *src_vq;
120
121 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
122 if (!ctx)
123 return -ENOMEM;
124
125 mutex_lock(&dev->dev_mutex);
126 /*
127 * Use simple counter to uniquely identify this context. Only
128 * used for logging.
129 */
130 ctx->id = dev->id_counter++;
131 v4l2_fh_init(&ctx->fh, video_devdata(file));
132 file->private_data = &ctx->fh;
133 v4l2_fh_add(&ctx->fh);
134 INIT_LIST_HEAD(&ctx->list);
135 ctx->dev = dev;
136 init_waitqueue_head(&ctx->queue[0]);
137 mutex_init(&ctx->q_mutex);
138
139 ctx->type = MTK_INST_ENCODER;
140 ret = mtk_vcodec_enc_ctrls_setup(ctx);
141 if (ret) {
142 mtk_v4l2_venc_err(ctx, "Failed to setup controls() (%d)", ret);
143 goto err_ctrls_setup;
144 }
145 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_enc, ctx,
146 &mtk_vcodec_enc_queue_init);
147 if (IS_ERR((__force void *)ctx->m2m_ctx)) {
148 ret = PTR_ERR((__force void *)ctx->m2m_ctx);
149 mtk_v4l2_venc_err(ctx, "Failed to v4l2_m2m_ctx_init() (%d)", ret);
150 goto err_m2m_ctx_init;
151 }
152 src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx,
153 V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
154 ctx->empty_flush_buf.vb.vb2_buf.vb2_queue = src_vq;
155 mtk_vcodec_enc_set_default_params(ctx);
156
157 if (v4l2_fh_is_singular(&ctx->fh)) {
158 /*
159 * load fireware to checks if it was loaded already and
160 * does nothing in that case
161 */
162 ret = mtk_vcodec_fw_load_firmware(dev->fw_handler);
163 if (ret < 0) {
164 /*
165 * Return 0 if downloading firmware successfully,
166 * otherwise it is failed
167 */
168 mtk_v4l2_venc_err(ctx, "vpu_load_firmware failed!");
169 goto err_load_fw;
170 }
171
172 dev->enc_capability =
173 mtk_vcodec_fw_get_venc_capa(dev->fw_handler);
174 mtk_v4l2_venc_dbg(0, ctx, "encoder capability %x", dev->enc_capability);
175 }
176
177 mtk_v4l2_venc_dbg(2, ctx, "Create instance [%d]@%p m2m_ctx=%p ",
178 ctx->id, ctx, ctx->m2m_ctx);
179
180 list_add(&ctx->list, &dev->ctx_list);
181
182 mutex_unlock(&dev->dev_mutex);
183 mtk_v4l2_venc_dbg(0, ctx, "%s encoder [%d]", dev_name(&dev->plat_dev->dev),
184 ctx->id);
185 return ret;
186
187 /* Deinit when failure occurred */
188 err_load_fw:
189 v4l2_m2m_ctx_release(ctx->m2m_ctx);
190 err_m2m_ctx_init:
191 v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
192 err_ctrls_setup:
193 v4l2_fh_del(&ctx->fh);
194 v4l2_fh_exit(&ctx->fh);
195 kfree(ctx);
196 mutex_unlock(&dev->dev_mutex);
197
198 return ret;
199 }
200
fops_vcodec_release(struct file * file)201 static int fops_vcodec_release(struct file *file)
202 {
203 struct mtk_vcodec_enc_dev *dev = video_drvdata(file);
204 struct mtk_vcodec_enc_ctx *ctx = fh_to_enc_ctx(file->private_data);
205
206 mtk_v4l2_venc_dbg(1, ctx, "[%d] encoder", ctx->id);
207 mutex_lock(&dev->dev_mutex);
208
209 v4l2_m2m_ctx_release(ctx->m2m_ctx);
210 mtk_vcodec_enc_release(ctx);
211 v4l2_fh_del(&ctx->fh);
212 v4l2_fh_exit(&ctx->fh);
213 v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
214
215 list_del_init(&ctx->list);
216 kfree(ctx);
217 mutex_unlock(&dev->dev_mutex);
218 return 0;
219 }
220
221 static const struct v4l2_file_operations mtk_vcodec_fops = {
222 .owner = THIS_MODULE,
223 .open = fops_vcodec_open,
224 .release = fops_vcodec_release,
225 .poll = v4l2_m2m_fop_poll,
226 .unlocked_ioctl = video_ioctl2,
227 .mmap = v4l2_m2m_fop_mmap,
228 };
229
mtk_vcodec_probe(struct platform_device * pdev)230 static int mtk_vcodec_probe(struct platform_device *pdev)
231 {
232 struct mtk_vcodec_enc_dev *dev;
233 struct video_device *vfd_enc;
234 phandle rproc_phandle;
235 enum mtk_vcodec_fw_type fw_type;
236 int ret;
237
238 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
239 if (!dev)
240 return -ENOMEM;
241
242 INIT_LIST_HEAD(&dev->ctx_list);
243 dev->plat_dev = pdev;
244
245 if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu",
246 &rproc_phandle)) {
247 fw_type = VPU;
248 } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp",
249 &rproc_phandle)) {
250 fw_type = SCP;
251 } else {
252 dev_err(&pdev->dev, "[MTK VCODEC] Could not get venc IPI device");
253 return -ENODEV;
254 }
255 dma_set_max_seg_size(&pdev->dev, UINT_MAX);
256
257 dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, ENCODER);
258 if (IS_ERR(dev->fw_handler))
259 return PTR_ERR(dev->fw_handler);
260
261 dev->venc_pdata = of_device_get_match_data(&pdev->dev);
262 ret = mtk_vcodec_init_enc_clk(dev);
263 if (ret < 0) {
264 dev_err(&pdev->dev, "[MTK VCODEC] Failed to get mtk vcodec clock source!");
265 goto err_enc_pm;
266 }
267
268 pm_runtime_enable(&pdev->dev);
269
270 dev->reg_base[dev->venc_pdata->core_id] =
271 devm_platform_ioremap_resource(pdev, 0);
272 if (IS_ERR(dev->reg_base[dev->venc_pdata->core_id])) {
273 ret = PTR_ERR(dev->reg_base[dev->venc_pdata->core_id]);
274 goto err_res;
275 }
276
277 dev->enc_irq = platform_get_irq(pdev, 0);
278 if (dev->enc_irq < 0) {
279 ret = dev->enc_irq;
280 goto err_res;
281 }
282
283 irq_set_status_flags(dev->enc_irq, IRQ_NOAUTOEN);
284 ret = devm_request_irq(&pdev->dev, dev->enc_irq,
285 mtk_vcodec_enc_irq_handler,
286 0, pdev->name, dev);
287 if (ret) {
288 dev_err(&pdev->dev,
289 "[MTK VCODEC] Failed to install dev->enc_irq %d (%d) core_id (%d)",
290 dev->enc_irq, ret, dev->venc_pdata->core_id);
291 ret = -EINVAL;
292 goto err_res;
293 }
294
295 mutex_init(&dev->enc_mutex);
296 mutex_init(&dev->dev_mutex);
297 spin_lock_init(&dev->irqlock);
298
299 snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
300 "[MTK_V4L2_VENC]");
301
302 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
303 if (ret) {
304 dev_err(&pdev->dev, "[MTK VCODEC] v4l2_device_register err=%d", ret);
305 goto err_res;
306 }
307
308 /* allocate video device for encoder and register it */
309 vfd_enc = video_device_alloc();
310 if (!vfd_enc) {
311 dev_err(&pdev->dev, "[MTK VCODEC] Failed to allocate video device");
312 ret = -ENOMEM;
313 goto err_enc_alloc;
314 }
315 vfd_enc->fops = &mtk_vcodec_fops;
316 vfd_enc->ioctl_ops = &mtk_venc_ioctl_ops;
317 vfd_enc->release = video_device_release;
318 vfd_enc->lock = &dev->dev_mutex;
319 vfd_enc->v4l2_dev = &dev->v4l2_dev;
320 vfd_enc->vfl_dir = VFL_DIR_M2M;
321 vfd_enc->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE |
322 V4L2_CAP_STREAMING;
323
324 snprintf(vfd_enc->name, sizeof(vfd_enc->name), "%s",
325 MTK_VCODEC_ENC_NAME);
326 video_set_drvdata(vfd_enc, dev);
327 dev->vfd_enc = vfd_enc;
328 platform_set_drvdata(pdev, dev);
329
330 dev->m2m_dev_enc = v4l2_m2m_init(&mtk_venc_m2m_ops);
331 if (IS_ERR((__force void *)dev->m2m_dev_enc)) {
332 dev_err(&pdev->dev, "[MTK VCODEC] Failed to init mem2mem enc device");
333 ret = PTR_ERR((__force void *)dev->m2m_dev_enc);
334 goto err_enc_mem_init;
335 }
336
337 dev->encode_workqueue =
338 alloc_ordered_workqueue(MTK_VCODEC_ENC_NAME,
339 WQ_MEM_RECLAIM |
340 WQ_FREEZABLE);
341 if (!dev->encode_workqueue) {
342 dev_err(&pdev->dev, "[MTK VCODEC] Failed to create encode workqueue");
343 ret = -EINVAL;
344 goto err_event_workq;
345 }
346
347 ret = video_register_device(vfd_enc, VFL_TYPE_VIDEO, -1);
348 if (ret) {
349 dev_err(&pdev->dev, "[MTK VCODEC] Failed to register video device");
350 goto err_enc_reg;
351 }
352
353 mtk_vcodec_dbgfs_init(dev, true);
354 dev_dbg(&pdev->dev, "[MTK VCODEC] encoder %d registered as /dev/video%d",
355 dev->venc_pdata->core_id, vfd_enc->num);
356
357 return 0;
358
359 err_enc_reg:
360 destroy_workqueue(dev->encode_workqueue);
361 err_event_workq:
362 v4l2_m2m_release(dev->m2m_dev_enc);
363 err_enc_mem_init:
364 video_unregister_device(vfd_enc);
365 err_enc_alloc:
366 v4l2_device_unregister(&dev->v4l2_dev);
367 err_res:
368 pm_runtime_disable(dev->pm.dev);
369 err_enc_pm:
370 mtk_vcodec_fw_release(dev->fw_handler);
371 return ret;
372 }
373
374 static const struct mtk_vcodec_enc_pdata mt8173_avc_pdata = {
375 .capture_formats = mtk_video_formats_capture_h264,
376 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_h264),
377 .output_formats = mtk_video_formats_output,
378 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
379 .min_bitrate = 64,
380 .max_bitrate = 60000000,
381 .core_id = VENC_SYS,
382 };
383
384 static const struct mtk_vcodec_enc_pdata mt8173_vp8_pdata = {
385 .capture_formats = mtk_video_formats_capture_vp8,
386 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_vp8),
387 .output_formats = mtk_video_formats_output,
388 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
389 .min_bitrate = 64,
390 .max_bitrate = 9000000,
391 .core_id = VENC_LT_SYS,
392 };
393
394 static const struct mtk_vcodec_enc_pdata mt8183_pdata = {
395 .uses_ext = true,
396 .capture_formats = mtk_video_formats_capture_h264,
397 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_h264),
398 .output_formats = mtk_video_formats_output,
399 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
400 .min_bitrate = 64,
401 .max_bitrate = 40000000,
402 .core_id = VENC_SYS,
403 };
404
405 static const struct mtk_vcodec_enc_pdata mt8188_pdata = {
406 .uses_ext = true,
407 .capture_formats = mtk_video_formats_capture_h264,
408 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_h264),
409 .output_formats = mtk_video_formats_output,
410 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
411 .min_bitrate = 64,
412 .max_bitrate = 50000000,
413 .core_id = VENC_SYS,
414 .uses_34bit = true,
415 };
416
417 static const struct mtk_vcodec_enc_pdata mt8192_pdata = {
418 .uses_ext = true,
419 .capture_formats = mtk_video_formats_capture_h264,
420 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_h264),
421 .output_formats = mtk_video_formats_output,
422 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
423 .min_bitrate = 64,
424 .max_bitrate = 100000000,
425 .core_id = VENC_SYS,
426 };
427
428 static const struct mtk_vcodec_enc_pdata mt8195_pdata = {
429 .uses_ext = true,
430 .capture_formats = mtk_video_formats_capture_h264,
431 .num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_h264),
432 .output_formats = mtk_video_formats_output,
433 .num_output_formats = ARRAY_SIZE(mtk_video_formats_output),
434 .min_bitrate = 64,
435 .max_bitrate = 100000000,
436 .core_id = VENC_SYS,
437 };
438
439 static const struct of_device_id mtk_vcodec_enc_match[] = {
440 {.compatible = "mediatek,mt8173-vcodec-enc",
441 .data = &mt8173_avc_pdata},
442 {.compatible = "mediatek,mt8173-vcodec-enc-vp8",
443 .data = &mt8173_vp8_pdata},
444 {.compatible = "mediatek,mt8183-vcodec-enc", .data = &mt8183_pdata},
445 {.compatible = "mediatek,mt8188-vcodec-enc", .data = &mt8188_pdata},
446 {.compatible = "mediatek,mt8192-vcodec-enc", .data = &mt8192_pdata},
447 {.compatible = "mediatek,mt8195-vcodec-enc", .data = &mt8195_pdata},
448 {},
449 };
450 MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match);
451
mtk_vcodec_enc_remove(struct platform_device * pdev)452 static void mtk_vcodec_enc_remove(struct platform_device *pdev)
453 {
454 struct mtk_vcodec_enc_dev *dev = platform_get_drvdata(pdev);
455
456 destroy_workqueue(dev->encode_workqueue);
457 if (dev->m2m_dev_enc)
458 v4l2_m2m_release(dev->m2m_dev_enc);
459
460 if (dev->vfd_enc)
461 video_unregister_device(dev->vfd_enc);
462
463 mtk_vcodec_dbgfs_deinit(&dev->dbgfs);
464 v4l2_device_unregister(&dev->v4l2_dev);
465 pm_runtime_disable(dev->pm.dev);
466 mtk_vcodec_fw_release(dev->fw_handler);
467 }
468
469 static struct platform_driver mtk_vcodec_enc_driver = {
470 .probe = mtk_vcodec_probe,
471 .remove_new = mtk_vcodec_enc_remove,
472 .driver = {
473 .name = MTK_VCODEC_ENC_NAME,
474 .of_match_table = mtk_vcodec_enc_match,
475 },
476 };
477
478 module_platform_driver(mtk_vcodec_enc_driver);
479
480
481 MODULE_LICENSE("GPL v2");
482 MODULE_DESCRIPTION("Mediatek video codec V4L2 encoder driver");
483