1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * AD7091RX Analog to Digital converter driver
4 *
5 * Copyright 2014-2019 Analog Devices Inc.
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/bitfield.h>
10 #include <linux/iio/events.h>
11 #include <linux/iio/iio.h>
12 #include <linux/interrupt.h>
13 #include <linux/module.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16
17 #include "ad7091r-base.h"
18
19 const struct iio_event_spec ad7091r_events[] = {
20 {
21 .type = IIO_EV_TYPE_THRESH,
22 .dir = IIO_EV_DIR_RISING,
23 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
24 BIT(IIO_EV_INFO_ENABLE),
25 },
26 {
27 .type = IIO_EV_TYPE_THRESH,
28 .dir = IIO_EV_DIR_FALLING,
29 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
30 BIT(IIO_EV_INFO_ENABLE),
31 },
32 {
33 .type = IIO_EV_TYPE_THRESH,
34 .dir = IIO_EV_DIR_EITHER,
35 .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
36 },
37 };
38 EXPORT_SYMBOL_NS_GPL(ad7091r_events, IIO_AD7091R);
39
ad7091r_set_channel(struct ad7091r_state * st,unsigned int channel)40 static int ad7091r_set_channel(struct ad7091r_state *st, unsigned int channel)
41 {
42 unsigned int dummy;
43 int ret;
44
45 /* AD7091R_REG_CHANNEL specified which channels to be converted */
46 ret = regmap_write(st->map, AD7091R_REG_CHANNEL,
47 BIT(channel) | (BIT(channel) << 8));
48 if (ret)
49 return ret;
50
51 /*
52 * There is a latency of one conversion before the channel conversion
53 * sequence is updated
54 */
55 return regmap_read(st->map, AD7091R_REG_RESULT, &dummy);
56 }
57
ad7091r_read_one(struct iio_dev * iio_dev,unsigned int channel,unsigned int * read_val)58 static int ad7091r_read_one(struct iio_dev *iio_dev,
59 unsigned int channel, unsigned int *read_val)
60 {
61 struct ad7091r_state *st = iio_priv(iio_dev);
62 unsigned int val;
63 int ret;
64
65 ret = ad7091r_set_channel(st, channel);
66 if (ret)
67 return ret;
68
69 ret = regmap_read(st->map, AD7091R_REG_RESULT, &val);
70 if (ret)
71 return ret;
72
73 if (st->chip_info->reg_result_chan_id(val) != channel)
74 return -EIO;
75
76 *read_val = AD7091R_REG_RESULT_CONV_RESULT(val);
77
78 return 0;
79 }
80
ad7091r_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)81 static int ad7091r_read_raw(struct iio_dev *iio_dev,
82 struct iio_chan_spec const *chan,
83 int *val, int *val2, long m)
84 {
85 struct ad7091r_state *st = iio_priv(iio_dev);
86 unsigned int read_val;
87 int ret;
88
89 mutex_lock(&st->lock);
90
91 switch (m) {
92 case IIO_CHAN_INFO_RAW:
93 if (st->mode != AD7091R_MODE_COMMAND) {
94 ret = -EBUSY;
95 goto unlock;
96 }
97
98 ret = ad7091r_read_one(iio_dev, chan->channel, &read_val);
99 if (ret)
100 goto unlock;
101
102 *val = read_val;
103 ret = IIO_VAL_INT;
104 break;
105
106 case IIO_CHAN_INFO_SCALE:
107 if (st->vref) {
108 ret = regulator_get_voltage(st->vref);
109 if (ret < 0)
110 goto unlock;
111
112 *val = ret / 1000;
113 } else {
114 *val = st->chip_info->vref_mV;
115 }
116
117 *val2 = chan->scan_type.realbits;
118 ret = IIO_VAL_FRACTIONAL_LOG2;
119 break;
120
121 default:
122 ret = -EINVAL;
123 break;
124 }
125
126 unlock:
127 mutex_unlock(&st->lock);
128 return ret;
129 }
130
ad7091r_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)131 static int ad7091r_read_event_config(struct iio_dev *indio_dev,
132 const struct iio_chan_spec *chan,
133 enum iio_event_type type,
134 enum iio_event_direction dir)
135 {
136 struct ad7091r_state *st = iio_priv(indio_dev);
137 int val, ret;
138
139 switch (dir) {
140 case IIO_EV_DIR_RISING:
141 ret = regmap_read(st->map,
142 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
143 &val);
144 if (ret)
145 return ret;
146 return val != AD7091R_HIGH_LIMIT;
147 case IIO_EV_DIR_FALLING:
148 ret = regmap_read(st->map,
149 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
150 &val);
151 if (ret)
152 return ret;
153 return val != AD7091R_LOW_LIMIT;
154 default:
155 return -EINVAL;
156 }
157 }
158
ad7091r_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)159 static int ad7091r_write_event_config(struct iio_dev *indio_dev,
160 const struct iio_chan_spec *chan,
161 enum iio_event_type type,
162 enum iio_event_direction dir, int state)
163 {
164 struct ad7091r_state *st = iio_priv(indio_dev);
165
166 if (state) {
167 return regmap_set_bits(st->map, AD7091R_REG_CONF,
168 AD7091R_REG_CONF_ALERT_EN);
169 } else {
170 /*
171 * Set thresholds either to 0 or to 2^12 - 1 as appropriate to
172 * prevent alerts and thus disable event generation.
173 */
174 switch (dir) {
175 case IIO_EV_DIR_RISING:
176 return regmap_write(st->map,
177 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
178 AD7091R_HIGH_LIMIT);
179 case IIO_EV_DIR_FALLING:
180 return regmap_write(st->map,
181 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
182 AD7091R_LOW_LIMIT);
183 default:
184 return -EINVAL;
185 }
186 }
187 }
188
ad7091r_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)189 static int ad7091r_read_event_value(struct iio_dev *indio_dev,
190 const struct iio_chan_spec *chan,
191 enum iio_event_type type,
192 enum iio_event_direction dir,
193 enum iio_event_info info, int *val, int *val2)
194 {
195 struct ad7091r_state *st = iio_priv(indio_dev);
196 int ret;
197
198 switch (info) {
199 case IIO_EV_INFO_VALUE:
200 switch (dir) {
201 case IIO_EV_DIR_RISING:
202 ret = regmap_read(st->map,
203 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
204 val);
205 if (ret)
206 return ret;
207 return IIO_VAL_INT;
208 case IIO_EV_DIR_FALLING:
209 ret = regmap_read(st->map,
210 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
211 val);
212 if (ret)
213 return ret;
214 return IIO_VAL_INT;
215 default:
216 return -EINVAL;
217 }
218 case IIO_EV_INFO_HYSTERESIS:
219 ret = regmap_read(st->map,
220 AD7091R_REG_CH_HYSTERESIS(chan->channel),
221 val);
222 if (ret)
223 return ret;
224 return IIO_VAL_INT;
225 default:
226 return -EINVAL;
227 }
228 }
229
ad7091r_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)230 static int ad7091r_write_event_value(struct iio_dev *indio_dev,
231 const struct iio_chan_spec *chan,
232 enum iio_event_type type,
233 enum iio_event_direction dir,
234 enum iio_event_info info, int val, int val2)
235 {
236 struct ad7091r_state *st = iio_priv(indio_dev);
237
238 switch (info) {
239 case IIO_EV_INFO_VALUE:
240 switch (dir) {
241 case IIO_EV_DIR_RISING:
242 return regmap_write(st->map,
243 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
244 val);
245 case IIO_EV_DIR_FALLING:
246 return regmap_write(st->map,
247 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
248 val);
249 default:
250 return -EINVAL;
251 }
252 case IIO_EV_INFO_HYSTERESIS:
253 return regmap_write(st->map,
254 AD7091R_REG_CH_HYSTERESIS(chan->channel),
255 val);
256 default:
257 return -EINVAL;
258 }
259 }
260
261 static const struct iio_info ad7091r_info = {
262 .read_raw = ad7091r_read_raw,
263 .read_event_config = &ad7091r_read_event_config,
264 .write_event_config = &ad7091r_write_event_config,
265 .read_event_value = &ad7091r_read_event_value,
266 .write_event_value = &ad7091r_write_event_value,
267 };
268
ad7091r_event_handler(int irq,void * private)269 static irqreturn_t ad7091r_event_handler(int irq, void *private)
270 {
271 struct iio_dev *iio_dev = private;
272 struct ad7091r_state *st = iio_priv(iio_dev);
273 unsigned int i, read_val;
274 int ret;
275 s64 timestamp = iio_get_time_ns(iio_dev);
276
277 ret = regmap_read(st->map, AD7091R_REG_ALERT, &read_val);
278 if (ret)
279 return IRQ_HANDLED;
280
281 for (i = 0; i < st->chip_info->num_channels; i++) {
282 if (read_val & BIT(i * 2))
283 iio_push_event(iio_dev,
284 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i,
285 IIO_EV_TYPE_THRESH,
286 IIO_EV_DIR_RISING), timestamp);
287 if (read_val & BIT(i * 2 + 1))
288 iio_push_event(iio_dev,
289 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, i,
290 IIO_EV_TYPE_THRESH,
291 IIO_EV_DIR_FALLING), timestamp);
292 }
293
294 return IRQ_HANDLED;
295 }
296
ad7091r_remove(void * data)297 static void ad7091r_remove(void *data)
298 {
299 struct ad7091r_state *st = data;
300
301 regulator_disable(st->vref);
302 }
303
ad7091r_probe(struct device * dev,const struct ad7091r_init_info * init_info,int irq)304 int ad7091r_probe(struct device *dev, const struct ad7091r_init_info *init_info,
305 int irq)
306 {
307 struct iio_dev *iio_dev;
308 struct ad7091r_state *st;
309 int ret;
310
311 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
312 if (!iio_dev)
313 return -ENOMEM;
314
315 st = iio_priv(iio_dev);
316 st->dev = dev;
317 init_info->init_adc_regmap(st, init_info->regmap_config);
318 if (IS_ERR(st->map))
319 return dev_err_probe(st->dev, PTR_ERR(st->map),
320 "Error initializing regmap\n");
321
322 iio_dev->info = &ad7091r_info;
323 iio_dev->modes = INDIO_DIRECT_MODE;
324
325 if (init_info->setup) {
326 ret = init_info->setup(st);
327 if (ret < 0)
328 return ret;
329 }
330
331 if (irq) {
332 st->chip_info = init_info->info_irq;
333 ret = regmap_update_bits(st->map, AD7091R_REG_CONF,
334 AD7091R_REG_CONF_ALERT_EN, BIT(4));
335 if (ret)
336 return ret;
337
338 ret = devm_request_threaded_irq(dev, irq, NULL,
339 ad7091r_event_handler,
340 IRQF_TRIGGER_FALLING |
341 IRQF_ONESHOT,
342 st->chip_info->name, iio_dev);
343 if (ret)
344 return ret;
345 } else {
346 st->chip_info = init_info->info_no_irq;
347 }
348
349 iio_dev->name = st->chip_info->name;
350 iio_dev->num_channels = st->chip_info->num_channels;
351 iio_dev->channels = st->chip_info->channels;
352
353 st->vref = devm_regulator_get_optional(dev, "vref");
354 if (IS_ERR(st->vref)) {
355 if (PTR_ERR(st->vref) == -EPROBE_DEFER)
356 return -EPROBE_DEFER;
357
358 st->vref = NULL;
359 /* Enable internal vref */
360 ret = regmap_set_bits(st->map, AD7091R_REG_CONF,
361 AD7091R_REG_CONF_INT_VREF);
362 if (ret)
363 return dev_err_probe(st->dev, ret,
364 "Error on enable internal reference\n");
365 } else {
366 ret = regulator_enable(st->vref);
367 if (ret)
368 return ret;
369 ret = devm_add_action_or_reset(dev, ad7091r_remove, st);
370 if (ret)
371 return ret;
372 }
373
374 /* Use command mode by default to convert only desired channels*/
375 ret = st->chip_info->set_mode(st, AD7091R_MODE_COMMAND);
376 if (ret)
377 return ret;
378
379 return devm_iio_device_register(dev, iio_dev);
380 }
381 EXPORT_SYMBOL_NS_GPL(ad7091r_probe, IIO_AD7091R);
382
ad7091r_writeable_reg(struct device * dev,unsigned int reg)383 bool ad7091r_writeable_reg(struct device *dev, unsigned int reg)
384 {
385 switch (reg) {
386 case AD7091R_REG_RESULT:
387 case AD7091R_REG_ALERT:
388 return false;
389 default:
390 return true;
391 }
392 }
393 EXPORT_SYMBOL_NS_GPL(ad7091r_writeable_reg, IIO_AD7091R);
394
ad7091r_volatile_reg(struct device * dev,unsigned int reg)395 bool ad7091r_volatile_reg(struct device *dev, unsigned int reg)
396 {
397 switch (reg) {
398 case AD7091R_REG_RESULT:
399 case AD7091R_REG_ALERT:
400 return true;
401 default:
402 return false;
403 }
404 }
405 EXPORT_SYMBOL_NS_GPL(ad7091r_volatile_reg, IIO_AD7091R);
406
407 MODULE_AUTHOR("Beniamin Bia <beniamin.bia@analog.com>");
408 MODULE_DESCRIPTION("Analog Devices AD7091Rx multi-channel converters");
409 MODULE_LICENSE("GPL v2");
410