1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5
6 #include "xe_guc_hwconfig.h"
7
8 #include <drm/drm_managed.h>
9
10 #include "abi/guc_actions_abi.h"
11 #include "xe_bo.h"
12 #include "xe_device.h"
13 #include "xe_gt.h"
14 #include "xe_guc.h"
15 #include "xe_map.h"
16
send_get_hwconfig(struct xe_guc * guc,u32 ggtt_addr,u32 size)17 static int send_get_hwconfig(struct xe_guc *guc, u32 ggtt_addr, u32 size)
18 {
19 u32 action[] = {
20 XE_GUC_ACTION_GET_HWCONFIG,
21 lower_32_bits(ggtt_addr),
22 upper_32_bits(ggtt_addr),
23 size,
24 };
25
26 return xe_guc_mmio_send(guc, action, ARRAY_SIZE(action));
27 }
28
guc_hwconfig_size(struct xe_guc * guc,u32 * size)29 static int guc_hwconfig_size(struct xe_guc *guc, u32 *size)
30 {
31 int ret = send_get_hwconfig(guc, 0, 0);
32
33 if (ret < 0)
34 return ret;
35
36 *size = ret;
37 return 0;
38 }
39
guc_hwconfig_copy(struct xe_guc * guc)40 static int guc_hwconfig_copy(struct xe_guc *guc)
41 {
42 int ret = send_get_hwconfig(guc, xe_bo_ggtt_addr(guc->hwconfig.bo),
43 guc->hwconfig.size);
44
45 if (ret < 0)
46 return ret;
47
48 return 0;
49 }
50
xe_guc_hwconfig_init(struct xe_guc * guc)51 int xe_guc_hwconfig_init(struct xe_guc *guc)
52 {
53 struct xe_device *xe = guc_to_xe(guc);
54 struct xe_gt *gt = guc_to_gt(guc);
55 struct xe_tile *tile = gt_to_tile(gt);
56 struct xe_bo *bo;
57 u32 size;
58 int err;
59
60 /* Initialization already done */
61 if (guc->hwconfig.bo)
62 return 0;
63
64 /*
65 * All hwconfig the same across GTs so only GT0 needs to be configured
66 */
67 if (gt->info.id != XE_GT0)
68 return 0;
69
70 /* ADL_P, DG2+ supports hwconfig table */
71 if (GRAPHICS_VERx100(xe) < 1255 && xe->info.platform != XE_ALDERLAKE_P)
72 return 0;
73
74 err = guc_hwconfig_size(guc, &size);
75 if (err)
76 return err;
77 if (!size)
78 return -EINVAL;
79
80 bo = xe_managed_bo_create_pin_map(xe, tile, PAGE_ALIGN(size),
81 XE_BO_CREATE_VRAM_IF_DGFX(tile) |
82 XE_BO_CREATE_GGTT_BIT);
83 if (IS_ERR(bo))
84 return PTR_ERR(bo);
85 guc->hwconfig.bo = bo;
86 guc->hwconfig.size = size;
87
88 return guc_hwconfig_copy(guc);
89 }
90
xe_guc_hwconfig_size(struct xe_guc * guc)91 u32 xe_guc_hwconfig_size(struct xe_guc *guc)
92 {
93 return !guc->hwconfig.bo ? 0 : guc->hwconfig.size;
94 }
95
xe_guc_hwconfig_copy(struct xe_guc * guc,void * dst)96 void xe_guc_hwconfig_copy(struct xe_guc *guc, void *dst)
97 {
98 struct xe_device *xe = guc_to_xe(guc);
99
100 XE_WARN_ON(!guc->hwconfig.bo);
101
102 xe_map_memcpy_from(xe, dst, &guc->hwconfig.bo->vmap, 0,
103 guc->hwconfig.size);
104 }
105