1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2023 Intel Corporation
4 */
5
6 #include "i915_drv.h"
7 #include "i915_irq.h"
8 #include "i915_reg.h"
9 #include "intel_uncore.h"
10
gen3_irq_reset(struct intel_uncore * uncore,i915_reg_t imr,i915_reg_t iir,i915_reg_t ier)11 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
12 i915_reg_t iir, i915_reg_t ier)
13 {
14 intel_uncore_write(uncore, imr, 0xffffffff);
15 intel_uncore_posting_read(uncore, imr);
16
17 intel_uncore_write(uncore, ier, 0);
18
19 /* IIR can theoretically queue up two events. Be paranoid. */
20 intel_uncore_write(uncore, iir, 0xffffffff);
21 intel_uncore_posting_read(uncore, iir);
22 intel_uncore_write(uncore, iir, 0xffffffff);
23 intel_uncore_posting_read(uncore, iir);
24 }
25
26 /*
27 * We should clear IMR at preinstall/uninstall, and just check at postinstall.
28 */
gen3_assert_iir_is_zero(struct intel_uncore * uncore,i915_reg_t reg)29 void gen3_assert_iir_is_zero(struct intel_uncore *uncore, i915_reg_t reg)
30 {
31 struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
32 u32 val = intel_uncore_read(uncore, reg);
33
34 if (val == 0)
35 return;
36
37 drm_WARN(&xe->drm, 1,
38 "Interrupt register 0x%x is not zero: 0x%08x\n",
39 i915_mmio_reg_offset(reg), val);
40 intel_uncore_write(uncore, reg, 0xffffffff);
41 intel_uncore_posting_read(uncore, reg);
42 intel_uncore_write(uncore, reg, 0xffffffff);
43 intel_uncore_posting_read(uncore, reg);
44 }
45
gen3_irq_init(struct intel_uncore * uncore,i915_reg_t imr,u32 imr_val,i915_reg_t ier,u32 ier_val,i915_reg_t iir)46 void gen3_irq_init(struct intel_uncore *uncore,
47 i915_reg_t imr, u32 imr_val,
48 i915_reg_t ier, u32 ier_val,
49 i915_reg_t iir)
50 {
51 gen3_assert_iir_is_zero(uncore, iir);
52
53 intel_uncore_write(uncore, ier, ier_val);
54 intel_uncore_write(uncore, imr, imr_val);
55 intel_uncore_posting_read(uncore, imr);
56 }
57
intel_irqs_enabled(struct xe_device * xe)58 bool intel_irqs_enabled(struct xe_device *xe)
59 {
60 /*
61 * XXX: i915 has a racy handling of the irq.enabled, since it doesn't
62 * lock its transitions. Because of that, the irq.enabled sometimes
63 * is not read with the irq.lock in place.
64 * However, the most critical cases like vblank and page flips are
65 * properly using the locks.
66 * We cannot take the lock in here or run any kind of assert because
67 * of i915 inconsistency.
68 * But at this point the xe irq is better protected against races,
69 * although the full solution would be protecting the i915 side.
70 */
71 return xe->irq.enabled;
72 }
73
intel_synchronize_irq(struct xe_device * xe)74 void intel_synchronize_irq(struct xe_device *xe)
75 {
76 synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
77 }
78