1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2014 - 2021 Intel Corporation */
3 #ifndef ADF_DRV_H
4 #define ADF_DRV_H
5
6 #include <linux/list.h>
7 #include <linux/pci.h>
8 #include "adf_accel_devices.h"
9 #include "icp_qat_fw_loader_handle.h"
10 #include "icp_qat_hal.h"
11
12 #define ADF_MAJOR_VERSION 0
13 #define ADF_MINOR_VERSION 6
14 #define ADF_BUILD_VERSION 0
15 #define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \
16 __stringify(ADF_MINOR_VERSION) "." \
17 __stringify(ADF_BUILD_VERSION)
18
19 #define ADF_STATUS_RESTARTING 0
20 #define ADF_STATUS_STARTING 1
21 #define ADF_STATUS_CONFIGURED 2
22 #define ADF_STATUS_STARTED 3
23 #define ADF_STATUS_AE_INITIALISED 4
24 #define ADF_STATUS_AE_UCODE_LOADED 5
25 #define ADF_STATUS_AE_STARTED 6
26 #define ADF_STATUS_PF_RUNNING 7
27 #define ADF_STATUS_IRQ_ALLOCATED 8
28 #define ADF_STATUS_CRYPTO_ALGS_REGISTERED 9
29 #define ADF_STATUS_COMP_ALGS_REGISTERED 10
30
31 enum adf_dev_reset_mode {
32 ADF_DEV_RESET_ASYNC = 0,
33 ADF_DEV_RESET_SYNC
34 };
35
36 enum adf_event {
37 ADF_EVENT_INIT = 0,
38 ADF_EVENT_START,
39 ADF_EVENT_STOP,
40 ADF_EVENT_SHUTDOWN,
41 ADF_EVENT_RESTARTING,
42 ADF_EVENT_RESTARTED,
43 };
44
45 struct service_hndl {
46 int (*event_hld)(struct adf_accel_dev *accel_dev,
47 enum adf_event event);
48 unsigned long init_status[ADF_DEVS_ARRAY_SIZE];
49 unsigned long start_status[ADF_DEVS_ARRAY_SIZE];
50 char *name;
51 struct list_head list;
52 };
53
54 int adf_service_register(struct service_hndl *service);
55 int adf_service_unregister(struct service_hndl *service);
56
57 int adf_dev_up(struct adf_accel_dev *accel_dev, bool init_config);
58 int adf_dev_down(struct adf_accel_dev *accel_dev, bool cache_config);
59 int adf_dev_restart(struct adf_accel_dev *accel_dev);
60
61 void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
62 void adf_clean_vf_map(bool);
63 int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
64 struct adf_accel_dev *pf);
65 void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
66 struct adf_accel_dev *pf);
67 struct list_head *adf_devmgr_get_head(void);
68 struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id);
69 struct adf_accel_dev *adf_devmgr_get_first(void);
70 struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
71 int adf_devmgr_verify_id(u32 id);
72 void adf_devmgr_get_num_dev(u32 *num);
73 int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
74 int adf_dev_started(struct adf_accel_dev *accel_dev);
75 int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
76 int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
77 int adf_ae_init(struct adf_accel_dev *accel_dev);
78 int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
79 int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
80 void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
81 int adf_ae_start(struct adf_accel_dev *accel_dev);
82 int adf_ae_stop(struct adf_accel_dev *accel_dev);
83
84 extern const struct pci_error_handlers adf_err_handler;
85 void adf_reset_sbr(struct adf_accel_dev *accel_dev);
86 void adf_reset_flr(struct adf_accel_dev *accel_dev);
87 void adf_dev_restore(struct adf_accel_dev *accel_dev);
88 int adf_init_aer(void);
89 void adf_exit_aer(void);
90 int adf_init_arb(struct adf_accel_dev *accel_dev);
91 void adf_exit_arb(struct adf_accel_dev *accel_dev);
92 void adf_update_ring_arb(struct adf_etr_ring_data *ring);
93
94 int adf_dev_get(struct adf_accel_dev *accel_dev);
95 void adf_dev_put(struct adf_accel_dev *accel_dev);
96 int adf_dev_in_use(struct adf_accel_dev *accel_dev);
97 int adf_init_etr_data(struct adf_accel_dev *accel_dev);
98 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
99 int qat_crypto_register(void);
100 int qat_crypto_unregister(void);
101 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev);
102 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
103 void qat_crypto_put_instance(struct qat_crypto_instance *inst);
104 void qat_alg_callback(void *resp);
105 void qat_alg_asym_callback(void *resp);
106 int qat_algs_register(void);
107 void qat_algs_unregister(void);
108 int qat_asym_algs_register(void);
109 void qat_asym_algs_unregister(void);
110
111 struct qat_compression_instance *qat_compression_get_instance_node(int node);
112 void qat_compression_put_instance(struct qat_compression_instance *inst);
113 int qat_compression_register(void);
114 int qat_compression_unregister(void);
115 int qat_comp_algs_register(void);
116 void qat_comp_algs_unregister(void);
117 void qat_comp_alg_callback(void *resp);
118
119 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
120 void adf_isr_resource_free(struct adf_accel_dev *accel_dev);
121 int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev);
122 void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev);
123
124 int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev);
125
126 int adf_sysfs_init(struct adf_accel_dev *accel_dev);
127
128 int qat_hal_init(struct adf_accel_dev *accel_dev);
129 void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
130 int qat_hal_start(struct icp_qat_fw_loader_handle *handle);
131 void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
132 unsigned int ctx_mask);
133 void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
134 int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
135 void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
136 unsigned char ae, unsigned int ctx_mask);
137 int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
138 unsigned int ae);
139 int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
140 unsigned char ae, enum icp_qat_uof_regtype lm_type,
141 unsigned char mode);
142 int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
143 unsigned char ae, unsigned char mode);
144 int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
145 unsigned char ae, unsigned char mode);
146 void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
147 unsigned char ae, unsigned int ctx_mask, unsigned int upc);
148 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
149 unsigned char ae, unsigned int uaddr,
150 unsigned int words_num, u64 *uword);
151 void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
152 unsigned int uword_addr, unsigned int words_num,
153 unsigned int *data);
154 int qat_hal_get_ins_num(void);
155 int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
156 unsigned char ae,
157 struct icp_qat_uof_batch_init *lm_init_header);
158 int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
159 unsigned char ae, unsigned long ctx_mask,
160 enum icp_qat_uof_regtype reg_type,
161 unsigned short reg_num, unsigned int regdata);
162 int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
163 unsigned char ae, unsigned long ctx_mask,
164 enum icp_qat_uof_regtype reg_type,
165 unsigned short reg_num, unsigned int regdata);
166 int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
167 unsigned char ae, unsigned long ctx_mask,
168 enum icp_qat_uof_regtype reg_type,
169 unsigned short reg_num, unsigned int regdata);
170 int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
171 unsigned char ae, unsigned long ctx_mask,
172 unsigned short reg_num, unsigned int regdata);
173 void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle,
174 unsigned char ae, unsigned char mode);
175 int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
176 void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle);
177 int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr,
178 int mem_size);
179 int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle,
180 void *addr_ptr, u32 mem_size, const char *obj_name);
181 int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle,
182 unsigned int cfg_ae_mask);
183 int adf_init_misc_wq(void);
184 void adf_exit_misc_wq(void);
185 bool adf_misc_wq_queue_work(struct work_struct *work);
186 bool adf_misc_wq_queue_delayed_work(struct delayed_work *work,
187 unsigned long delay);
188 #if defined(CONFIG_PCI_IOV)
189 int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
190 void adf_disable_sriov(struct adf_accel_dev *accel_dev);
191 void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask);
192 void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev);
193 bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev);
194 bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr);
195 int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev);
196 void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
197 void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
198 void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info);
199 int adf_init_pf_wq(void);
200 void adf_exit_pf_wq(void);
201 int adf_init_vf_wq(void);
202 void adf_exit_vf_wq(void);
203 void adf_flush_vf_wq(struct adf_accel_dev *accel_dev);
204 #else
205 #define adf_sriov_configure NULL
206
adf_disable_sriov(struct adf_accel_dev * accel_dev)207 static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
208 {
209 }
210
adf_init_pf_wq(void)211 static inline int adf_init_pf_wq(void)
212 {
213 return 0;
214 }
215
adf_exit_pf_wq(void)216 static inline void adf_exit_pf_wq(void)
217 {
218 }
219
adf_init_vf_wq(void)220 static inline int adf_init_vf_wq(void)
221 {
222 return 0;
223 }
224
adf_exit_vf_wq(void)225 static inline void adf_exit_vf_wq(void)
226 {
227 }
228
229 #endif
230
adf_get_pmisc_base(struct adf_accel_dev * accel_dev)231 static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev)
232 {
233 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
234 struct adf_bar *pmisc;
235
236 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
237
238 return pmisc->virt_addr;
239 }
240
adf_get_aram_base(struct adf_accel_dev * accel_dev)241 static inline void __iomem *adf_get_aram_base(struct adf_accel_dev *accel_dev)
242 {
243 struct adf_hw_device_data *hw_data = accel_dev->hw_device;
244 struct adf_bar *param;
245
246 param = &GET_BARS(accel_dev)[hw_data->get_sram_bar_id(hw_data)];
247
248 return param->virt_addr;
249 }
250
251 #endif
252