1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright 2022, Athira Rajeev, IBM Corp.
4 * Copyright 2022, Madhavan Srinivasan, IBM Corp.
5 * Copyright 2022, Kajol Jain, IBM Corp.
6 */
7
8 #include <sys/stat.h>
9 #include "../event.h"
10
11 #define POWER11 0x82
12 #define POWER10 0x80
13 #define POWER9 0x4e
14 #define PERF_POWER9_MASK 0x7f8ffffffffffff
15 #define PERF_POWER10_MASK 0x7ffffffffffffff
16 #define PERF_POWER11_MASK PERF_POWER10_MASK
17
18 #define MMCR0_FC56 0x00000010UL /* freeze counters 5 and 6 */
19 #define MMCR0_PMCCEXT 0x00000200UL /* PMCCEXT control */
20 #define MMCR1_RSQ 0x200000000000ULL /* radix scope qual field */
21 #define BHRB_DISABLE 0x2000000000ULL /* MMCRA BHRB DISABLE bit */
22
23 extern int ev_mask_pmcxsel, ev_shift_pmcxsel;
24 extern int ev_mask_marked, ev_shift_marked;
25 extern int ev_mask_comb, ev_shift_comb;
26 extern int ev_mask_unit, ev_shift_unit;
27 extern int ev_mask_pmc, ev_shift_pmc;
28 extern int ev_mask_cache, ev_shift_cache;
29 extern int ev_mask_sample, ev_shift_sample;
30 extern int ev_mask_thd_sel, ev_shift_thd_sel;
31 extern int ev_mask_thd_start, ev_shift_thd_start;
32 extern int ev_mask_thd_stop, ev_shift_thd_stop;
33 extern int ev_mask_thd_cmp, ev_shift_thd_cmp;
34 extern int ev_mask_sm, ev_shift_sm;
35 extern int ev_mask_rsq, ev_shift_rsq;
36 extern int ev_mask_l2l3, ev_shift_l2l3;
37 extern int ev_mask_mmcr3_src, ev_shift_mmcr3_src;
38 extern int pvr;
39 extern u64 platform_extended_mask;
40 extern int check_pvr_for_sampling_tests(void);
41 extern int platform_check_for_tests(void);
42 extern int check_extended_regs_support(void);
43 extern u64 perf_get_platform_reg_mask(void);
44
45 /*
46 * Event code field extraction macro.
47 * Raw event code is combination of multiple
48 * fields. Macro to extract individual fields
49 *
50 * x - Raw event code value
51 * y - Field to extract
52 */
53 #define EV_CODE_EXTRACT(x, y) \
54 ((x >> ev_shift_##y) & ev_mask_##y)
55
56 void *event_sample_buf_mmap(int fd, int mmap_pages);
57 void *__event_read_samples(void *sample_buff, size_t *size, u64 *sample_count);
58 int collect_samples(void *sample_buff);
59 u64 *get_intr_regs(struct event *event, void *sample_buff);
60 u64 get_reg_value(u64 *intr_regs, char *register_name);
61 int get_thresh_cmp_val(struct event event);
62 bool check_for_generic_compat_pmu(void);
63 bool check_for_compat_mode(void);
64
get_mmcr0_fc56(u64 mmcr0,int pmc)65 static inline int get_mmcr0_fc56(u64 mmcr0, int pmc)
66 {
67 return (mmcr0 & MMCR0_FC56);
68 }
69
get_mmcr0_pmccext(u64 mmcr0,int pmc)70 static inline int get_mmcr0_pmccext(u64 mmcr0, int pmc)
71 {
72 return (mmcr0 & MMCR0_PMCCEXT);
73 }
74
get_mmcr0_pmao(u64 mmcr0,int pmc)75 static inline int get_mmcr0_pmao(u64 mmcr0, int pmc)
76 {
77 return ((mmcr0 >> 7) & 0x1);
78 }
79
get_mmcr0_cc56run(u64 mmcr0,int pmc)80 static inline int get_mmcr0_cc56run(u64 mmcr0, int pmc)
81 {
82 return ((mmcr0 >> 8) & 0x1);
83 }
84
get_mmcr0_pmcjce(u64 mmcr0,int pmc)85 static inline int get_mmcr0_pmcjce(u64 mmcr0, int pmc)
86 {
87 return ((mmcr0 >> 14) & 0x1);
88 }
89
get_mmcr0_pmc1ce(u64 mmcr0,int pmc)90 static inline int get_mmcr0_pmc1ce(u64 mmcr0, int pmc)
91 {
92 return ((mmcr0 >> 15) & 0x1);
93 }
94
get_mmcr0_pmae(u64 mmcr0,int pmc)95 static inline int get_mmcr0_pmae(u64 mmcr0, int pmc)
96 {
97 return ((mmcr0 >> 27) & 0x1);
98 }
99
get_mmcr1_pmcxsel(u64 mmcr1,int pmc)100 static inline int get_mmcr1_pmcxsel(u64 mmcr1, int pmc)
101 {
102 return ((mmcr1 >> ((24 - (((pmc) - 1) * 8))) & 0xff));
103 }
104
get_mmcr1_unit(u64 mmcr1,int pmc)105 static inline int get_mmcr1_unit(u64 mmcr1, int pmc)
106 {
107 return ((mmcr1 >> ((60 - (4 * ((pmc) - 1))))) & 0xf);
108 }
109
get_mmcr1_comb(u64 mmcr1,int pmc)110 static inline int get_mmcr1_comb(u64 mmcr1, int pmc)
111 {
112 return ((mmcr1 >> (38 - ((pmc - 1) * 2))) & 0x3);
113 }
114
get_mmcr1_cache(u64 mmcr1,int pmc)115 static inline int get_mmcr1_cache(u64 mmcr1, int pmc)
116 {
117 return ((mmcr1 >> 46) & 0x3);
118 }
119
get_mmcr1_rsq(u64 mmcr1,int pmc)120 static inline int get_mmcr1_rsq(u64 mmcr1, int pmc)
121 {
122 return mmcr1 & MMCR1_RSQ;
123 }
124
get_mmcr2_fcs(u64 mmcr2,int pmc)125 static inline int get_mmcr2_fcs(u64 mmcr2, int pmc)
126 {
127 return ((mmcr2 & (1ull << (63 - (((pmc) - 1) * 9)))) >> (63 - (((pmc) - 1) * 9)));
128 }
129
get_mmcr2_fcp(u64 mmcr2,int pmc)130 static inline int get_mmcr2_fcp(u64 mmcr2, int pmc)
131 {
132 return ((mmcr2 & (1ull << (62 - (((pmc) - 1) * 9)))) >> (62 - (((pmc) - 1) * 9)));
133 }
134
get_mmcr2_fcpc(u64 mmcr2,int pmc)135 static inline int get_mmcr2_fcpc(u64 mmcr2, int pmc)
136 {
137 return ((mmcr2 & (1ull << (61 - (((pmc) - 1) * 9)))) >> (61 - (((pmc) - 1) * 9)));
138 }
139
get_mmcr2_fcm1(u64 mmcr2,int pmc)140 static inline int get_mmcr2_fcm1(u64 mmcr2, int pmc)
141 {
142 return ((mmcr2 & (1ull << (60 - (((pmc) - 1) * 9)))) >> (60 - (((pmc) - 1) * 9)));
143 }
144
get_mmcr2_fcm0(u64 mmcr2,int pmc)145 static inline int get_mmcr2_fcm0(u64 mmcr2, int pmc)
146 {
147 return ((mmcr2 & (1ull << (59 - (((pmc) - 1) * 9)))) >> (59 - (((pmc) - 1) * 9)));
148 }
149
get_mmcr2_fcwait(u64 mmcr2,int pmc)150 static inline int get_mmcr2_fcwait(u64 mmcr2, int pmc)
151 {
152 return ((mmcr2 & (1ull << (58 - (((pmc) - 1) * 9)))) >> (58 - (((pmc) - 1) * 9)));
153 }
154
get_mmcr2_fch(u64 mmcr2,int pmc)155 static inline int get_mmcr2_fch(u64 mmcr2, int pmc)
156 {
157 return ((mmcr2 & (1ull << (57 - (((pmc) - 1) * 9)))) >> (57 - (((pmc) - 1) * 9)));
158 }
159
get_mmcr2_fcti(u64 mmcr2,int pmc)160 static inline int get_mmcr2_fcti(u64 mmcr2, int pmc)
161 {
162 return ((mmcr2 & (1ull << (56 - (((pmc) - 1) * 9)))) >> (56 - (((pmc) - 1) * 9)));
163 }
164
get_mmcr2_fcta(u64 mmcr2,int pmc)165 static inline int get_mmcr2_fcta(u64 mmcr2, int pmc)
166 {
167 return ((mmcr2 & (1ull << (55 - (((pmc) - 1) * 9)))) >> (55 - (((pmc) - 1) * 9)));
168 }
169
get_mmcr2_l2l3(u64 mmcr2,int pmc)170 static inline int get_mmcr2_l2l3(u64 mmcr2, int pmc)
171 {
172 if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
173 return ((mmcr2 & 0xf8) >> 3);
174 return 0;
175 }
176
get_mmcr3_src(u64 mmcr3,int pmc)177 static inline int get_mmcr3_src(u64 mmcr3, int pmc)
178 {
179 if (!have_hwcap2(PPC_FEATURE2_ARCH_3_1))
180 return 0;
181 return ((mmcr3 >> ((49 - (15 * ((pmc) - 1))))) & 0x7fff);
182 }
183
get_mmcra_thd_cmp(u64 mmcra,int pmc)184 static inline int get_mmcra_thd_cmp(u64 mmcra, int pmc)
185 {
186 if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
187 return ((mmcra >> 45) & 0x7ff);
188 return ((mmcra >> 45) & 0x3ff);
189 }
190
get_mmcra_sm(u64 mmcra,int pmc)191 static inline int get_mmcra_sm(u64 mmcra, int pmc)
192 {
193 return ((mmcra >> 42) & 0x3);
194 }
195
get_mmcra_bhrb_disable(u64 mmcra,int pmc)196 static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc)
197 {
198 if (have_hwcap2(PPC_FEATURE2_ARCH_3_1))
199 return mmcra & BHRB_DISABLE;
200 return 0;
201 }
202
get_mmcra_ifm(u64 mmcra,int pmc)203 static inline int get_mmcra_ifm(u64 mmcra, int pmc)
204 {
205 return ((mmcra >> 30) & 0x3);
206 }
207
get_mmcra_thd_sel(u64 mmcra,int pmc)208 static inline int get_mmcra_thd_sel(u64 mmcra, int pmc)
209 {
210 return ((mmcra >> 16) & 0x7);
211 }
212
get_mmcra_thd_start(u64 mmcra,int pmc)213 static inline int get_mmcra_thd_start(u64 mmcra, int pmc)
214 {
215 return ((mmcra >> 12) & 0xf);
216 }
217
get_mmcra_thd_stop(u64 mmcra,int pmc)218 static inline int get_mmcra_thd_stop(u64 mmcra, int pmc)
219 {
220 return ((mmcra >> 8) & 0xf);
221 }
222
get_mmcra_rand_samp_elig(u64 mmcra,int pmc)223 static inline int get_mmcra_rand_samp_elig(u64 mmcra, int pmc)
224 {
225 return ((mmcra >> 4) & 0x7);
226 }
227
get_mmcra_sample_mode(u64 mmcra,int pmc)228 static inline int get_mmcra_sample_mode(u64 mmcra, int pmc)
229 {
230 return ((mmcra >> 1) & 0x3);
231 }
232
get_mmcra_marked(u64 mmcra,int pmc)233 static inline int get_mmcra_marked(u64 mmcra, int pmc)
234 {
235 return mmcra & 0x1;
236 }
237