1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * rt715.c -- rt715 ALSA SoC audio driver
4 *
5 * Copyright(c) 2019 Realtek Semiconductor Corp.
6 *
7 * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
8 *
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/i2c.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/pm.h>
18 #include <linux/soundwire/sdw.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21 #include <linux/platform_device.h>
22 #include <linux/regulator/consumer.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/sdw.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 #include <sound/hda_verbs.h>
32
33 #include "rt715.h"
34
rt715_index_write(struct regmap * regmap,unsigned int reg,unsigned int value)35 static int rt715_index_write(struct regmap *regmap, unsigned int reg,
36 unsigned int value)
37 {
38 int ret;
39 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
40
41 ret = regmap_write(regmap, addr, value);
42 if (ret < 0) {
43 pr_err("%s: Failed to set private value: %08x <= %04x %d\n",
44 __func__, addr, value, ret);
45 }
46
47 return ret;
48 }
49
rt715_index_write_nid(struct regmap * regmap,unsigned int nid,unsigned int reg,unsigned int value)50 static int rt715_index_write_nid(struct regmap *regmap,
51 unsigned int nid, unsigned int reg, unsigned int value)
52 {
53 int ret;
54 unsigned int addr = ((RT715_PRIV_INDEX_W_H_2 | nid) << 8) | reg;
55
56 ret = regmap_write(regmap, addr, value);
57 if (ret < 0)
58 pr_err("%s: Failed to set private value: %06x <= %04x ret=%d\n",
59 __func__, addr, value, ret);
60
61 return ret;
62 }
63
rt715_index_read_nid(struct regmap * regmap,unsigned int nid,unsigned int reg,unsigned int * value)64 static int rt715_index_read_nid(struct regmap *regmap,
65 unsigned int nid, unsigned int reg, unsigned int *value)
66 {
67 int ret;
68 unsigned int addr = ((RT715_PRIV_INDEX_W_H_2 | nid) << 8) | reg;
69
70 *value = 0;
71 ret = regmap_read(regmap, addr, value);
72 if (ret < 0)
73 pr_err("%s: Failed to get private value: %06x => %04x ret=%d\n",
74 __func__, addr, *value, ret);
75
76 return ret;
77 }
78
rt715_index_update_bits(struct regmap * regmap,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)79 static int rt715_index_update_bits(struct regmap *regmap, unsigned int nid,
80 unsigned int reg, unsigned int mask, unsigned int val)
81 {
82 unsigned int tmp, orig;
83 int ret;
84
85 ret = rt715_index_read_nid(regmap, nid, reg, &orig);
86 if (ret < 0)
87 return ret;
88
89 tmp = orig & ~mask;
90 tmp |= val & mask;
91
92 return rt715_index_write_nid(regmap, nid, reg, tmp);
93 }
94
rt715_reset(struct regmap * regmap)95 static void rt715_reset(struct regmap *regmap)
96 {
97 regmap_write(regmap, RT715_FUNC_RESET, 0);
98 rt715_index_update_bits(regmap, RT715_VENDOR_REGISTERS,
99 RT715_VD_CLEAR_CTRL, RT715_CLEAR_HIDDEN_REG,
100 RT715_CLEAR_HIDDEN_REG);
101 }
102
103
rt715_get_gain(struct rt715_priv * rt715,unsigned int addr_h,unsigned int addr_l,unsigned int val_h,unsigned int * r_val,unsigned int * l_val)104 static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
105 unsigned int addr_l, unsigned int val_h,
106 unsigned int *r_val, unsigned int *l_val)
107 {
108 int ret;
109 /* R Channel */
110 *r_val = val_h << 8;
111 ret = regmap_read(rt715->regmap, addr_l, r_val);
112 if (ret < 0)
113 pr_err("Failed to get R channel gain.\n");
114
115 /* L Channel */
116 val_h |= 0x20;
117 *l_val = val_h << 8;
118 ret = regmap_read(rt715->regmap, addr_h, l_val);
119 if (ret < 0)
120 pr_err("Failed to get L channel gain.\n");
121 }
122
123 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
rt715_set_amp_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)124 static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
125 struct snd_ctl_elem_value *ucontrol)
126 {
127 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
128 struct snd_soc_dapm_context *dapm =
129 snd_soc_component_get_dapm(component);
130 struct soc_mixer_control *mc =
131 (struct soc_mixer_control *)kcontrol->private_value;
132 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
133 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
134 unsigned int read_ll, read_rl, i;
135 unsigned int k_vol_changed = 0;
136
137 for (i = 0; i < 2; i++) {
138 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_vol_ori[i]) {
139 k_vol_changed = 1;
140 break;
141 }
142 }
143
144 /* Can't use update bit function, so read the original value first */
145 addr_h = mc->reg;
146 addr_l = mc->rreg;
147
148 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
149 val_h = 0x80;
150 else /* input */
151 val_h = 0x0;
152
153 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
154
155 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
156 regmap_write(rt715->regmap,
157 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
158
159 /* L Channel */
160 rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0];
161 /* for gain */
162 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
163 if (val_ll > mc->max)
164 val_ll = mc->max;
165 /* keep mute status */
166 val_ll |= read_ll & 0x80;
167
168 /* R Channel */
169 rt715->kctl_2ch_vol_ori[1] = ucontrol->value.integer.value[1];
170 /* for gain */
171 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
172 if (val_lr > mc->max)
173 val_lr = mc->max;
174 /* keep mute status */
175 val_lr |= read_rl & 0x80;
176
177 for (i = 0; i < 3; i++) { /* retry 3 times at most */
178
179 if (val_ll == val_lr) {
180 /* Set both L/R channels at the same time */
181 val_h = (1 << mc->shift) | (3 << 4);
182 regmap_write(rt715->regmap, addr_h,
183 (val_h << 8) | val_ll);
184 regmap_write(rt715->regmap, addr_l,
185 (val_h << 8) | val_ll);
186 } else {
187 /* Lch*/
188 val_h = (1 << mc->shift) | (1 << 5);
189 regmap_write(rt715->regmap, addr_h,
190 (val_h << 8) | val_ll);
191 /* Rch */
192 val_h = (1 << mc->shift) | (1 << 4);
193 regmap_write(rt715->regmap, addr_l,
194 (val_h << 8) | val_lr);
195 }
196 /* check result */
197 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
198 val_h = 0x80;
199 else /* input */
200 val_h = 0x0;
201
202 rt715_get_gain(rt715, addr_h, addr_l, val_h,
203 &read_rl, &read_ll);
204 if (read_rl == val_lr && read_ll == val_ll)
205 break;
206 }
207
208 /* D0:power on state, D3: power saving mode */
209 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
210 regmap_write(rt715->regmap,
211 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
212 return k_vol_changed;
213 }
214
rt715_set_amp_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)215 static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
216 struct snd_ctl_elem_value *ucontrol)
217 {
218 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
219 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
220 struct soc_mixer_control *mc =
221 (struct soc_mixer_control *)kcontrol->private_value;
222 unsigned int addr_h, addr_l, val_h;
223 unsigned int read_ll, read_rl;
224
225 addr_h = mc->reg;
226 addr_l = mc->rreg;
227 if (mc->shift == RT715_DIR_OUT_SFT) /* output */
228 val_h = 0x80;
229 else /* input */
230 val_h = 0x0;
231
232 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
233
234 if (mc->invert) {
235 /* for mute status */
236 read_ll = !(read_ll & 0x80);
237 read_rl = !(read_rl & 0x80);
238 } else {
239 /* for gain */
240 read_ll = read_ll & 0x7f;
241 read_rl = read_rl & 0x7f;
242 }
243 ucontrol->value.integer.value[0] = read_ll;
244 ucontrol->value.integer.value[1] = read_rl;
245
246 return 0;
247 }
248
rt715_set_main_switch_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)249 static int rt715_set_main_switch_put(struct snd_kcontrol *kcontrol,
250 struct snd_ctl_elem_value *ucontrol)
251 {
252 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
253 struct snd_soc_dapm_context *dapm =
254 snd_soc_component_get_dapm(component);
255 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
256 static const unsigned int capture_reg_H[] = {
257 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
258 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
259 static const unsigned int capture_reg_L[] = {
260 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
261 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
262 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
263 unsigned int k_shift = RT715_DIR_IN_SFT, k_changed = 0;
264 unsigned int read_ll, read_rl, i, j, loop_cnt = 4;
265
266 for (i = 0; i < 8; i++) {
267 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i])
268 k_changed = 1;
269 }
270
271 for (j = 0; j < loop_cnt; j++) {
272 /* Can't use update bit function, so read the original value first */
273 addr_h = capture_reg_H[j];
274 addr_l = capture_reg_L[j];
275 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
276
277 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
278 regmap_write(rt715->regmap,
279 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
280
281 /* L Channel */
282 /* for mute */
283 rt715->kctl_8ch_switch_ori[j * 2] =
284 ucontrol->value.integer.value[j * 2];
285 val_ll = (!ucontrol->value.integer.value[j * 2]) << 7;
286 /* keep gain */
287 val_ll |= read_ll & 0x7f;
288
289 /* R Channel */
290 /* for mute */
291 rt715->kctl_8ch_switch_ori[j * 2 + 1] =
292 ucontrol->value.integer.value[j * 2 + 1];
293 val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7;
294 /* keep gain */
295 val_lr |= read_rl & 0x7f;
296
297 for (i = 0; i < 3; i++) { /* retry 3 times at most */
298
299 if (val_ll == val_lr) {
300 /* Set both L/R channels at the same time */
301 val_h = (1 << k_shift) | (3 << 4);
302 regmap_write(rt715->regmap, addr_h,
303 (val_h << 8) | val_ll);
304 regmap_write(rt715->regmap, addr_l,
305 (val_h << 8) | val_ll);
306 } else {
307 /* Lch*/
308 val_h = (1 << k_shift) | (1 << 5);
309 regmap_write(rt715->regmap, addr_h,
310 (val_h << 8) | val_ll);
311 /* Rch */
312 val_h = (1 << k_shift) | (1 << 4);
313 regmap_write(rt715->regmap, addr_l,
314 (val_h << 8) | val_lr);
315 }
316 val_h = 0x0;
317 rt715_get_gain(rt715, addr_h, addr_l, val_h,
318 &read_rl, &read_ll);
319 if (read_rl == val_lr && read_ll == val_ll)
320 break;
321 }
322 }
323
324 /* D0:power on state, D3: power saving mode */
325 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
326 regmap_write(rt715->regmap,
327 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
328 return k_changed;
329 }
330
rt715_set_main_switch_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)331 static int rt715_set_main_switch_get(struct snd_kcontrol *kcontrol,
332 struct snd_ctl_elem_value *ucontrol)
333 {
334 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
335 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
336 static const unsigned int capture_reg_H[] = {
337 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
338 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
339 static const unsigned int capture_reg_L[] = {
340 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
341 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
342 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
343 unsigned int read_ll, read_rl;
344
345 for (i = 0; i < loop_cnt; i++) {
346 addr_h = capture_reg_H[i];
347 addr_l = capture_reg_L[i];
348 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
349
350 ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80);
351 ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80);
352 }
353
354 return 0;
355 }
356
rt715_set_main_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)357 static int rt715_set_main_vol_put(struct snd_kcontrol *kcontrol,
358 struct snd_ctl_elem_value *ucontrol)
359 {
360 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
361 struct snd_soc_dapm_context *dapm =
362 snd_soc_component_get_dapm(component);
363 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
364 static const unsigned int capture_reg_H[] = {
365 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
366 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
367 static const unsigned int capture_reg_L[] = {
368 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
369 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L};
370 unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
371 unsigned int read_ll, read_rl, i, j, loop_cnt = 4, k_changed = 0;
372 unsigned int k_shift = RT715_DIR_IN_SFT, k_max = 0x3f;
373
374 for (i = 0; i < 8; i++) {
375 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i])
376 k_changed = 1;
377 }
378
379 for (j = 0; j < loop_cnt; j++) {
380 addr_h = capture_reg_H[j];
381 addr_l = capture_reg_L[j];
382 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
383
384 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
385 regmap_write(rt715->regmap,
386 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
387
388 /* L Channel */
389 /* for gain */
390 rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2];
391 val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f);
392 if (val_ll > k_max)
393 val_ll = k_max;
394 /* keep mute status */
395 val_ll |= read_ll & 0x80;
396
397 /* R Channel */
398 /* for gain */
399 rt715->kctl_8ch_vol_ori[j * 2 + 1] =
400 ucontrol->value.integer.value[j * 2 + 1];
401 val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f);
402 if (val_lr > k_max)
403 val_lr = k_max;
404 /* keep mute status */
405 val_lr |= read_rl & 0x80;
406
407 for (i = 0; i < 3; i++) { /* retry 3 times at most */
408 if (val_ll == val_lr) {
409 /* Set both L/R channels at the same time */
410 val_h = (1 << k_shift) | (3 << 4);
411 regmap_write(rt715->regmap, addr_h,
412 (val_h << 8) | val_ll);
413 regmap_write(rt715->regmap, addr_l,
414 (val_h << 8) | val_ll);
415 } else {
416 /* Lch*/
417 val_h = (1 << k_shift) | (1 << 5);
418 regmap_write(rt715->regmap, addr_h,
419 (val_h << 8) | val_ll);
420 /* Rch */
421 val_h = (1 << k_shift) | (1 << 4);
422 regmap_write(rt715->regmap, addr_l,
423 (val_h << 8) | val_lr);
424 }
425 val_h = 0x0;
426 rt715_get_gain(rt715, addr_h, addr_l, val_h,
427 &read_rl, &read_ll);
428 if (read_rl == val_lr && read_ll == val_ll)
429 break;
430 }
431 }
432
433 /* D0:power on state, D3: power saving mode */
434 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
435 regmap_write(rt715->regmap,
436 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
437 return k_changed;
438 }
439
rt715_set_main_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)440 static int rt715_set_main_vol_get(struct snd_kcontrol *kcontrol,
441 struct snd_ctl_elem_value *ucontrol)
442 {
443 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
444 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
445 static const unsigned int capture_reg_H[] = {
446 RT715_SET_GAIN_MIC_ADC_H, RT715_SET_GAIN_LINE_ADC_H,
447 RT715_SET_GAIN_MIX_ADC_H, RT715_SET_GAIN_MIX_ADC2_H };
448 static const unsigned int capture_reg_L[] = {
449 RT715_SET_GAIN_MIC_ADC_L, RT715_SET_GAIN_LINE_ADC_L,
450 RT715_SET_GAIN_MIX_ADC_L, RT715_SET_GAIN_MIX_ADC2_L };
451 unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
452 unsigned int read_ll, read_rl;
453
454 for (i = 0; i < loop_cnt; i++) {
455 addr_h = capture_reg_H[i];
456 addr_l = capture_reg_L[i];
457 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
458
459 ucontrol->value.integer.value[i * 2] = read_ll & 0x7f;
460 ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f;
461 }
462
463 return 0;
464 }
465
466 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
467 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
468
rt715_switch_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)469 static int rt715_switch_info(struct snd_kcontrol *kcontrol,
470 struct snd_ctl_elem_info *uinfo)
471 {
472 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
473 uinfo->count = 8;
474 uinfo->value.integer.min = 0;
475 uinfo->value.integer.max = 1;
476 return 0;
477 }
478
rt715_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)479 static int rt715_vol_info(struct snd_kcontrol *kcontrol,
480 struct snd_ctl_elem_info *uinfo)
481 {
482 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
483 uinfo->count = 8;
484 uinfo->value.integer.min = 0;
485 uinfo->value.integer.max = 0x3f;
486 return 0;
487 }
488
489 #define RT715_MAIN_SWITCH_EXT(xname, xhandler_get, xhandler_put) \
490 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
491 .info = rt715_switch_info, \
492 .get = xhandler_get, .put = xhandler_put, \
493 }
494
495 #define RT715_MAIN_VOL_EXT_TLV(xname, xhandler_get, xhandler_put, tlv_array) \
496 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
497 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
498 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
499 .tlv.p = (tlv_array), \
500 .info = rt715_vol_info, \
501 .get = xhandler_get, .put = xhandler_put, \
502 }
503
504 static const struct snd_kcontrol_new rt715_snd_controls[] = {
505 /* Capture switch */
506 RT715_MAIN_SWITCH_EXT("Capture Switch",
507 rt715_set_main_switch_get, rt715_set_main_switch_put),
508 /* Volume Control */
509 RT715_MAIN_VOL_EXT_TLV("Capture Volume",
510 rt715_set_main_vol_get, rt715_set_main_vol_put, in_vol_tlv),
511 /* MIC Boost Control */
512 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
513 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
514 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
515 mic_vol_tlv),
516 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
517 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
518 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
519 mic_vol_tlv),
520 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
521 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
522 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
523 mic_vol_tlv),
524 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
525 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
526 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
527 mic_vol_tlv),
528 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
529 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
530 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
531 mic_vol_tlv),
532 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
533 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
534 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
535 mic_vol_tlv),
536 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
537 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
538 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
539 mic_vol_tlv),
540 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
541 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
542 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
543 mic_vol_tlv),
544 };
545
rt715_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)546 static int rt715_mux_get(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol)
548 {
549 struct snd_soc_component *component =
550 snd_soc_dapm_kcontrol_component(kcontrol);
551 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
552 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
553 unsigned int reg, val;
554 int ret;
555
556 /* nid = e->reg, vid = 0xf01 */
557 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
558 ret = regmap_read(rt715->regmap, reg, &val);
559 if (ret < 0) {
560 dev_err(component->dev, "%s: sdw read failed: %d\n",
561 __func__, ret);
562 return ret;
563 }
564
565 /*
566 * The first two indices of ADC Mux 24/25 are routed to the same
567 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
568 * To have a unique set of inputs, we skip the index1 of the muxes.
569 */
570 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
571 val -= 1;
572 ucontrol->value.enumerated.item[0] = val;
573
574 return 0;
575 }
576
rt715_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)577 static int rt715_mux_put(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579 {
580 struct snd_soc_component *component =
581 snd_soc_dapm_kcontrol_component(kcontrol);
582 struct snd_soc_dapm_context *dapm =
583 snd_soc_dapm_kcontrol_dapm(kcontrol);
584 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
585 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
586 unsigned int *item = ucontrol->value.enumerated.item;
587 unsigned int val, val2 = 0, change, reg;
588 int ret;
589
590 if (item[0] >= e->items)
591 return -EINVAL;
592
593 /* Verb ID = 0x701h, nid = e->reg */
594 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
595
596 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
597 ret = regmap_read(rt715->regmap, reg, &val2);
598 if (ret < 0) {
599 dev_err(component->dev, "%s: sdw read failed: %d\n",
600 __func__, ret);
601 return ret;
602 }
603
604 if (val == val2)
605 change = 0;
606 else
607 change = 1;
608
609 if (change) {
610 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
611 regmap_write(rt715->regmap, reg, val);
612 }
613
614 snd_soc_dapm_mux_update_power(dapm, kcontrol,
615 item[0], e, NULL);
616
617 return change;
618 }
619
620 static const char * const adc_22_23_mux_text[] = {
621 "MIC1",
622 "MIC2",
623 "LINE1",
624 "LINE2",
625 "DMIC1",
626 "DMIC2",
627 "DMIC3",
628 "DMIC4",
629 };
630
631 /*
632 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
633 * 1 will be connected to the same dmic source, therefore we skip index 1 to
634 * avoid misunderstanding on usage of dapm routing.
635 */
636 static const unsigned int rt715_adc_24_25_values[] = {
637 0,
638 2,
639 3,
640 4,
641 5,
642 };
643
644 static const char * const adc_24_mux_text[] = {
645 "MIC2",
646 "DMIC1",
647 "DMIC2",
648 "DMIC3",
649 "DMIC4",
650 };
651
652 static const char * const adc_25_mux_text[] = {
653 "MIC1",
654 "DMIC1",
655 "DMIC2",
656 "DMIC3",
657 "DMIC4",
658 };
659
660 static SOC_ENUM_SINGLE_DECL(
661 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
662
663 static SOC_ENUM_SINGLE_DECL(
664 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
665
666 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
667 RT715_MUX_IN3, 0, 0xf,
668 adc_24_mux_text, rt715_adc_24_25_values);
669
670 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
671 RT715_MUX_IN4, 0, 0xf,
672 adc_25_mux_text, rt715_adc_24_25_values);
673
674 static const struct snd_kcontrol_new rt715_adc22_mux =
675 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
676 rt715_mux_get, rt715_mux_put);
677
678 static const struct snd_kcontrol_new rt715_adc23_mux =
679 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
680 rt715_mux_get, rt715_mux_put);
681
682 static const struct snd_kcontrol_new rt715_adc24_mux =
683 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
684 rt715_mux_get, rt715_mux_put);
685
686 static const struct snd_kcontrol_new rt715_adc25_mux =
687 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
688 rt715_mux_get, rt715_mux_put);
689
690 static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
691 SND_SOC_DAPM_INPUT("DMIC1"),
692 SND_SOC_DAPM_INPUT("DMIC2"),
693 SND_SOC_DAPM_INPUT("DMIC3"),
694 SND_SOC_DAPM_INPUT("DMIC4"),
695 SND_SOC_DAPM_INPUT("MIC1"),
696 SND_SOC_DAPM_INPUT("MIC2"),
697 SND_SOC_DAPM_INPUT("LINE1"),
698 SND_SOC_DAPM_INPUT("LINE2"),
699 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
700 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
701 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
702 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
703 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
704 &rt715_adc22_mux),
705 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
706 &rt715_adc23_mux),
707 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
708 &rt715_adc24_mux),
709 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
710 &rt715_adc25_mux),
711 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
712 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
713 };
714
715 static const struct snd_soc_dapm_route rt715_audio_map[] = {
716 {"DP6TX", NULL, "ADC 09"},
717 {"DP6TX", NULL, "ADC 08"},
718 {"DP4TX", NULL, "ADC 07"},
719 {"DP4TX", NULL, "ADC 27"},
720 {"ADC 09", NULL, "ADC 22 Mux"},
721 {"ADC 08", NULL, "ADC 23 Mux"},
722 {"ADC 07", NULL, "ADC 24 Mux"},
723 {"ADC 27", NULL, "ADC 25 Mux"},
724 {"ADC 22 Mux", "MIC1", "MIC1"},
725 {"ADC 22 Mux", "MIC2", "MIC2"},
726 {"ADC 22 Mux", "LINE1", "LINE1"},
727 {"ADC 22 Mux", "LINE2", "LINE2"},
728 {"ADC 22 Mux", "DMIC1", "DMIC1"},
729 {"ADC 22 Mux", "DMIC2", "DMIC2"},
730 {"ADC 22 Mux", "DMIC3", "DMIC3"},
731 {"ADC 22 Mux", "DMIC4", "DMIC4"},
732 {"ADC 23 Mux", "MIC1", "MIC1"},
733 {"ADC 23 Mux", "MIC2", "MIC2"},
734 {"ADC 23 Mux", "LINE1", "LINE1"},
735 {"ADC 23 Mux", "LINE2", "LINE2"},
736 {"ADC 23 Mux", "DMIC1", "DMIC1"},
737 {"ADC 23 Mux", "DMIC2", "DMIC2"},
738 {"ADC 23 Mux", "DMIC3", "DMIC3"},
739 {"ADC 23 Mux", "DMIC4", "DMIC4"},
740 {"ADC 24 Mux", "MIC2", "MIC2"},
741 {"ADC 24 Mux", "DMIC1", "DMIC1"},
742 {"ADC 24 Mux", "DMIC2", "DMIC2"},
743 {"ADC 24 Mux", "DMIC3", "DMIC3"},
744 {"ADC 24 Mux", "DMIC4", "DMIC4"},
745 {"ADC 25 Mux", "MIC1", "MIC1"},
746 {"ADC 25 Mux", "DMIC1", "DMIC1"},
747 {"ADC 25 Mux", "DMIC2", "DMIC2"},
748 {"ADC 25 Mux", "DMIC3", "DMIC3"},
749 {"ADC 25 Mux", "DMIC4", "DMIC4"},
750 };
751
rt715_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)752 static int rt715_set_bias_level(struct snd_soc_component *component,
753 enum snd_soc_bias_level level)
754 {
755 struct snd_soc_dapm_context *dapm =
756 snd_soc_component_get_dapm(component);
757 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
758
759 switch (level) {
760 case SND_SOC_BIAS_PREPARE:
761 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
762 regmap_write(rt715->regmap,
763 RT715_SET_AUDIO_POWER_STATE,
764 AC_PWRST_D0);
765 msleep(RT715_POWER_UP_DELAY_MS);
766 }
767 break;
768
769 case SND_SOC_BIAS_STANDBY:
770 regmap_write(rt715->regmap,
771 RT715_SET_AUDIO_POWER_STATE,
772 AC_PWRST_D3);
773 break;
774
775 default:
776 break;
777 }
778 dapm->bias_level = level;
779 return 0;
780 }
781
rt715_probe(struct snd_soc_component * component)782 static int rt715_probe(struct snd_soc_component *component)
783 {
784 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
785 int ret;
786
787 if (!rt715->first_hw_init)
788 return 0;
789
790 ret = pm_runtime_resume(component->dev);
791 if (ret < 0 && ret != -EACCES)
792 return ret;
793
794 return 0;
795 }
796
797 static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
798 .probe = rt715_probe,
799 .set_bias_level = rt715_set_bias_level,
800 .controls = rt715_snd_controls,
801 .num_controls = ARRAY_SIZE(rt715_snd_controls),
802 .dapm_widgets = rt715_dapm_widgets,
803 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
804 .dapm_routes = rt715_audio_map,
805 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
806 .endianness = 1,
807 };
808
rt715_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)809 static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
810 int direction)
811 {
812
813 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
814
815 return 0;
816 }
817
rt715_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)818 static void rt715_shutdown(struct snd_pcm_substream *substream,
819 struct snd_soc_dai *dai)
820
821 {
822 snd_soc_dai_set_dma_data(dai, substream, NULL);
823 }
824
rt715_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)825 static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
826 struct snd_pcm_hw_params *params,
827 struct snd_soc_dai *dai)
828 {
829 struct snd_soc_component *component = dai->component;
830 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
831 struct sdw_stream_config stream_config = {0};
832 struct sdw_port_config port_config = {0};
833 struct sdw_stream_runtime *sdw_stream;
834 int retval;
835 unsigned int val = 0;
836
837 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
838
839 if (!sdw_stream)
840 return -EINVAL;
841
842 if (!rt715->slave)
843 return -EINVAL;
844
845 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
846
847 switch (dai->id) {
848 case RT715_AIF1:
849 port_config.num = 6;
850 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
851 break;
852 case RT715_AIF2:
853 port_config.num = 4;
854 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
855 break;
856 default:
857 dev_err(component->dev, "%s: Invalid DAI id %d\n", __func__, dai->id);
858 return -EINVAL;
859 }
860
861 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
862 &port_config, 1, sdw_stream);
863 if (retval) {
864 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
865 return retval;
866 }
867
868 switch (params_rate(params)) {
869 /* bit 14 0:48K 1:44.1K */
870 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
871 case 44100:
872 val |= 0x40 << 8;
873 break;
874 case 48000:
875 val |= 0x0 << 8;
876 break;
877 default:
878 dev_err(component->dev, "%s: Unsupported sample rate %d\n",
879 __func__, params_rate(params));
880 return -EINVAL;
881 }
882
883 if (params_channels(params) <= 16) {
884 /* bit 3:0 Number of Channel */
885 val |= (params_channels(params) - 1);
886 } else {
887 dev_err(component->dev, "%s: Unsupported channels %d\n",
888 __func__, params_channels(params));
889 return -EINVAL;
890 }
891
892 switch (params_width(params)) {
893 /* bit 6:4 Bits per Sample */
894 case 8:
895 break;
896 case 16:
897 val |= (0x1 << 4);
898 break;
899 case 20:
900 val |= (0x2 << 4);
901 break;
902 case 24:
903 val |= (0x3 << 4);
904 break;
905 case 32:
906 val |= (0x4 << 4);
907 break;
908 default:
909 return -EINVAL;
910 }
911
912 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
913 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
914 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
915 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
916
917 return retval;
918 }
919
rt715_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)920 static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
921 struct snd_soc_dai *dai)
922 {
923 struct snd_soc_component *component = dai->component;
924 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
925 struct sdw_stream_runtime *sdw_stream =
926 snd_soc_dai_get_dma_data(dai, substream);
927
928 if (!rt715->slave)
929 return -EINVAL;
930
931 sdw_stream_remove_slave(rt715->slave, sdw_stream);
932 return 0;
933 }
934
935 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
936 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
937 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
938
939 static const struct snd_soc_dai_ops rt715_ops = {
940 .hw_params = rt715_pcm_hw_params,
941 .hw_free = rt715_pcm_hw_free,
942 .set_stream = rt715_set_sdw_stream,
943 .shutdown = rt715_shutdown,
944 };
945
946 static struct snd_soc_dai_driver rt715_dai[] = {
947 {
948 .name = "rt715-aif1",
949 .id = RT715_AIF1,
950 .capture = {
951 .stream_name = "DP6 Capture",
952 .channels_min = 1,
953 .channels_max = 2,
954 .rates = RT715_STEREO_RATES,
955 .formats = RT715_FORMATS,
956 },
957 .ops = &rt715_ops,
958 },
959 {
960 .name = "rt715-aif2",
961 .id = RT715_AIF2,
962 .capture = {
963 .stream_name = "DP4 Capture",
964 .channels_min = 1,
965 .channels_max = 2,
966 .rates = RT715_STEREO_RATES,
967 .formats = RT715_FORMATS,
968 },
969 .ops = &rt715_ops,
970 },
971 };
972
973 /* Bus clock frequency */
974 #define RT715_CLK_FREQ_9600000HZ 9600000
975 #define RT715_CLK_FREQ_12000000HZ 12000000
976 #define RT715_CLK_FREQ_6000000HZ 6000000
977 #define RT715_CLK_FREQ_4800000HZ 4800000
978 #define RT715_CLK_FREQ_2400000HZ 2400000
979 #define RT715_CLK_FREQ_12288000HZ 12288000
980
rt715_clock_config(struct device * dev)981 int rt715_clock_config(struct device *dev)
982 {
983 struct rt715_priv *rt715 = dev_get_drvdata(dev);
984 unsigned int clk_freq, value;
985
986 clk_freq = (rt715->params.curr_dr_freq >> 1);
987
988 switch (clk_freq) {
989 case RT715_CLK_FREQ_12000000HZ:
990 value = 0x0;
991 break;
992 case RT715_CLK_FREQ_6000000HZ:
993 value = 0x1;
994 break;
995 case RT715_CLK_FREQ_9600000HZ:
996 value = 0x2;
997 break;
998 case RT715_CLK_FREQ_4800000HZ:
999 value = 0x3;
1000 break;
1001 case RT715_CLK_FREQ_2400000HZ:
1002 value = 0x4;
1003 break;
1004 case RT715_CLK_FREQ_12288000HZ:
1005 value = 0x5;
1006 break;
1007 default:
1008 return -EINVAL;
1009 }
1010
1011 regmap_write(rt715->regmap, 0xe0, value);
1012 regmap_write(rt715->regmap, 0xf0, value);
1013
1014 return 0;
1015 }
1016
rt715_init(struct device * dev,struct regmap * sdw_regmap,struct regmap * regmap,struct sdw_slave * slave)1017 int rt715_init(struct device *dev, struct regmap *sdw_regmap,
1018 struct regmap *regmap, struct sdw_slave *slave)
1019 {
1020 struct rt715_priv *rt715;
1021 int ret;
1022
1023 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
1024 if (!rt715)
1025 return -ENOMEM;
1026
1027 dev_set_drvdata(dev, rt715);
1028 rt715->slave = slave;
1029 rt715->regmap = regmap;
1030 rt715->sdw_regmap = sdw_regmap;
1031
1032 regcache_cache_only(rt715->regmap, true);
1033
1034 /*
1035 * Mark hw_init to false
1036 * HW init will be performed when device reports present
1037 */
1038 rt715->hw_init = false;
1039 rt715->first_hw_init = false;
1040
1041 ret = devm_snd_soc_register_component(dev,
1042 &soc_codec_dev_rt715,
1043 rt715_dai,
1044 ARRAY_SIZE(rt715_dai));
1045 if (ret < 0)
1046 return ret;
1047
1048 /* set autosuspend parameters */
1049 pm_runtime_set_autosuspend_delay(dev, 3000);
1050 pm_runtime_use_autosuspend(dev);
1051
1052 /* make sure the device does not suspend immediately */
1053 pm_runtime_mark_last_busy(dev);
1054
1055 pm_runtime_enable(dev);
1056
1057 /* important note: the device is NOT tagged as 'active' and will remain
1058 * 'suspended' until the hardware is enumerated/initialized. This is required
1059 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
1060 * fail with -EACCESS because of race conditions between card creation and enumeration
1061 */
1062
1063 return 0;
1064 }
1065
rt715_io_init(struct device * dev,struct sdw_slave * slave)1066 int rt715_io_init(struct device *dev, struct sdw_slave *slave)
1067 {
1068 struct rt715_priv *rt715 = dev_get_drvdata(dev);
1069
1070 if (rt715->hw_init)
1071 return 0;
1072
1073 regcache_cache_only(rt715->regmap, false);
1074
1075 /*
1076 * PM runtime status is marked as 'active' only when a Slave reports as Attached
1077 */
1078 if (!rt715->first_hw_init)
1079 /* update count of parent 'active' children */
1080 pm_runtime_set_active(&slave->dev);
1081
1082 pm_runtime_get_noresume(&slave->dev);
1083
1084 rt715_reset(rt715->regmap);
1085
1086 /* Mute nid=08h/09h */
1087 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
1088 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
1089 /* Mute nid=07h/27h */
1090 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
1091 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
1092
1093 /* Set Pin Widget */
1094 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
1095 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
1096 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
1097 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
1098 /* Set Converter Stream */
1099 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
1100 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
1101 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
1102 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
1103 /* Set Configuration Default */
1104 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
1105 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
1106 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
1107 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
1108 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
1109 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
1110 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
1111 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
1112 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
1113 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
1114 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
1115 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
1116 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
1117 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
1118 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
1119 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
1120
1121 /* Finish Initial Settings, set power to D3 */
1122 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
1123
1124 if (rt715->first_hw_init)
1125 regcache_mark_dirty(rt715->regmap);
1126 else
1127 rt715->first_hw_init = true;
1128
1129 /* Mark Slave initialization complete */
1130 rt715->hw_init = true;
1131
1132 pm_runtime_mark_last_busy(&slave->dev);
1133 pm_runtime_put_autosuspend(&slave->dev);
1134
1135 return 0;
1136 }
1137
1138 MODULE_DESCRIPTION("ASoC rt715 driver");
1139 MODULE_DESCRIPTION("ASoC rt715 driver SDW");
1140 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1141 MODULE_LICENSE("GPL v2");
1142