1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Atmel ALSA SoC Audio Class D Amplifier (CLASSD) driver
3 *
4 * Copyright (C) 2015 Atmel
5 *
6 * Author: Songjun Wu <songjun.wu@atmel.com>
7 */
8
9 #include <linux/of.h>
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/string_choices.h>
15 #include <sound/core.h>
16 #include <sound/dmaengine_pcm.h>
17 #include <sound/pcm_params.h>
18 #include <sound/tlv.h>
19 #include "atmel-classd.h"
20
21 struct atmel_classd_pdata {
22 bool non_overlap_enable;
23 int non_overlap_time;
24 int pwm_type;
25 const char *card_name;
26 };
27
28 struct atmel_classd {
29 dma_addr_t phy_base;
30 struct regmap *regmap;
31 struct clk *pclk;
32 struct clk *gclk;
33 struct device *dev;
34 int irq;
35 const struct atmel_classd_pdata *pdata;
36 };
37
38 #ifdef CONFIG_OF
39 static const struct of_device_id atmel_classd_of_match[] = {
40 {
41 .compatible = "atmel,sama5d2-classd",
42 }, {
43 /* sentinel */
44 }
45 };
46 MODULE_DEVICE_TABLE(of, atmel_classd_of_match);
47
atmel_classd_dt_init(struct device * dev)48 static struct atmel_classd_pdata *atmel_classd_dt_init(struct device *dev)
49 {
50 struct device_node *np = dev->of_node;
51 struct atmel_classd_pdata *pdata;
52 const char *pwm_type_s;
53 int ret;
54
55 if (!np) {
56 dev_err(dev, "device node not found\n");
57 return ERR_PTR(-EINVAL);
58 }
59
60 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
61 if (!pdata)
62 return ERR_PTR(-ENOMEM);
63
64 ret = of_property_read_string(np, "atmel,pwm-type", &pwm_type_s);
65 if ((ret == 0) && (strcmp(pwm_type_s, "diff") == 0))
66 pdata->pwm_type = CLASSD_MR_PWMTYP_DIFF;
67 else
68 pdata->pwm_type = CLASSD_MR_PWMTYP_SINGLE;
69
70 ret = of_property_read_u32(np,
71 "atmel,non-overlap-time", &pdata->non_overlap_time);
72 if (ret)
73 pdata->non_overlap_enable = false;
74 else
75 pdata->non_overlap_enable = true;
76
77 ret = of_property_read_string(np, "atmel,model", &pdata->card_name);
78 if (ret)
79 pdata->card_name = "CLASSD";
80
81 return pdata;
82 }
83 #else
84 static inline struct atmel_classd_pdata *
atmel_classd_dt_init(struct device * dev)85 atmel_classd_dt_init(struct device *dev)
86 {
87 return ERR_PTR(-EINVAL);
88 }
89 #endif
90
91 #define ATMEL_CLASSD_RATES (SNDRV_PCM_RATE_8000 \
92 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 \
93 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 \
94 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 \
95 | SNDRV_PCM_RATE_96000)
96
97 static const struct snd_pcm_hardware atmel_classd_hw = {
98 .info = SNDRV_PCM_INFO_MMAP
99 | SNDRV_PCM_INFO_MMAP_VALID
100 | SNDRV_PCM_INFO_INTERLEAVED
101 | SNDRV_PCM_INFO_RESUME
102 | SNDRV_PCM_INFO_PAUSE,
103 .formats = (SNDRV_PCM_FMTBIT_S16_LE),
104 .rates = ATMEL_CLASSD_RATES,
105 .rate_min = 8000,
106 .rate_max = 96000,
107 .channels_min = 1,
108 .channels_max = 2,
109 .buffer_bytes_max = 64 * 1024,
110 .period_bytes_min = 256,
111 .period_bytes_max = 32 * 1024,
112 .periods_min = 2,
113 .periods_max = 256,
114 };
115
116 #define ATMEL_CLASSD_PREALLOC_BUF_SIZE (64 * 1024)
117
118 /* cpu dai component */
atmel_classd_cpu_dai_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)119 static int atmel_classd_cpu_dai_startup(struct snd_pcm_substream *substream,
120 struct snd_soc_dai *cpu_dai)
121 {
122 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
123 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
124 int err;
125
126 regmap_write(dd->regmap, CLASSD_THR, 0x0);
127
128 err = clk_prepare_enable(dd->pclk);
129 if (err)
130 return err;
131 err = clk_prepare_enable(dd->gclk);
132 if (err) {
133 clk_disable_unprepare(dd->pclk);
134 return err;
135 }
136 return 0;
137 }
138
139 /* platform */
140 static int
atmel_classd_platform_configure_dma(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct dma_slave_config * slave_config)141 atmel_classd_platform_configure_dma(struct snd_pcm_substream *substream,
142 struct snd_pcm_hw_params *params,
143 struct dma_slave_config *slave_config)
144 {
145 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
146 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
147
148 if (params_physical_width(params) != 16) {
149 dev_err(dd->dev,
150 "only supports 16-bit audio data\n");
151 return -EINVAL;
152 }
153
154 if (params_channels(params) == 1)
155 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
156 else
157 slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
158
159 slave_config->direction = DMA_MEM_TO_DEV;
160 slave_config->dst_addr = dd->phy_base + CLASSD_THR;
161 slave_config->dst_maxburst = 1;
162 slave_config->src_maxburst = 1;
163 slave_config->device_fc = false;
164
165 return 0;
166 }
167
168 static const struct snd_dmaengine_pcm_config
169 atmel_classd_dmaengine_pcm_config = {
170 .prepare_slave_config = atmel_classd_platform_configure_dma,
171 .pcm_hardware = &atmel_classd_hw,
172 .prealloc_buffer_size = ATMEL_CLASSD_PREALLOC_BUF_SIZE,
173 };
174
175 /* codec */
176 static const char * const mono_mode_text[] = {
177 "mix", "sat", "left", "right"
178 };
179
180 static SOC_ENUM_SINGLE_DECL(classd_mono_mode_enum,
181 CLASSD_INTPMR, CLASSD_INTPMR_MONO_MODE_SHIFT,
182 mono_mode_text);
183
184 static const char * const eqcfg_text[] = {
185 "Treble-12dB", "Treble-6dB",
186 "Medium-8dB", "Medium-3dB",
187 "Bass-12dB", "Bass-6dB",
188 "0 dB",
189 "Bass+6dB", "Bass+12dB",
190 "Medium+3dB", "Medium+8dB",
191 "Treble+6dB", "Treble+12dB",
192 };
193
194 static const unsigned int eqcfg_value[] = {
195 CLASSD_INTPMR_EQCFG_T_CUT_12, CLASSD_INTPMR_EQCFG_T_CUT_6,
196 CLASSD_INTPMR_EQCFG_M_CUT_8, CLASSD_INTPMR_EQCFG_M_CUT_3,
197 CLASSD_INTPMR_EQCFG_B_CUT_12, CLASSD_INTPMR_EQCFG_B_CUT_6,
198 CLASSD_INTPMR_EQCFG_FLAT,
199 CLASSD_INTPMR_EQCFG_B_BOOST_6, CLASSD_INTPMR_EQCFG_B_BOOST_12,
200 CLASSD_INTPMR_EQCFG_M_BOOST_3, CLASSD_INTPMR_EQCFG_M_BOOST_8,
201 CLASSD_INTPMR_EQCFG_T_BOOST_6, CLASSD_INTPMR_EQCFG_T_BOOST_12,
202 };
203
204 static SOC_VALUE_ENUM_SINGLE_DECL(classd_eqcfg_enum,
205 CLASSD_INTPMR, CLASSD_INTPMR_EQCFG_SHIFT, 0xf,
206 eqcfg_text, eqcfg_value);
207
208 static const DECLARE_TLV_DB_SCALE(classd_digital_tlv, -7800, 100, 1);
209
210 static const struct snd_kcontrol_new atmel_classd_snd_controls[] = {
211 SOC_DOUBLE_TLV("Playback Volume", CLASSD_INTPMR,
212 CLASSD_INTPMR_ATTL_SHIFT, CLASSD_INTPMR_ATTR_SHIFT,
213 78, 1, classd_digital_tlv),
214
215 SOC_SINGLE("Deemphasis Switch", CLASSD_INTPMR,
216 CLASSD_INTPMR_DEEMP_SHIFT, 1, 0),
217
218 SOC_SINGLE("Mono Switch", CLASSD_INTPMR, CLASSD_INTPMR_MONO_SHIFT, 1, 0),
219
220 SOC_SINGLE("Swap Switch", CLASSD_INTPMR, CLASSD_INTPMR_SWAP_SHIFT, 1, 0),
221
222 SOC_ENUM("Mono Mode", classd_mono_mode_enum),
223
224 SOC_ENUM("EQ", classd_eqcfg_enum),
225 };
226
227 static const char * const pwm_type[] = {
228 "Single ended", "Differential"
229 };
230
atmel_classd_component_probe(struct snd_soc_component * component)231 static int atmel_classd_component_probe(struct snd_soc_component *component)
232 {
233 struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
234 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
235 const struct atmel_classd_pdata *pdata = dd->pdata;
236 u32 mask, val;
237
238 mask = CLASSD_MR_PWMTYP_MASK;
239 val = pdata->pwm_type << CLASSD_MR_PWMTYP_SHIFT;
240
241 mask |= CLASSD_MR_NON_OVERLAP_MASK;
242 if (pdata->non_overlap_enable) {
243 val |= (CLASSD_MR_NON_OVERLAP_EN
244 << CLASSD_MR_NON_OVERLAP_SHIFT);
245
246 mask |= CLASSD_MR_NOVR_VAL_MASK;
247 switch (pdata->non_overlap_time) {
248 case 5:
249 val |= (CLASSD_MR_NOVR_VAL_5NS
250 << CLASSD_MR_NOVR_VAL_SHIFT);
251 break;
252 case 10:
253 val |= (CLASSD_MR_NOVR_VAL_10NS
254 << CLASSD_MR_NOVR_VAL_SHIFT);
255 break;
256 case 15:
257 val |= (CLASSD_MR_NOVR_VAL_15NS
258 << CLASSD_MR_NOVR_VAL_SHIFT);
259 break;
260 case 20:
261 val |= (CLASSD_MR_NOVR_VAL_20NS
262 << CLASSD_MR_NOVR_VAL_SHIFT);
263 break;
264 default:
265 val |= (CLASSD_MR_NOVR_VAL_10NS
266 << CLASSD_MR_NOVR_VAL_SHIFT);
267 dev_warn(component->dev,
268 "non-overlapping value %d is invalid, the default value 10 is specified\n",
269 pdata->non_overlap_time);
270 break;
271 }
272 }
273
274 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
275
276 dev_info(component->dev,
277 "PWM modulation type is %s, non-overlapping is %s\n",
278 pwm_type[pdata->pwm_type],
279 str_enabled_disabled(pdata->non_overlap_enable));
280
281 return 0;
282 }
283
atmel_classd_component_resume(struct snd_soc_component * component)284 static int atmel_classd_component_resume(struct snd_soc_component *component)
285 {
286 struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
287 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
288
289 return regcache_sync(dd->regmap);
290 }
291
atmel_classd_cpu_dai_mute_stream(struct snd_soc_dai * cpu_dai,int mute,int direction)292 static int atmel_classd_cpu_dai_mute_stream(struct snd_soc_dai *cpu_dai,
293 int mute, int direction)
294 {
295 struct snd_soc_component *component = cpu_dai->component;
296 u32 mask, val;
297
298 mask = CLASSD_MR_LMUTE_MASK | CLASSD_MR_RMUTE_MASK;
299
300 if (mute)
301 val = mask;
302 else
303 val = 0;
304
305 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
306
307 return 0;
308 }
309
310 #define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8)
311 #define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8)
312
313 static struct {
314 int rate;
315 int sample_rate;
316 int dsp_clk;
317 unsigned long gclk_rate;
318 } const sample_rates[] = {
319 { 8000, CLASSD_INTPMR_FRAME_8K,
320 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
321 { 16000, CLASSD_INTPMR_FRAME_16K,
322 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
323 { 32000, CLASSD_INTPMR_FRAME_32K,
324 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
325 { 48000, CLASSD_INTPMR_FRAME_48K,
326 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
327 { 96000, CLASSD_INTPMR_FRAME_96K,
328 CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 },
329 { 22050, CLASSD_INTPMR_FRAME_22K,
330 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
331 { 44100, CLASSD_INTPMR_FRAME_44K,
332 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
333 { 88200, CLASSD_INTPMR_FRAME_88K,
334 CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 },
335 };
336
337 static int
atmel_classd_cpu_dai_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * cpu_dai)338 atmel_classd_cpu_dai_hw_params(struct snd_pcm_substream *substream,
339 struct snd_pcm_hw_params *params,
340 struct snd_soc_dai *cpu_dai)
341 {
342 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
343 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
344 struct snd_soc_component *component = cpu_dai->component;
345 int fs;
346 int i, best, best_val, cur_val, ret;
347 u32 mask, val;
348
349 fs = params_rate(params);
350
351 best = 0;
352 best_val = abs(fs - sample_rates[0].rate);
353 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
354 /* Closest match */
355 cur_val = abs(fs - sample_rates[i].rate);
356 if (cur_val < best_val) {
357 best = i;
358 best_val = cur_val;
359 }
360 }
361
362 dev_dbg(component->dev,
363 "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n",
364 sample_rates[best].rate, sample_rates[best].gclk_rate);
365
366 clk_disable_unprepare(dd->gclk);
367
368 ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate);
369 if (ret)
370 return ret;
371
372 mask = CLASSD_INTPMR_DSP_CLK_FREQ_MASK | CLASSD_INTPMR_FRAME_MASK;
373 val = (sample_rates[best].dsp_clk << CLASSD_INTPMR_DSP_CLK_FREQ_SHIFT)
374 | (sample_rates[best].sample_rate << CLASSD_INTPMR_FRAME_SHIFT);
375
376 snd_soc_component_update_bits(component, CLASSD_INTPMR, mask, val);
377
378 return clk_prepare_enable(dd->gclk);
379 }
380
381 static void
atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)382 atmel_classd_cpu_dai_shutdown(struct snd_pcm_substream *substream,
383 struct snd_soc_dai *cpu_dai)
384 {
385 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
386 struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card);
387
388 clk_disable_unprepare(dd->gclk);
389 }
390
atmel_classd_cpu_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * cpu_dai)391 static int atmel_classd_cpu_dai_prepare(struct snd_pcm_substream *substream,
392 struct snd_soc_dai *cpu_dai)
393 {
394 struct snd_soc_component *component = cpu_dai->component;
395
396 snd_soc_component_update_bits(component, CLASSD_MR,
397 CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK,
398 (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
399 |(CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT));
400
401 return 0;
402 }
403
atmel_classd_cpu_dai_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * cpu_dai)404 static int atmel_classd_cpu_dai_trigger(struct snd_pcm_substream *substream,
405 int cmd, struct snd_soc_dai *cpu_dai)
406 {
407 struct snd_soc_component *component = cpu_dai->component;
408 u32 mask, val;
409
410 mask = CLASSD_MR_LEN_MASK | CLASSD_MR_REN_MASK;
411
412 switch (cmd) {
413 case SNDRV_PCM_TRIGGER_START:
414 case SNDRV_PCM_TRIGGER_RESUME:
415 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
416 val = mask;
417 break;
418 case SNDRV_PCM_TRIGGER_STOP:
419 case SNDRV_PCM_TRIGGER_SUSPEND:
420 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
421 val = (CLASSD_MR_LEN_DIS << CLASSD_MR_LEN_SHIFT)
422 | (CLASSD_MR_REN_DIS << CLASSD_MR_REN_SHIFT);
423 break;
424 default:
425 return -EINVAL;
426 }
427
428 snd_soc_component_update_bits(component, CLASSD_MR, mask, val);
429
430 return 0;
431 }
432
433 static const struct snd_soc_dai_ops atmel_classd_cpu_dai_ops = {
434 .startup = atmel_classd_cpu_dai_startup,
435 .shutdown = atmel_classd_cpu_dai_shutdown,
436 .mute_stream = atmel_classd_cpu_dai_mute_stream,
437 .hw_params = atmel_classd_cpu_dai_hw_params,
438 .prepare = atmel_classd_cpu_dai_prepare,
439 .trigger = atmel_classd_cpu_dai_trigger,
440 .no_capture_mute = 1,
441 };
442
443 static struct snd_soc_dai_driver atmel_classd_cpu_dai = {
444 .playback = {
445 .stream_name = "Playback",
446 .channels_min = 1,
447 .channels_max = 2,
448 .rates = ATMEL_CLASSD_RATES,
449 .formats = SNDRV_PCM_FMTBIT_S16_LE,
450 },
451 .ops = &atmel_classd_cpu_dai_ops,
452 };
453
454 static const struct snd_soc_component_driver atmel_classd_cpu_dai_component = {
455 .name = "atmel-classd",
456 .probe = atmel_classd_component_probe,
457 .resume = atmel_classd_component_resume,
458 .controls = atmel_classd_snd_controls,
459 .num_controls = ARRAY_SIZE(atmel_classd_snd_controls),
460 .idle_bias_on = 1,
461 .use_pmdown_time = 1,
462 .legacy_dai_naming = 1,
463 };
464
465 /* ASoC sound card */
atmel_classd_asoc_card_init(struct device * dev,struct snd_soc_card * card)466 static int atmel_classd_asoc_card_init(struct device *dev,
467 struct snd_soc_card *card)
468 {
469 struct snd_soc_dai_link *dai_link;
470 struct atmel_classd *dd = snd_soc_card_get_drvdata(card);
471 struct snd_soc_dai_link_component *comp;
472
473 dai_link = devm_kzalloc(dev, sizeof(*dai_link), GFP_KERNEL);
474 if (!dai_link)
475 return -ENOMEM;
476
477 comp = devm_kzalloc(dev, 2 * sizeof(*comp), GFP_KERNEL);
478 if (!comp)
479 return -ENOMEM;
480
481 dai_link->cpus = &comp[0];
482 dai_link->codecs = &snd_soc_dummy_dlc;
483 dai_link->platforms = &comp[1];
484
485 dai_link->num_cpus = 1;
486 dai_link->num_codecs = 1;
487 dai_link->num_platforms = 1;
488
489 dai_link->name = "CLASSD";
490 dai_link->stream_name = "CLASSD PCM";
491 dai_link->cpus->dai_name = dev_name(dev);
492 dai_link->platforms->name = dev_name(dev);
493
494 card->dai_link = dai_link;
495 card->num_links = 1;
496 card->name = dd->pdata->card_name;
497 card->dev = dev;
498
499 return 0;
500 };
501
502 /* regmap configuration */
503 static const struct reg_default atmel_classd_reg_defaults[] = {
504 { CLASSD_INTPMR, 0x00301212 },
505 };
506
507 #define ATMEL_CLASSD_REG_MAX 0xE4
508 static const struct regmap_config atmel_classd_regmap_config = {
509 .reg_bits = 32,
510 .reg_stride = 4,
511 .val_bits = 32,
512 .max_register = ATMEL_CLASSD_REG_MAX,
513
514 .cache_type = REGCACHE_FLAT,
515 .reg_defaults = atmel_classd_reg_defaults,
516 .num_reg_defaults = ARRAY_SIZE(atmel_classd_reg_defaults),
517 };
518
atmel_classd_probe(struct platform_device * pdev)519 static int atmel_classd_probe(struct platform_device *pdev)
520 {
521 struct device *dev = &pdev->dev;
522 struct atmel_classd *dd;
523 struct resource *res;
524 void __iomem *io_base;
525 const struct atmel_classd_pdata *pdata;
526 struct snd_soc_card *card;
527 int ret;
528
529 pdata = dev_get_platdata(dev);
530 if (!pdata) {
531 pdata = atmel_classd_dt_init(dev);
532 if (IS_ERR(pdata))
533 return PTR_ERR(pdata);
534 }
535
536 dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
537 if (!dd)
538 return -ENOMEM;
539
540 dd->pdata = pdata;
541
542 dd->irq = platform_get_irq(pdev, 0);
543 if (dd->irq < 0)
544 return dd->irq;
545
546 dd->pclk = devm_clk_get(dev, "pclk");
547 if (IS_ERR(dd->pclk)) {
548 ret = PTR_ERR(dd->pclk);
549 dev_err(dev, "failed to get peripheral clock: %d\n", ret);
550 return ret;
551 }
552
553 dd->gclk = devm_clk_get(dev, "gclk");
554 if (IS_ERR(dd->gclk)) {
555 ret = PTR_ERR(dd->gclk);
556 dev_err(dev, "failed to get GCK clock: %d\n", ret);
557 return ret;
558 }
559
560 io_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
561 if (IS_ERR(io_base))
562 return PTR_ERR(io_base);
563
564 dd->phy_base = res->start;
565 dd->dev = dev;
566
567 dd->regmap = devm_regmap_init_mmio(dev, io_base,
568 &atmel_classd_regmap_config);
569 if (IS_ERR(dd->regmap)) {
570 ret = PTR_ERR(dd->regmap);
571 dev_err(dev, "failed to init register map: %d\n", ret);
572 return ret;
573 }
574
575 ret = devm_snd_soc_register_component(dev,
576 &atmel_classd_cpu_dai_component,
577 &atmel_classd_cpu_dai, 1);
578 if (ret) {
579 dev_err(dev, "could not register CPU DAI: %d\n", ret);
580 return ret;
581 }
582
583 ret = devm_snd_dmaengine_pcm_register(dev,
584 &atmel_classd_dmaengine_pcm_config,
585 0);
586 if (ret) {
587 dev_err(dev, "could not register platform: %d\n", ret);
588 return ret;
589 }
590
591 /* register sound card */
592 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
593 if (!card) {
594 ret = -ENOMEM;
595 goto unregister_codec;
596 }
597
598 snd_soc_card_set_drvdata(card, dd);
599
600 ret = atmel_classd_asoc_card_init(dev, card);
601 if (ret) {
602 dev_err(dev, "failed to init sound card\n");
603 goto unregister_codec;
604 }
605
606 ret = devm_snd_soc_register_card(dev, card);
607 if (ret) {
608 dev_err(dev, "failed to register sound card: %d\n", ret);
609 goto unregister_codec;
610 }
611
612 return 0;
613
614 unregister_codec:
615 return ret;
616 }
617
618 static struct platform_driver atmel_classd_driver = {
619 .driver = {
620 .name = "atmel-classd",
621 .of_match_table = of_match_ptr(atmel_classd_of_match),
622 .pm = &snd_soc_pm_ops,
623 },
624 .probe = atmel_classd_probe,
625 };
626 module_platform_driver(atmel_classd_driver);
627
628 MODULE_DESCRIPTION("Atmel ClassD driver under ALSA SoC architecture");
629 MODULE_AUTHOR("Songjun Wu <songjun.wu@atmel.com>");
630 MODULE_LICENSE("GPL");
631