1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 5 */ 6 7/dts-v1/; 8#include "jh7110.dtsi" 9#include "jh7110-pinfunc.h" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 aliases { 14 ethernet0 = &gmac0; 15 i2c0 = &i2c0; 16 i2c2 = &i2c2; 17 i2c5 = &i2c5; 18 i2c6 = &i2c6; 19 mmc0 = &mmc0; 20 mmc1 = &mmc1; 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@40000000 { 29 device_type = "memory"; 30 reg = <0x0 0x40000000 0x1 0x0>; 31 }; 32 33 gpio-restart { 34 compatible = "gpio-restart"; 35 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 36 priority = <224>; 37 }; 38 39 pwmdac_codec: audio-codec { 40 compatible = "linux,spdif-dit"; 41 #sound-dai-cells = <0>; 42 }; 43 44 sound { 45 compatible = "simple-audio-card"; 46 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 simple-audio-card,dai-link@0 { 51 reg = <0>; 52 format = "left_j"; 53 bitclock-master = <&sndcpu0>; 54 frame-master = <&sndcpu0>; 55 56 sndcpu0: cpu { 57 sound-dai = <&pwmdac>; 58 }; 59 60 codec { 61 sound-dai = <&pwmdac_codec>; 62 }; 63 }; 64 }; 65}; 66 67&cpus { 68 timebase-frequency = <4000000>; 69}; 70 71&dvp_clk { 72 clock-frequency = <74250000>; 73}; 74 75&gmac0_rgmii_rxin { 76 clock-frequency = <125000000>; 77}; 78 79&gmac0_rmii_refin { 80 clock-frequency = <50000000>; 81}; 82 83&gmac1_rgmii_rxin { 84 clock-frequency = <125000000>; 85}; 86 87&gmac1_rmii_refin { 88 clock-frequency = <50000000>; 89}; 90 91&hdmitx0_pixelclk { 92 clock-frequency = <297000000>; 93}; 94 95&i2srx_bclk_ext { 96 clock-frequency = <12288000>; 97}; 98 99&i2srx_lrck_ext { 100 clock-frequency = <192000>; 101}; 102 103&i2stx_bclk_ext { 104 clock-frequency = <12288000>; 105}; 106 107&i2stx_lrck_ext { 108 clock-frequency = <192000>; 109}; 110 111&mclk_ext { 112 clock-frequency = <12288000>; 113}; 114 115&osc { 116 clock-frequency = <24000000>; 117}; 118 119&rtc_osc { 120 clock-frequency = <32768>; 121}; 122 123&tdm_ext { 124 clock-frequency = <49152000>; 125}; 126 127&camss { 128 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, 129 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; 130 assigned-clock-rates = <49500000>, <198000000>; 131 132 ports { 133 #address-cells = <1>; 134 #size-cells = <0>; 135 136 port@0 { 137 reg = <0>; 138 }; 139 140 port@1 { 141 reg = <1>; 142 143 camss_from_csi2rx: endpoint { 144 remote-endpoint = <&csi2rx_to_camss>; 145 }; 146 }; 147 }; 148}; 149 150&csi2rx { 151 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; 152 assigned-clock-rates = <297000000>; 153 154 ports { 155 #address-cells = <1>; 156 #size-cells = <0>; 157 158 port@0 { 159 reg = <0>; 160 161 /* remote MIPI sensor endpoint */ 162 }; 163 164 port@1 { 165 reg = <1>; 166 167 csi2rx_to_camss: endpoint { 168 remote-endpoint = <&camss_from_csi2rx>; 169 }; 170 }; 171 }; 172}; 173 174&gmac0 { 175 phy-handle = <&phy0>; 176 phy-mode = "rgmii-id"; 177 178 mdio { 179 #address-cells = <1>; 180 #size-cells = <0>; 181 compatible = "snps,dwmac-mdio"; 182 183 phy0: ethernet-phy@0 { 184 reg = <0>; 185 }; 186 }; 187}; 188 189&i2c0 { 190 clock-frequency = <100000>; 191 i2c-sda-hold-time-ns = <300>; 192 i2c-sda-falling-time-ns = <510>; 193 i2c-scl-falling-time-ns = <510>; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&i2c0_pins>; 196}; 197 198&i2c2 { 199 clock-frequency = <100000>; 200 i2c-sda-hold-time-ns = <300>; 201 i2c-sda-falling-time-ns = <510>; 202 i2c-scl-falling-time-ns = <510>; 203 pinctrl-names = "default"; 204 pinctrl-0 = <&i2c2_pins>; 205 status = "okay"; 206}; 207 208&i2c5 { 209 clock-frequency = <100000>; 210 i2c-sda-hold-time-ns = <300>; 211 i2c-sda-falling-time-ns = <510>; 212 i2c-scl-falling-time-ns = <510>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&i2c5_pins>; 215 status = "okay"; 216 217 axp15060: pmic@36 { 218 compatible = "x-powers,axp15060"; 219 reg = <0x36>; 220 interrupt-controller; 221 #interrupt-cells = <1>; 222 223 regulators { 224 vcc_3v3: dcdc1 { 225 regulator-boot-on; 226 regulator-always-on; 227 regulator-min-microvolt = <3300000>; 228 regulator-max-microvolt = <3300000>; 229 regulator-name = "vcc_3v3"; 230 }; 231 232 vdd_cpu: dcdc2 { 233 regulator-always-on; 234 regulator-min-microvolt = <500000>; 235 regulator-max-microvolt = <1540000>; 236 regulator-name = "vdd_cpu"; 237 }; 238 239 emmc_vdd: aldo4 { 240 regulator-boot-on; 241 regulator-always-on; 242 regulator-min-microvolt = <1800000>; 243 regulator-max-microvolt = <3300000>; 244 regulator-name = "emmc_vdd"; 245 }; 246 }; 247 }; 248}; 249 250&i2c6 { 251 clock-frequency = <100000>; 252 i2c-sda-hold-time-ns = <300>; 253 i2c-sda-falling-time-ns = <510>; 254 i2c-scl-falling-time-ns = <510>; 255 pinctrl-names = "default"; 256 pinctrl-0 = <&i2c6_pins>; 257 status = "okay"; 258}; 259 260&mmc0 { 261 max-frequency = <100000000>; 262 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 263 assigned-clock-rates = <50000000>; 264 bus-width = <8>; 265 cap-mmc-highspeed; 266 mmc-ddr-1_8v; 267 mmc-hs200-1_8v; 268 cap-mmc-hw-reset; 269 post-power-on-delay-ms = <200>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&mmc0_pins>; 272 vmmc-supply = <&vcc_3v3>; 273 vqmmc-supply = <&emmc_vdd>; 274 status = "okay"; 275}; 276 277&mmc1 { 278 max-frequency = <100000000>; 279 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 280 assigned-clock-rates = <50000000>; 281 bus-width = <4>; 282 no-sdio; 283 no-mmc; 284 cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>; 285 disable-wp; 286 cap-sd-highspeed; 287 post-power-on-delay-ms = <200>; 288 pinctrl-names = "default"; 289 pinctrl-0 = <&mmc1_pins>; 290 status = "okay"; 291}; 292 293&pcie0 { 294 perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>; 295 phys = <&pciephy0>; 296 pinctrl-names = "default"; 297 pinctrl-0 = <&pcie0_pins>; 298}; 299 300&pcie1 { 301 perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>; 302 phys = <&pciephy1>; 303 pinctrl-names = "default"; 304 pinctrl-0 = <&pcie1_pins>; 305}; 306 307&pwmdac { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&pwmdac_pins>; 310}; 311 312&qspi { 313 #address-cells = <1>; 314 #size-cells = <0>; 315 status = "okay"; 316 317 nor_flash: flash@0 { 318 compatible = "jedec,spi-nor"; 319 reg = <0>; 320 cdns,read-delay = <5>; 321 spi-max-frequency = <12000000>; 322 cdns,tshsl-ns = <1>; 323 cdns,tsd2d-ns = <1>; 324 cdns,tchsh-ns = <1>; 325 cdns,tslch-ns = <1>; 326 327 partitions { 328 compatible = "fixed-partitions"; 329 #address-cells = <1>; 330 #size-cells = <1>; 331 332 spl@0 { 333 reg = <0x0 0xf0000>; 334 }; 335 uboot-env@f0000 { 336 reg = <0xf0000 0x10000>; 337 }; 338 uboot@100000 { 339 reg = <0x100000 0xf00000>; 340 }; 341 }; 342 }; 343}; 344 345&pwm { 346 pinctrl-names = "default"; 347 pinctrl-0 = <&pwm_pins>; 348}; 349 350&spi0 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&spi0_pins>; 353}; 354 355&syscrg { 356 assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>, 357 <&pllclk JH7110_PLLCLK_PLL0_OUT>; 358 assigned-clock-rates = <500000000>, <1500000000>; 359}; 360 361&sysgpio { 362 i2c0_pins: i2c0-0 { 363 i2c-pins { 364 pinmux = <GPIOMUX(57, GPOUT_LOW, 365 GPOEN_SYS_I2C0_CLK, 366 GPI_SYS_I2C0_CLK)>, 367 <GPIOMUX(58, GPOUT_LOW, 368 GPOEN_SYS_I2C0_DATA, 369 GPI_SYS_I2C0_DATA)>; 370 bias-disable; /* external pull-up */ 371 input-enable; 372 input-schmitt-enable; 373 }; 374 }; 375 376 i2c2_pins: i2c2-0 { 377 i2c-pins { 378 pinmux = <GPIOMUX(3, GPOUT_LOW, 379 GPOEN_SYS_I2C2_CLK, 380 GPI_SYS_I2C2_CLK)>, 381 <GPIOMUX(2, GPOUT_LOW, 382 GPOEN_SYS_I2C2_DATA, 383 GPI_SYS_I2C2_DATA)>; 384 bias-disable; /* external pull-up */ 385 input-enable; 386 input-schmitt-enable; 387 }; 388 }; 389 390 i2c5_pins: i2c5-0 { 391 i2c-pins { 392 pinmux = <GPIOMUX(19, GPOUT_LOW, 393 GPOEN_SYS_I2C5_CLK, 394 GPI_SYS_I2C5_CLK)>, 395 <GPIOMUX(20, GPOUT_LOW, 396 GPOEN_SYS_I2C5_DATA, 397 GPI_SYS_I2C5_DATA)>; 398 bias-disable; /* external pull-up */ 399 input-enable; 400 input-schmitt-enable; 401 }; 402 }; 403 404 i2c6_pins: i2c6-0 { 405 i2c-pins { 406 pinmux = <GPIOMUX(16, GPOUT_LOW, 407 GPOEN_SYS_I2C6_CLK, 408 GPI_SYS_I2C6_CLK)>, 409 <GPIOMUX(17, GPOUT_LOW, 410 GPOEN_SYS_I2C6_DATA, 411 GPI_SYS_I2C6_DATA)>; 412 bias-disable; /* external pull-up */ 413 input-enable; 414 input-schmitt-enable; 415 }; 416 }; 417 418 mmc0_pins: mmc0-0 { 419 rst-pins { 420 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 421 GPOEN_ENABLE, 422 GPI_NONE)>; 423 bias-pull-up; 424 drive-strength = <12>; 425 input-disable; 426 input-schmitt-disable; 427 slew-rate = <0>; 428 }; 429 430 mmc-pins { 431 pinmux = <PINMUX(64, 0)>, 432 <PINMUX(65, 0)>, 433 <PINMUX(66, 0)>, 434 <PINMUX(67, 0)>, 435 <PINMUX(68, 0)>, 436 <PINMUX(69, 0)>, 437 <PINMUX(70, 0)>, 438 <PINMUX(71, 0)>, 439 <PINMUX(72, 0)>, 440 <PINMUX(73, 0)>; 441 bias-pull-up; 442 drive-strength = <12>; 443 input-enable; 444 }; 445 }; 446 447 mmc1_pins: mmc1-0 { 448 clk-pins { 449 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 450 GPOEN_ENABLE, 451 GPI_NONE)>; 452 bias-pull-up; 453 drive-strength = <12>; 454 input-disable; 455 input-schmitt-disable; 456 slew-rate = <0>; 457 }; 458 459 mmc-pins { 460 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 461 GPOEN_SYS_SDIO1_CMD, 462 GPI_SYS_SDIO1_CMD)>, 463 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 464 GPOEN_SYS_SDIO1_DATA0, 465 GPI_SYS_SDIO1_DATA0)>, 466 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 467 GPOEN_SYS_SDIO1_DATA1, 468 GPI_SYS_SDIO1_DATA1)>, 469 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 470 GPOEN_SYS_SDIO1_DATA2, 471 GPI_SYS_SDIO1_DATA2)>, 472 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 473 GPOEN_SYS_SDIO1_DATA3, 474 GPI_SYS_SDIO1_DATA3)>; 475 bias-pull-up; 476 drive-strength = <12>; 477 input-enable; 478 input-schmitt-enable; 479 slew-rate = <0>; 480 }; 481 }; 482 483 pcie0_pins: pcie0-0 { 484 clkreq-pins { 485 pinmux = <GPIOMUX(27, GPOUT_LOW, 486 GPOEN_DISABLE, 487 GPI_NONE)>; 488 bias-pull-down; 489 drive-strength = <2>; 490 input-enable; 491 input-schmitt-disable; 492 slew-rate = <0>; 493 }; 494 495 wake-pins { 496 pinmux = <GPIOMUX(32, GPOUT_LOW, 497 GPOEN_DISABLE, 498 GPI_NONE)>; 499 bias-pull-up; 500 drive-strength = <2>; 501 input-enable; 502 input-schmitt-disable; 503 slew-rate = <0>; 504 }; 505 }; 506 507 pcie1_pins: pcie1-0 { 508 clkreq-pins { 509 pinmux = <GPIOMUX(29, GPOUT_LOW, 510 GPOEN_DISABLE, 511 GPI_NONE)>; 512 bias-pull-down; 513 drive-strength = <2>; 514 input-enable; 515 input-schmitt-disable; 516 slew-rate = <0>; 517 }; 518 519 wake-pins { 520 pinmux = <GPIOMUX(21, GPOUT_LOW, 521 GPOEN_DISABLE, 522 GPI_NONE)>; 523 bias-pull-up; 524 drive-strength = <2>; 525 input-enable; 526 input-schmitt-disable; 527 slew-rate = <0>; 528 }; 529 }; 530 531 pwmdac_pins: pwmdac-0 { 532 pwmdac-pins { 533 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT, 534 GPOEN_ENABLE, 535 GPI_NONE)>, 536 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT, 537 GPOEN_ENABLE, 538 GPI_NONE)>; 539 bias-disable; 540 drive-strength = <2>; 541 input-disable; 542 input-schmitt-disable; 543 slew-rate = <0>; 544 }; 545 }; 546 547 pwm_pins: pwm-0 { 548 pwm-pins { 549 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0, 550 GPOEN_SYS_PWM0_CHANNEL0, 551 GPI_NONE)>, 552 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1, 553 GPOEN_SYS_PWM0_CHANNEL1, 554 GPI_NONE)>; 555 bias-disable; 556 drive-strength = <12>; 557 input-disable; 558 input-schmitt-disable; 559 slew-rate = <0>; 560 }; 561 }; 562 563 spi0_pins: spi0-0 { 564 mosi-pins { 565 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 566 GPOEN_ENABLE, 567 GPI_NONE)>; 568 bias-disable; 569 input-disable; 570 input-schmitt-disable; 571 }; 572 573 miso-pins { 574 pinmux = <GPIOMUX(53, GPOUT_LOW, 575 GPOEN_DISABLE, 576 GPI_SYS_SPI0_RXD)>; 577 bias-pull-up; 578 input-enable; 579 input-schmitt-enable; 580 }; 581 582 sck-pins { 583 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 584 GPOEN_ENABLE, 585 GPI_SYS_SPI0_CLK)>; 586 bias-disable; 587 input-disable; 588 input-schmitt-disable; 589 }; 590 591 ss-pins { 592 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 593 GPOEN_ENABLE, 594 GPI_SYS_SPI0_FSS)>; 595 bias-disable; 596 input-disable; 597 input-schmitt-disable; 598 }; 599 }; 600 601 uart0_pins: uart0-0 { 602 tx-pins { 603 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 604 GPOEN_ENABLE, 605 GPI_NONE)>; 606 bias-disable; 607 drive-strength = <12>; 608 input-disable; 609 input-schmitt-disable; 610 slew-rate = <0>; 611 }; 612 613 rx-pins { 614 pinmux = <GPIOMUX(6, GPOUT_LOW, 615 GPOEN_DISABLE, 616 GPI_SYS_UART0_RX)>; 617 bias-disable; /* external pull-up */ 618 drive-strength = <2>; 619 input-enable; 620 input-schmitt-enable; 621 slew-rate = <0>; 622 }; 623 }; 624}; 625 626&uart0 { 627 pinctrl-names = "default"; 628 pinctrl-0 = <&uart0_pins>; 629 status = "okay"; 630}; 631 632&U74_1 { 633 cpu-supply = <&vdd_cpu>; 634}; 635 636&U74_2 { 637 cpu-supply = <&vdd_cpu>; 638}; 639 640&U74_3 { 641 cpu-supply = <&vdd_cpu>; 642}; 643 644&U74_4 { 645 cpu-supply = <&vdd_cpu>; 646}; 647