1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Device Tree file for the AM62P5-SK 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * Schematics: https://www.ti.com/lit/zip/sprr487 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/net/ti-dp83867.h> 14#include "k3-am62p5.dtsi" 15 16/ { 17 compatible = "ti,am62p5-sk", "ti,am62p5"; 18 model = "Texas Instruments AM62P5 SK"; 19 20 aliases { 21 serial0 = &wkup_uart0; 22 serial1 = &mcu_uart0; 23 serial2 = &main_uart0; 24 serial3 = &main_uart1; 25 mmc0 = &sdhci0; 26 mmc1 = &sdhci1; 27 mmc2 = &sdhci2; 28 spi0 = &ospi0; 29 ethernet0 = &cpsw_port1; 30 ethernet1 = &cpsw_port2; 31 usb0 = &usb0; 32 usb1 = &usb1; 33 }; 34 35 chosen { 36 stdout-path = &main_uart0; 37 }; 38 39 memory@80000000 { 40 /* 8G RAM */ 41 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 42 <0x00000008 0x80000000 0x00000001 0x80000000>; 43 device_type = "memory"; 44 bootph-pre-ram; 45 }; 46 47 reserved-memory { 48 #address-cells = <2>; 49 #size-cells = <2>; 50 ranges; 51 52 secure_tfa_ddr: tfa@9e780000 { 53 reg = <0x00 0x9e780000 0x00 0x80000>; 54 no-map; 55 }; 56 57 secure_ddr: optee@9e800000 { 58 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 59 no-map; 60 }; 61 62 wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 63 compatible = "shared-dma-pool"; 64 reg = <0x00 0x9c900000 0x00 0x01e00000>; 65 no-map; 66 }; 67 }; 68 69 vmain_pd: regulator-0 { 70 /* TPS65988 PD CONTROLLER OUTPUT */ 71 compatible = "regulator-fixed"; 72 regulator-name = "vmain_pd"; 73 regulator-min-microvolt = <5000000>; 74 regulator-max-microvolt = <5000000>; 75 regulator-always-on; 76 regulator-boot-on; 77 bootph-all; 78 }; 79 80 vcc_5v0: regulator-1 { 81 /* Output of TPS630702RNMR */ 82 compatible = "regulator-fixed"; 83 regulator-name = "vcc_5v0"; 84 regulator-min-microvolt = <5000000>; 85 regulator-max-microvolt = <5000000>; 86 vin-supply = <&vmain_pd>; 87 regulator-always-on; 88 regulator-boot-on; 89 bootph-all; 90 }; 91 92 vdd_mmc1: regulator-2 { 93 /* TPS22918DBVR */ 94 compatible = "regulator-fixed"; 95 regulator-name = "vdd_mmc1"; 96 regulator-min-microvolt = <3300000>; 97 regulator-max-microvolt = <3300000>; 98 regulator-boot-on; 99 enable-active-high; 100 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 101 bootph-all; 102 }; 103 104 vddshv_sdio: regulator-3 { 105 compatible = "regulator-gpio"; 106 regulator-name = "vddshv_sdio"; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&vddshv_sdio_pins_default>; 109 regulator-min-microvolt = <1800000>; 110 regulator-max-microvolt = <3300000>; 111 regulator-boot-on; 112 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 113 states = <1800000 0x0>, 114 <3300000 0x1>; 115 bootph-all; 116 }; 117 118 leds { 119 compatible = "gpio-leds"; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&usr_led_pins_default>; 122 123 led-0 { 124 label = "am62-sk:green:heartbeat"; 125 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 126 linux,default-trigger = "heartbeat"; 127 function = LED_FUNCTION_HEARTBEAT; 128 default-state = "off"; 129 }; 130 }; 131 132 opp-table { 133 /* Requires VDD_CORE at 0v85 */ 134 opp-1400000000 { 135 opp-hz = /bits/ 64 <1400000000>; 136 opp-supported-hw = <0x01 0x0004>; 137 clock-latency-ns = <6000000>; 138 }; 139 }; 140 141 tlv320_mclk: clk-0 { 142 #clock-cells = <0>; 143 compatible = "fixed-clock"; 144 clock-frequency = <12288000>; 145 }; 146 147 codec_audio: sound { 148 compatible = "simple-audio-card"; 149 simple-audio-card,name = "AM62x-SKEVM"; 150 simple-audio-card,widgets = 151 "Headphone", "Headphone Jack", 152 "Line", "Line In", 153 "Microphone", "Microphone Jack"; 154 simple-audio-card,routing = 155 "Headphone Jack", "HPLOUT", 156 "Headphone Jack", "HPROUT", 157 "LINE1L", "Line In", 158 "LINE1R", "Line In", 159 "MIC3R", "Microphone Jack", 160 "Microphone Jack", "Mic Bias"; 161 simple-audio-card,format = "dsp_b"; 162 simple-audio-card,bitclock-master = <&sound_master>; 163 simple-audio-card,frame-master = <&sound_master>; 164 simple-audio-card,bitclock-inversion; 165 166 simple-audio-card,cpu { 167 sound-dai = <&mcasp1>; 168 }; 169 170 sound_master: simple-audio-card,codec { 171 sound-dai = <&tlv320aic3106>; 172 clocks = <&tlv320_mclk>; 173 }; 174 }; 175}; 176 177&main_gpio0 { 178 bootph-all; 179}; 180 181&main_gpio1 { 182 bootph-all; 183}; 184 185&main_pmx0 { 186 bootph-all; 187 188 main_i2c0_pins_default: main-i2c0-default-pins { 189 pinctrl-single,pins = < 190 AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ 191 AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ 192 >; 193 }; 194 195 main_i2c1_pins_default: main-i2c1-default-pins { 196 pinctrl-single,pins = < 197 AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ 198 AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ 199 >; 200 bootph-all; 201 }; 202 203 main_i2c2_pins_default: main-i2c2-default-pins { 204 pinctrl-single,pins = < 205 AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ 206 AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ 207 >; 208 }; 209 210 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 211 pinctrl-single,pins = < 212 AM62PX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C22) UART0_RTSn.GPIO1_23 */ 213 >; 214 }; 215 216 main_mcasp1_pins_default: main-mcasp1-default-pins { 217 pinctrl-single,pins = < 218 AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 219 AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ 220 AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ 221 AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 222 >; 223 }; 224 225 main_mdio1_pins_default: main-mdio1-default-pins { 226 pinctrl-single,pins = < 227 AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ 228 AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */ 229 >; 230 }; 231 232 main_mmc1_pins_default: main-mmc1-default-pins { 233 pinctrl-single,pins = < 234 AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ 235 AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ 236 AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ 237 AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ 238 AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ 239 AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ 240 AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ 241 >; 242 bootph-all; 243 }; 244 245 main_mmc2_pins_default: main-mmc2-default-pins { 246 pinctrl-single,pins = < 247 AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */ 248 AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */ 249 AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */ 250 AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */ 251 AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */ 252 AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */ 253 AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */ 254 >; 255 bootph-all; 256 }; 257 258 main_rgmii1_pins_default: main-rgmii1-default-pins { 259 pinctrl-single,pins = < 260 AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */ 261 AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */ 262 AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */ 263 AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */ 264 AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */ 265 AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ 266 AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */ 267 AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */ 268 AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */ 269 AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */ 270 AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */ 271 AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ 272 >; 273 bootph-all; 274 }; 275 276 main_rgmii2_pins_default: main-rgmii2-default-pins { 277 pinctrl-single,pins = < 278 AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */ 279 AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */ 280 AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */ 281 AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */ 282 AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */ 283 AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ 284 AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */ 285 AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */ 286 AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */ 287 AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */ 288 AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC */ 289 AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ 290 >; 291 bootph-all; 292 }; 293 294 main_uart0_pins_default: main-uart0-default-pins { 295 pinctrl-single,pins = < 296 AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 297 AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 298 >; 299 bootph-all; 300 }; 301 302 main_uart1_pins_default: main-uart1-default-pins { 303 pinctrl-single,pins = < 304 AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */ 305 AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ 306 AM62PX_IOPAD(0x01ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR.UART1_RXD */ 307 AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ 308 >; 309 bootph-all; 310 }; 311 312 main_usb1_pins_default: main-usb1-default-pins { 313 pinctrl-single,pins = < 314 AM62PX_IOPAD(0x0258, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (G21) USB1_DRVVBUS */ 315 >; 316 }; 317 318 main_wlirq_pins_default: main-wlirq-default-pins { 319 pinctrl-single,pins = < 320 AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */ 321 >; 322 }; 323 324 ospi0_pins_default: ospi0-default-pins { 325 pinctrl-single,pins = < 326 AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ 327 AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ 328 AM62PX_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ 329 AM62PX_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ 330 AM62PX_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ 331 AM62PX_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ 332 AM62PX_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ 333 AM62PX_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ 334 AM62PX_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ 335 AM62PX_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ 336 AM62PX_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ 337 >; 338 bootph-all; 339 }; 340 341 usr_led_pins_default: usr-led-default-pins { 342 pinctrl-single,pins = < 343 AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */ 344 >; 345 }; 346 347 vddshv_sdio_pins_default: vddshvr-sdio-default-pins { 348 pinctrl-single,pins = < 349 AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ 350 >; 351 bootph-all; 352 }; 353 354 wlan_en_pins_default: wlan-en-default-pins { 355 pinctrl-single,pins = < 356 AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ 357 >; 358 }; 359}; 360 361&main_i2c0 { 362 status = "okay"; 363 pinctrl-names = "default"; 364 pinctrl-0 = <&main_i2c0_pins_default>; 365 clock-frequency = <400000>; 366 367 typec_pd0: usb-power-controller@3f { 368 compatible = "ti,tps6598x"; 369 reg = <0x3f>; 370 371 connector { 372 compatible = "usb-c-connector"; 373 label = "USB-C"; 374 self-powered; 375 data-role = "dual"; 376 power-role = "sink"; 377 port { 378 usb_con_hs: endpoint { 379 remote-endpoint = <&usb0_hs_ep>; 380 }; 381 }; 382 }; 383 }; 384}; 385 386&main_i2c1 { 387 status = "okay"; 388 pinctrl-names = "default"; 389 pinctrl-0 = <&main_i2c1_pins_default>; 390 clock-frequency = <100000>; 391 bootph-all; 392 393 tlv320aic3106: audio-codec@1b { 394 #sound-dai-cells = <0>; 395 compatible = "ti,tlv320aic3106"; 396 reg = <0x1b>; 397 ai3x-micbias-vg = <1>; /* 2.0V */ 398 }; 399 400 exp1: gpio@22 { 401 compatible = "ti,tca6424"; 402 reg = <0x22>; 403 gpio-controller; 404 #gpio-cells = <2>; 405 gpio-line-names = "OLDI_INT#", "x8_NAND_DETECT", 406 "UART1_FET_SEL", "MMC1_SD_EN", 407 "VPP_EN", "EXP_PS_3V3_EN", 408 "UART1_FET_BUF_EN", "EXP_HAT_DETECT", 409 "DSI_GPIO0", "DSI_GPIO1", 410 "OLDI_EDID", "BT_UART_WAKE_SOC_3V3", 411 "USB_TYPEA_OC_INDICATION", "CSI_GPIO0", 412 "CSI_GPIO1", "WLAN_ALERTn", 413 "HDMI_INTn", "TEST_GPIO2", 414 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 415 "MCASP1_FET_SEL", "DSI_EDID", 416 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 417 418 interrupt-parent = <&main_gpio1>; 419 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 420 interrupt-controller; 421 #interrupt-cells = <2>; 422 423 pinctrl-names = "default"; 424 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 425 bootph-all; 426 }; 427 428 exp2: gpio@23 { 429 compatible = "ti,tca6424"; 430 reg = <0x23>; 431 gpio-controller; 432 #gpio-cells = <2>; 433 gpio-line-names = "BT_EN_SOC", "EXP_PS_5V0_EN", 434 "", "", 435 "", "", 436 "", "", 437 "WL_LT_EN", "", 438 "TP3", "TP6", 439 "TP4", "TP7", 440 "TP5", "TP8", 441 "SoC_I2C2_MCAN_SEL", "GPIO_HDMI_RSTn", 442 "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 443 "GPIO_OLDI_RSTn", "GPIO_AUD_RSTn", 444 "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST"; 445 }; 446}; 447 448&main_i2c2 { 449 status = "okay"; 450 pinctrl-names = "default"; 451 pinctrl-0 = <&main_i2c2_pins_default>; 452 clock-frequency = <400000>; 453}; 454 455&sdhci0 { 456 status = "okay"; 457 ti,driver-strength-ohm = <50>; 458 disable-wp; 459 bootph-all; 460}; 461 462&sdhci1 { 463 /* SD/MMC */ 464 status = "okay"; 465 vmmc-supply = <&vdd_mmc1>; 466 vqmmc-supply = <&vddshv_sdio>; 467 pinctrl-names = "default"; 468 pinctrl-0 = <&main_mmc1_pins_default>; 469 disable-wp; 470 bootph-all; 471}; 472 473&cpsw3g { 474 pinctrl-names = "default"; 475 pinctrl-0 = <&main_rgmii1_pins_default>, 476 <&main_rgmii2_pins_default>; 477 status = "okay"; 478}; 479 480&cpsw_port1 { 481 phy-mode = "rgmii-rxid"; 482 phy-handle = <&cpsw3g_phy0>; 483 status = "okay"; 484}; 485 486&cpsw_port2 { 487 phy-mode = "rgmii-rxid"; 488 phy-handle = <&cpsw3g_phy1>; 489 status = "okay"; 490}; 491 492&cpsw3g_mdio { 493 pinctrl-names = "default"; 494 pinctrl-0 = <&main_mdio1_pins_default>; 495 status = "okay"; 496 497 cpsw3g_phy0: ethernet-phy@0 { 498 reg = <0>; 499 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 500 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 501 ti,min-output-impedance; 502 }; 503 504 cpsw3g_phy1: ethernet-phy@1 { 505 reg = <1>; 506 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 507 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 508 ti,min-output-impedance; 509 }; 510}; 511 512&usbss0 { 513 status = "okay"; 514 ti,vbus-divider; 515}; 516 517&usbss1 { 518 status = "okay"; 519 ti,vbus-divider; 520}; 521 522&usb0 { 523 bootph-all; 524 usb-role-switch; 525 526 port { 527 usb0_hs_ep: endpoint { 528 remote-endpoint = <&usb_con_hs>; 529 }; 530 }; 531}; 532 533&usb1 { 534 dr_mode = "host"; 535 pinctrl-names = "default"; 536 pinctrl-0 = <&main_usb1_pins_default>; 537}; 538 539&mcasp1 { 540 status = "okay"; 541 #sound-dai-cells = <0>; 542 543 pinctrl-names = "default"; 544 pinctrl-0 = <&main_mcasp1_pins_default>; 545 546 op-mode = <0>; /* MCASP_IIS_MODE */ 547 tdm-slots = <2>; 548 549 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 550 1 0 2 0 551 0 0 0 0 552 0 0 0 0 553 0 0 0 0 554 >; 555}; 556 557&fss { 558 bootph-all; 559}; 560 561&ospi0 { 562 status = "okay"; 563 pinctrl-names = "default"; 564 pinctrl-0 = <&ospi0_pins_default>; 565 bootph-all; 566 567 flash@0 { 568 compatible = "jedec,spi-nor"; 569 reg = <0x0>; 570 spi-tx-bus-width = <8>; 571 spi-rx-bus-width = <8>; 572 spi-max-frequency = <25000000>; 573 cdns,tshsl-ns = <60>; 574 cdns,tsd2d-ns = <60>; 575 cdns,tchsh-ns = <60>; 576 cdns,tslch-ns = <60>; 577 cdns,read-delay = <4>; 578 bootph-all; 579 580 partitions { 581 compatible = "fixed-partitions"; 582 #address-cells = <1>; 583 #size-cells = <1>; 584 bootph-all; 585 586 partition@0 { 587 label = "ospi.tiboot3"; 588 reg = <0x00 0x80000>; 589 }; 590 591 partition@80000 { 592 label = "ospi.tispl"; 593 reg = <0x80000 0x200000>; 594 }; 595 596 partition@280000 { 597 label = "ospi.u-boot"; 598 reg = <0x280000 0x400000>; 599 }; 600 601 partition@680000 { 602 label = "ospi.env"; 603 reg = <0x680000 0x40000>; 604 }; 605 606 partition@6c0000 { 607 label = "ospi.env.backup"; 608 reg = <0x6c0000 0x40000>; 609 }; 610 611 partition@800000 { 612 label = "ospi.rootfs"; 613 reg = <0x800000 0x37c0000>; 614 }; 615 616 partition@3fc0000 { 617 label = "ospi.phypattern"; 618 reg = <0x3fc0000 0x40000>; 619 bootph-all; 620 }; 621 }; 622 }; 623}; 624 625&mailbox0_cluster0 { 626 status = "okay"; 627 628 mbox_r5_0: mbox-r5-0 { 629 ti,mbox-rx = <0 0 0>; 630 ti,mbox-tx = <1 0 0>; 631 }; 632}; 633 634&mailbox0_cluster1 { 635 status = "okay"; 636 637 mbox_mcu_r5_0: mbox-mcu-r5-0 { 638 ti,mbox-rx = <0 0 0>; 639 ti,mbox-tx = <1 0 0>; 640 }; 641}; 642 643&main_uart0 { 644 pinctrl-names = "default"; 645 pinctrl-0 = <&main_uart0_pins_default>; 646 status = "okay"; 647 bootph-all; 648}; 649 650&main_uart1 { 651 pinctrl-names = "default"; 652 pinctrl-0 = <&main_uart1_pins_default>; 653 /* Main UART1 is used by TIFS firmware */ 654 status = "reserved"; 655 bootph-all; 656}; 657 658&mcu_pmx0 { 659 bootph-all; 660 661 wkup_uart0_pins_default: wkup-uart0-default-pins { 662 pinctrl-single,pins = < 663 AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 664 AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 665 >; 666 bootph-all; 667 }; 668}; 669 670&wkup_uart0 { 671 /* WKUP UART0 is used by DM firmware */ 672 pinctrl-names = "default"; 673 pinctrl-0 = <&wkup_uart0_pins_default>; 674 status = "reserved"; 675 bootph-all; 676}; 677 678/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 679&mcu_gpio0 { 680 status = "reserved"; 681}; 682 683&mcu_gpio_intr { 684 status = "reserved"; 685}; 686