1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/leds/common.h>
7#include <dt-bindings/soc/rockchip,vop2.h>
8#include "rk3588.dtsi"
9
10/ {
11	model = "Radxa ROCK 5B";
12	compatible = "radxa,rock-5b", "rockchip,rk3588";
13
14	aliases {
15		mmc0 = &sdhci;
16		mmc1 = &sdmmc;
17		mmc2 = &sdio;
18	};
19
20	chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	analog-sound {
25		compatible = "audio-graph-card";
26		label = "rk3588-es8316";
27
28		widgets = "Microphone", "Mic Jack",
29			  "Headphone", "Headphones";
30
31		routing = "MIC2", "Mic Jack",
32			  "Headphones", "HPOL",
33			  "Headphones", "HPOR";
34
35		dais = <&i2s0_8ch_p0>;
36		hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
37		pinctrl-names = "default";
38		pinctrl-0 = <&hp_detect>;
39	};
40
41	hdmi0-con {
42		compatible = "hdmi-connector";
43		type = "a";
44
45		port {
46			hdmi0_con_in: endpoint {
47				remote-endpoint = <&hdmi0_out_con>;
48			};
49		};
50	};
51
52	hdmi1-con {
53		compatible = "hdmi-connector";
54		type = "a";
55
56		port {
57			hdmi1_con_in: endpoint {
58				remote-endpoint = <&hdmi1_out_con>;
59			};
60		};
61	};
62
63	leds {
64		compatible = "gpio-leds";
65		pinctrl-names = "default";
66		pinctrl-0 = <&led_rgb_b>;
67
68		led_rgb_b {
69			function = LED_FUNCTION_STATUS;
70			color = <LED_COLOR_ID_BLUE>;
71			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
72			linux,default-trigger = "heartbeat";
73		};
74	};
75
76	fan: pwm-fan {
77		compatible = "pwm-fan";
78		cooling-levels = <0 120 150 180 210 240 255>;
79		fan-supply = <&vcc5v0_sys>;
80		pwms = <&pwm1 0 50000 0>;
81		#cooling-cells = <2>;
82	};
83
84	rfkill {
85		compatible = "rfkill-gpio";
86		label = "rfkill-m2-wlan";
87		radio-type = "wlan";
88		shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
89	};
90
91	rfkill-bt {
92		compatible = "rfkill-gpio";
93		label = "rfkill-m2-bt";
94		radio-type = "bluetooth";
95		shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
96	};
97
98	vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
99		compatible = "regulator-fixed";
100		enable-active-high;
101		gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
102		pinctrl-names = "default";
103		pinctrl-0 = <&pcie2_0_vcc3v3_en>;
104		regulator-name = "vcc3v3_pcie2x1l0";
105		regulator-always-on;
106		regulator-boot-on;
107		regulator-min-microvolt = <3300000>;
108		regulator-max-microvolt = <3300000>;
109		startup-delay-us = <50000>;
110		vin-supply = <&vcc5v0_sys>;
111	};
112
113	vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 {
114		compatible = "regulator-fixed";
115		regulator-name = "vcc3v3_pcie2x1l2";
116		regulator-min-microvolt = <3300000>;
117		regulator-max-microvolt = <3300000>;
118		startup-delay-us = <5000>;
119		vin-supply = <&vcc_3v3_s3>;
120	};
121
122	vcc3v3_pcie30: regulator-vcc3v3-pcie30 {
123		compatible = "regulator-fixed";
124		enable-active-high;
125		gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
126		pinctrl-names = "default";
127		pinctrl-0 = <&pcie3_vcc3v3_en>;
128		regulator-name = "vcc3v3_pcie30";
129		regulator-min-microvolt = <3300000>;
130		regulator-max-microvolt = <3300000>;
131		startup-delay-us = <5000>;
132		vin-supply = <&vcc5v0_sys>;
133	};
134
135	vcc5v0_host: regulator-vcc5v0-host {
136		compatible = "regulator-fixed";
137		regulator-name = "vcc5v0_host";
138		regulator-boot-on;
139		regulator-always-on;
140		regulator-min-microvolt = <5000000>;
141		regulator-max-microvolt = <5000000>;
142		enable-active-high;
143		gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
144		pinctrl-names = "default";
145		pinctrl-0 = <&vcc5v0_host_en>;
146		vin-supply = <&vcc5v0_sys>;
147	};
148
149	vcc5v0_sys: regulator-vcc5v0-sys {
150		compatible = "regulator-fixed";
151		regulator-name = "vcc5v0_sys";
152		regulator-always-on;
153		regulator-boot-on;
154		regulator-min-microvolt = <5000000>;
155		regulator-max-microvolt = <5000000>;
156	};
157
158	vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
159		compatible = "regulator-fixed";
160		regulator-name = "vcc_1v1_nldo_s3";
161		regulator-always-on;
162		regulator-boot-on;
163		regulator-min-microvolt = <1100000>;
164		regulator-max-microvolt = <1100000>;
165		vin-supply = <&vcc5v0_sys>;
166	};
167};
168
169&combphy0_ps {
170	status = "okay";
171};
172
173&combphy1_ps {
174	status = "okay";
175};
176
177&combphy2_psu {
178	status = "okay";
179};
180
181&cpu_b0 {
182	cpu-supply = <&vdd_cpu_big0_s0>;
183};
184
185&cpu_b1 {
186	cpu-supply = <&vdd_cpu_big0_s0>;
187};
188
189&cpu_b2 {
190	cpu-supply = <&vdd_cpu_big1_s0>;
191};
192
193&cpu_b3 {
194	cpu-supply = <&vdd_cpu_big1_s0>;
195};
196
197&cpu_l0 {
198	cpu-supply = <&vdd_cpu_lit_s0>;
199};
200
201&cpu_l1 {
202	cpu-supply = <&vdd_cpu_lit_s0>;
203};
204
205&cpu_l2 {
206	cpu-supply = <&vdd_cpu_lit_s0>;
207};
208
209&cpu_l3 {
210	cpu-supply = <&vdd_cpu_lit_s0>;
211};
212
213&gpu {
214	mali-supply = <&vdd_gpu_s0>;
215	status = "okay";
216};
217
218&hdmi0 {
219	status = "okay";
220};
221
222&hdmi0_in {
223	hdmi0_in_vp0: endpoint {
224		remote-endpoint = <&vp0_out_hdmi0>;
225	};
226};
227
228&hdmi0_out {
229	hdmi0_out_con: endpoint {
230		remote-endpoint = <&hdmi0_con_in>;
231	};
232};
233
234&hdmi0_sound {
235	status = "okay";
236};
237
238&hdmi1 {
239	pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
240		     &hdmim1_tx1_scl &hdmim1_tx1_sda>;
241	status = "okay";
242};
243
244&hdmi1_in {
245	hdmi1_in_vp1: endpoint {
246		remote-endpoint = <&vp1_out_hdmi1>;
247	};
248};
249
250&hdmi1_out {
251	hdmi1_out_con: endpoint {
252		remote-endpoint = <&hdmi1_con_in>;
253	};
254};
255
256&hdmi1_sound {
257	status = "okay";
258};
259
260&hdmi_receiver_cma {
261	status = "okay";
262};
263
264&hdmi_receiver {
265	hpd-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>;
266	pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
267	pinctrl-names = "default";
268	status = "okay";
269};
270
271&hdptxphy0 {
272	status = "okay";
273};
274
275&hdptxphy1 {
276	status = "okay";
277};
278
279&i2c0 {
280	pinctrl-names = "default";
281	pinctrl-0 = <&i2c0m2_xfer>;
282	status = "okay";
283
284	vdd_cpu_big0_s0: regulator@42 {
285		compatible = "rockchip,rk8602";
286		reg = <0x42>;
287		fcs,suspend-voltage-selector = <1>;
288		regulator-name = "vdd_cpu_big0_s0";
289		regulator-always-on;
290		regulator-boot-on;
291		regulator-min-microvolt = <550000>;
292		regulator-max-microvolt = <1050000>;
293		regulator-ramp-delay = <2300>;
294		vin-supply = <&vcc5v0_sys>;
295
296		regulator-state-mem {
297			regulator-off-in-suspend;
298		};
299	};
300
301	vdd_cpu_big1_s0: regulator@43 {
302		compatible = "rockchip,rk8603", "rockchip,rk8602";
303		reg = <0x43>;
304		fcs,suspend-voltage-selector = <1>;
305		regulator-name = "vdd_cpu_big1_s0";
306		regulator-always-on;
307		regulator-boot-on;
308		regulator-min-microvolt = <550000>;
309		regulator-max-microvolt = <1050000>;
310		regulator-ramp-delay = <2300>;
311		vin-supply = <&vcc5v0_sys>;
312
313		regulator-state-mem {
314			regulator-off-in-suspend;
315		};
316	};
317};
318
319&i2c6 {
320	status = "okay";
321
322	hym8563: rtc@51 {
323		compatible = "haoyu,hym8563";
324		reg = <0x51>;
325		#clock-cells = <0>;
326		clock-output-names = "hym8563";
327		pinctrl-names = "default";
328		pinctrl-0 = <&hym8563_int>;
329		interrupt-parent = <&gpio0>;
330		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
331		wakeup-source;
332	};
333};
334
335&i2c7 {
336	status = "okay";
337
338	es8316: audio-codec@11 {
339		compatible = "everest,es8316";
340		reg = <0x11>;
341		clocks = <&cru I2S0_8CH_MCLKOUT>;
342		clock-names = "mclk";
343		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
344		assigned-clock-rates = <12288000>;
345		#sound-dai-cells = <0>;
346
347		port {
348			es8316_p0_0: endpoint {
349				remote-endpoint = <&i2s0_8ch_p0_0>;
350			};
351		};
352	};
353};
354
355&i2s0_8ch {
356	pinctrl-names = "default";
357	pinctrl-0 = <&i2s0_lrck
358		     &i2s0_mclk
359		     &i2s0_sclk
360		     &i2s0_sdi0
361		     &i2s0_sdo0>;
362	status = "okay";
363
364	i2s0_8ch_p0: port {
365		i2s0_8ch_p0_0: endpoint {
366			dai-format = "i2s";
367			mclk-fs = <256>;
368			remote-endpoint = <&es8316_p0_0>;
369		};
370	};
371};
372
373&i2s5_8ch {
374	status = "okay";
375};
376
377&i2s6_8ch {
378	status = "okay";
379};
380
381&package_thermal {
382	polling-delay = <1000>;
383
384	trips {
385		package_fan0: package-fan0 {
386			temperature = <55000>;
387			hysteresis = <2000>;
388			type = "active";
389		};
390
391		package_fan1: package-fan1 {
392			temperature = <65000>;
393			hysteresis = <2000>;
394			type = "active";
395		};
396	};
397
398	cooling-maps {
399		map0 {
400			trip = <&package_fan0>;
401			cooling-device = <&fan THERMAL_NO_LIMIT 1>;
402		};
403
404		map1 {
405			trip = <&package_fan1>;
406			cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
407		};
408	};
409};
410
411&pcie2x1l0 {
412	pinctrl-names = "default";
413	pinctrl-0 = <&pcie2_0_rst>;
414	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
415	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
416	status = "okay";
417};
418
419&pcie2x1l2 {
420	pinctrl-names = "default";
421	pinctrl-0 = <&pcie2_2_rst>;
422	reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
423	vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
424	status = "okay";
425};
426
427&pcie30phy {
428	status = "okay";
429};
430
431&pcie3x4 {
432	pinctrl-names = "default";
433	pinctrl-0 = <&pcie3_rst>;
434	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
435	vpcie3v3-supply = <&vcc3v3_pcie30>;
436	status = "okay";
437};
438
439&pd_gpu {
440	domain-supply = <&vdd_gpu_s0>;
441};
442
443&pinctrl {
444	hdmirx {
445		hdmirx_hpd: hdmirx-5v-detection {
446			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
447		};
448	};
449
450	hym8563 {
451		hym8563_int: hym8563-int {
452			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
453		};
454	};
455
456	leds {
457		led_rgb_b: led-rgb-b {
458			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
459		};
460	};
461
462	sound {
463		hp_detect: hp-detect {
464			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
465		};
466	};
467
468	pcie2 {
469		pcie2_0_rst: pcie2-0-rst {
470			rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
471		};
472
473		pcie2_0_vcc3v3_en: pcie2-0-vcc-en {
474			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
475		};
476
477		pcie2_2_rst: pcie2-2-rst {
478			rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
479		};
480	};
481
482	pcie3 {
483		pcie3_rst: pcie3-rst {
484			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
485		};
486
487		pcie3_vcc3v3_en: pcie3-vcc3v3-en {
488			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
489		};
490	};
491
492	usb {
493		vcc5v0_host_en: vcc5v0-host-en {
494			rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
495		};
496	};
497};
498
499&pwm1 {
500	status = "okay";
501};
502
503&saradc {
504	vref-supply = <&avcc_1v8_s0>;
505	status = "okay";
506};
507
508&sdhci {
509	bus-width = <8>;
510	no-sdio;
511	no-sd;
512	non-removable;
513	mmc-hs400-1_8v;
514	mmc-hs400-enhanced-strobe;
515	status = "okay";
516};
517
518&sdmmc {
519	max-frequency = <200000000>;
520	no-sdio;
521	no-mmc;
522	bus-width = <4>;
523	cap-mmc-highspeed;
524	cap-sd-highspeed;
525	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
526	disable-wp;
527	sd-uhs-sdr104;
528	vmmc-supply = <&vcc_3v3_s3>;
529	vqmmc-supply = <&vccio_sd_s0>;
530	status = "okay";
531};
532
533&sdio {
534	max-frequency = <200000000>;
535	no-sd;
536	no-mmc;
537	non-removable;
538	bus-width = <4>;
539	cap-sdio-irq;
540	disable-wp;
541	keep-power-in-suspend;
542	wakeup-source;
543	sd-uhs-sdr12;
544	sd-uhs-sdr25;
545	sd-uhs-sdr50;
546	sd-uhs-sdr104;
547	vmmc-supply = <&vcc3v3_pcie2x1l0>;
548	vqmmc-supply = <&vcc_1v8_s3>;
549	pinctrl-names = "default";
550	pinctrl-0 = <&sdiom0_pins>;
551	status = "okay";
552};
553
554&sfc {
555	pinctrl-names = "default";
556	pinctrl-0 = <&fspim2_pins>;
557	status = "okay";
558
559	flash@0 {
560		compatible = "jedec,spi-nor";
561		reg = <0>;
562		spi-max-frequency = <104000000>;
563		spi-rx-bus-width = <4>;
564		spi-tx-bus-width = <1>;
565	};
566};
567
568&uart6 {
569	pinctrl-names = "default";
570	pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
571	status = "okay";
572};
573
574&spi2 {
575	status = "okay";
576	assigned-clocks = <&cru CLK_SPI2>;
577	assigned-clock-rates = <200000000>;
578	pinctrl-names = "default";
579	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
580	num-cs = <1>;
581
582	pmic@0 {
583		compatible = "rockchip,rk806";
584		spi-max-frequency = <1000000>;
585		reg = <0x0>;
586
587		interrupt-parent = <&gpio0>;
588		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
589
590		pinctrl-names = "default";
591		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
592			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
593
594		system-power-controller;
595
596		vcc1-supply = <&vcc5v0_sys>;
597		vcc2-supply = <&vcc5v0_sys>;
598		vcc3-supply = <&vcc5v0_sys>;
599		vcc4-supply = <&vcc5v0_sys>;
600		vcc5-supply = <&vcc5v0_sys>;
601		vcc6-supply = <&vcc5v0_sys>;
602		vcc7-supply = <&vcc5v0_sys>;
603		vcc8-supply = <&vcc5v0_sys>;
604		vcc9-supply = <&vcc5v0_sys>;
605		vcc10-supply = <&vcc5v0_sys>;
606		vcc11-supply = <&vcc_2v0_pldo_s3>;
607		vcc12-supply = <&vcc5v0_sys>;
608		vcc13-supply = <&vcc_1v1_nldo_s3>;
609		vcc14-supply = <&vcc_1v1_nldo_s3>;
610		vcca-supply = <&vcc5v0_sys>;
611
612		gpio-controller;
613		#gpio-cells = <2>;
614
615		rk806_dvs1_null: dvs1-null-pins {
616			pins = "gpio_pwrctrl1";
617			function = "pin_fun0";
618		};
619
620		rk806_dvs2_null: dvs2-null-pins {
621			pins = "gpio_pwrctrl2";
622			function = "pin_fun0";
623		};
624
625		rk806_dvs3_null: dvs3-null-pins {
626			pins = "gpio_pwrctrl3";
627			function = "pin_fun0";
628		};
629
630		regulators {
631			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
632				regulator-boot-on;
633				regulator-min-microvolt = <550000>;
634				regulator-max-microvolt = <950000>;
635				regulator-ramp-delay = <12500>;
636				regulator-name = "vdd_gpu_s0";
637				regulator-enable-ramp-delay = <400>;
638
639				regulator-state-mem {
640					regulator-off-in-suspend;
641				};
642			};
643
644			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
645				regulator-always-on;
646				regulator-boot-on;
647				regulator-min-microvolt = <550000>;
648				regulator-max-microvolt = <950000>;
649				regulator-ramp-delay = <12500>;
650				regulator-name = "vdd_cpu_lit_s0";
651
652				regulator-state-mem {
653					regulator-off-in-suspend;
654				};
655			};
656
657			vdd_log_s0: dcdc-reg3 {
658				regulator-always-on;
659				regulator-boot-on;
660				regulator-min-microvolt = <675000>;
661				regulator-max-microvolt = <750000>;
662				regulator-ramp-delay = <12500>;
663				regulator-name = "vdd_log_s0";
664
665				regulator-state-mem {
666					regulator-off-in-suspend;
667					regulator-suspend-microvolt = <750000>;
668				};
669			};
670
671			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
672				regulator-always-on;
673				regulator-boot-on;
674				regulator-min-microvolt = <550000>;
675				regulator-max-microvolt = <950000>;
676				regulator-ramp-delay = <12500>;
677				regulator-name = "vdd_vdenc_s0";
678
679				regulator-state-mem {
680					regulator-off-in-suspend;
681				};
682			};
683
684			vdd_ddr_s0: dcdc-reg5 {
685				regulator-always-on;
686				regulator-boot-on;
687				regulator-min-microvolt = <675000>;
688				regulator-max-microvolt = <900000>;
689				regulator-ramp-delay = <12500>;
690				regulator-name = "vdd_ddr_s0";
691
692				regulator-state-mem {
693					regulator-off-in-suspend;
694					regulator-suspend-microvolt = <850000>;
695				};
696			};
697
698			vdd2_ddr_s3: dcdc-reg6 {
699				regulator-always-on;
700				regulator-boot-on;
701				regulator-name = "vdd2_ddr_s3";
702
703				regulator-state-mem {
704					regulator-on-in-suspend;
705				};
706			};
707
708			vcc_2v0_pldo_s3: dcdc-reg7 {
709				regulator-always-on;
710				regulator-boot-on;
711				regulator-min-microvolt = <2000000>;
712				regulator-max-microvolt = <2000000>;
713				regulator-ramp-delay = <12500>;
714				regulator-name = "vdd_2v0_pldo_s3";
715
716				regulator-state-mem {
717					regulator-on-in-suspend;
718					regulator-suspend-microvolt = <2000000>;
719				};
720			};
721
722			vcc_3v3_s3: dcdc-reg8 {
723				regulator-always-on;
724				regulator-boot-on;
725				regulator-min-microvolt = <3300000>;
726				regulator-max-microvolt = <3300000>;
727				regulator-name = "vcc_3v3_s3";
728
729				regulator-state-mem {
730					regulator-on-in-suspend;
731					regulator-suspend-microvolt = <3300000>;
732				};
733			};
734
735			vddq_ddr_s0: dcdc-reg9 {
736				regulator-always-on;
737				regulator-boot-on;
738				regulator-name = "vddq_ddr_s0";
739
740				regulator-state-mem {
741					regulator-off-in-suspend;
742				};
743			};
744
745			vcc_1v8_s3: dcdc-reg10 {
746				regulator-always-on;
747				regulator-boot-on;
748				regulator-min-microvolt = <1800000>;
749				regulator-max-microvolt = <1800000>;
750				regulator-name = "vcc_1v8_s3";
751
752				regulator-state-mem {
753					regulator-on-in-suspend;
754					regulator-suspend-microvolt = <1800000>;
755				};
756			};
757
758			avcc_1v8_s0: pldo-reg1 {
759				regulator-always-on;
760				regulator-boot-on;
761				regulator-min-microvolt = <1800000>;
762				regulator-max-microvolt = <1800000>;
763				regulator-name = "avcc_1v8_s0";
764
765				regulator-state-mem {
766					regulator-off-in-suspend;
767				};
768			};
769
770			vcc_1v8_s0: pldo-reg2 {
771				regulator-always-on;
772				regulator-boot-on;
773				regulator-min-microvolt = <1800000>;
774				regulator-max-microvolt = <1800000>;
775				regulator-name = "vcc_1v8_s0";
776
777				regulator-state-mem {
778					regulator-off-in-suspend;
779					regulator-suspend-microvolt = <1800000>;
780				};
781			};
782
783			avdd_1v2_s0: pldo-reg3 {
784				regulator-always-on;
785				regulator-boot-on;
786				regulator-min-microvolt = <1200000>;
787				regulator-max-microvolt = <1200000>;
788				regulator-name = "avdd_1v2_s0";
789
790				regulator-state-mem {
791					regulator-off-in-suspend;
792				};
793			};
794
795			vcc_3v3_s0: pldo-reg4 {
796				regulator-always-on;
797				regulator-boot-on;
798				regulator-min-microvolt = <3300000>;
799				regulator-max-microvolt = <3300000>;
800				regulator-ramp-delay = <12500>;
801				regulator-name = "vcc_3v3_s0";
802
803				regulator-state-mem {
804					regulator-off-in-suspend;
805				};
806			};
807
808			vccio_sd_s0: pldo-reg5 {
809				regulator-always-on;
810				regulator-boot-on;
811				regulator-min-microvolt = <1800000>;
812				regulator-max-microvolt = <3300000>;
813				regulator-ramp-delay = <12500>;
814				regulator-name = "vccio_sd_s0";
815
816				regulator-state-mem {
817					regulator-off-in-suspend;
818				};
819			};
820
821			pldo6_s3: pldo-reg6 {
822				regulator-always-on;
823				regulator-boot-on;
824				regulator-min-microvolt = <1800000>;
825				regulator-max-microvolt = <1800000>;
826				regulator-name = "pldo6_s3";
827
828				regulator-state-mem {
829					regulator-on-in-suspend;
830					regulator-suspend-microvolt = <1800000>;
831				};
832			};
833
834			vdd_0v75_s3: nldo-reg1 {
835				regulator-always-on;
836				regulator-boot-on;
837				regulator-min-microvolt = <750000>;
838				regulator-max-microvolt = <750000>;
839				regulator-name = "vdd_0v75_s3";
840
841				regulator-state-mem {
842					regulator-on-in-suspend;
843					regulator-suspend-microvolt = <750000>;
844				};
845			};
846
847			vdd_ddr_pll_s0: nldo-reg2 {
848				regulator-always-on;
849				regulator-boot-on;
850				regulator-min-microvolt = <850000>;
851				regulator-max-microvolt = <850000>;
852				regulator-name = "vdd_ddr_pll_s0";
853
854				regulator-state-mem {
855					regulator-off-in-suspend;
856					regulator-suspend-microvolt = <850000>;
857				};
858			};
859
860			avdd_0v75_s0: nldo-reg3 {
861				regulator-always-on;
862				regulator-boot-on;
863				regulator-min-microvolt = <750000>;
864				regulator-max-microvolt = <750000>;
865				regulator-name = "avdd_0v75_s0";
866
867				regulator-state-mem {
868					regulator-off-in-suspend;
869				};
870			};
871
872			vdd_0v85_s0: nldo-reg4 {
873				regulator-always-on;
874				regulator-boot-on;
875				regulator-min-microvolt = <850000>;
876				regulator-max-microvolt = <850000>;
877				regulator-name = "vdd_0v85_s0";
878
879				regulator-state-mem {
880					regulator-off-in-suspend;
881				};
882			};
883
884			vdd_0v75_s0: nldo-reg5 {
885				regulator-always-on;
886				regulator-boot-on;
887				regulator-min-microvolt = <750000>;
888				regulator-max-microvolt = <750000>;
889				regulator-name = "vdd_0v75_s0";
890
891				regulator-state-mem {
892					regulator-off-in-suspend;
893				};
894			};
895		};
896	};
897};
898
899&tsadc {
900	status = "okay";
901};
902
903&uart2 {
904	pinctrl-0 = <&uart2m0_xfer>;
905	status = "okay";
906};
907
908&u2phy1 {
909	status = "okay";
910};
911
912&u2phy1_otg {
913	status = "okay";
914};
915
916&u2phy2 {
917	status = "okay";
918};
919
920&u2phy2_host {
921	/* connected to USB hub, which is powered by vcc5v0_sys */
922	phy-supply = <&vcc5v0_sys>;
923	status = "okay";
924};
925
926&u2phy3 {
927	status = "okay";
928};
929
930&u2phy3_host {
931	phy-supply = <&vcc5v0_host>;
932	status = "okay";
933};
934
935&usbdp_phy1 {
936	status = "okay";
937};
938
939&usb_host0_ehci {
940	status = "okay";
941};
942
943&usb_host0_ohci {
944	status = "okay";
945};
946
947&usb_host1_ehci {
948	status = "okay";
949};
950
951&usb_host1_ohci {
952	status = "okay";
953};
954
955&usb_host1_xhci {
956	dr_mode = "host";
957	status = "okay";
958};
959
960&usb_host2_xhci {
961	status = "okay";
962};
963
964&vop {
965	status = "okay";
966};
967
968&vop_mmu {
969	status = "okay";
970};
971
972&vp0 {
973	vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
974		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
975		remote-endpoint = <&hdmi0_in_vp0>;
976	};
977};
978
979&vp1 {
980	vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
981		reg = <ROCKCHIP_VOP2_EP_HDMI1>;
982		remote-endpoint = <&hdmi1_in_vp1>;
983	};
984};
985