1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2024 Radxa Limited 4 * Copyright (c) 2024 Heiko Stuebner <heiko@sntech.de> 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/pwm/pwm.h> 14#include <dt-bindings/soc/rockchip,vop2.h> 15#include "dt-bindings/usb/pd.h" 16#include "rk3588.dtsi" 17 18/ { 19 model = "Radxa ROCK 5 ITX"; 20 compatible = "radxa,rock-5-itx", "rockchip,rk3588"; 21 22 aliases { 23 mmc0 = &sdhci; 24 mmc1 = &sdmmc; 25 mmc2 = &sdio; 26 }; 27 28 chosen { 29 stdout-path = "serial2:1500000n8"; 30 }; 31 32 adc_keys: adc-keys { 33 compatible = "adc-keys"; 34 io-channels = <&saradc 0>; 35 io-channel-names = "buttons"; 36 keyup-threshold-microvolt = <1800000>; 37 poll-interval = <100>; 38 39 button-maskrom { 40 label = "Mask Rom"; 41 linux,code = <KEY_SETUP>; 42 press-threshold-microvolt = <1750>; 43 }; 44 }; 45 46 analog-sound { 47 compatible = "audio-graph-card"; 48 label = "rk3588-es8316"; 49 dais = <&i2s0_8ch_p0>; 50 hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 51 pinctrl-names = "default"; 52 pinctrl-0 = <&hp_detect>; 53 routing = "MIC2", "Mic Jack", 54 "Headphones", "HPOL", 55 "Headphones", "HPOR"; 56 widgets = "Microphone", "Mic Jack", 57 "Headphone", "Headphones"; 58 }; 59 60 gpio-leds { 61 compatible = "gpio-leds"; 62 pinctrl-names = "default"; 63 pinctrl-0 = <&led_pins>; 64 65 power-led1 { 66 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 67 linux,default-trigger = "default-on"; 68 }; 69 70 hdd-led2 { 71 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "disk-activity"; 73 }; 74 }; 75 76 hdmi1-con { 77 compatible = "hdmi-connector"; 78 type = "a"; 79 80 port { 81 hdmi1_con_in: endpoint { 82 remote-endpoint = <&hdmi1_out_con>; 83 }; 84 }; 85 }; 86 87 /* Unnamed gated oscillator: 100MHz,3.3V,3225 */ 88 pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator { 89 compatible = "gated-fixed-clock"; 90 #clock-cells = <0>; 91 clock-frequency = <100000000>; 92 clock-output-names = "pcie30_refclk"; 93 vdd-supply = <&vcc3v3_pi6c_05>; 94 }; 95 96 fan0: pwm-fan { 97 compatible = "pwm-fan"; 98 #cooling-cells = <2>; 99 cooling-levels = <0 64 128 192 255>; 100 fan-supply = <&vcc12v_dcin>; 101 pwms = <&pwm14 0 10000 0>; 102 }; 103 104 /* M.2 E-KEY */ 105 sdio_pwrseq: sdio-pwrseq { 106 compatible = "mmc-pwrseq-simple"; 107 clocks = <&hym8563>; 108 clock-names = "ext_clock"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&wifi_enable_h>; 111 reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 112 }; 113 114 typec_vin: regulator-typec-vin { 115 compatible = "regulator-fixed"; 116 enable-active-high; 117 gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&vbus5v0_typec_en>; 120 regulator-name = "typec_vin"; 121 regulator-min-microvolt = <5000000>; 122 regulator-max-microvolt = <5000000>; 123 vin-supply = <&vcc5v0_sys>; 124 }; 125 126 vcc12v_dcin: regulator-vcc12v-dcin { 127 compatible = "regulator-fixed"; 128 regulator-name = "vcc12v_dcin"; 129 regulator-always-on; 130 regulator-boot-on; 131 regulator-min-microvolt = <12000000>; 132 regulator-max-microvolt = <12000000>; 133 }; 134 135 vcc33_io64: regulator-vcc33-io64 { 136 compatible = "regulator-fixed"; 137 regulator-name = "vcc33_io64"; 138 regulator-always-on; 139 regulator-boot-on; 140 regulator-min-microvolt = <3300000>; 141 regulator-max-microvolt = <3300000>; 142 vin-supply = <&vcc12v_dcin>; 143 }; 144 145 vcc3v3_ekey: regulator-vcc3v3-ekey { 146 compatible = "regulator-fixed"; 147 enable-active-high; 148 gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&ekey_en>; 151 regulator-name = "vcc3v3_ekey"; 152 regulator-always-on; 153 regulator-boot-on; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 startup-delay-us = <50000>; 157 vin-supply = <&vcc5v0_sys>; 158 }; 159 160 vcc3v3_lan: vcc3v3_lan_phy2: regulator-vcc3v3-lan { 161 compatible = "regulator-fixed"; 162 regulator-name = "vcc3v3_lan"; 163 regulator-always-on; 164 regulator-boot-on; 165 regulator-min-microvolt = <3300000>; 166 regulator-max-microvolt = <3300000>; 167 vin-supply = <&vcc_3v3_s3>; 168 }; 169 170 /* The PCIE30x4_PWREN_H controls two regulators */ 171 vcc3v3_mkey: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 { 172 compatible = "regulator-fixed"; 173 enable-active-high; 174 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&pcie30x4_pwren_h>; 177 regulator-name = "vcc3v3_pi6c_05"; 178 regulator-min-microvolt = <3300000>; 179 regulator-max-microvolt = <3300000>; 180 startup-delay-us = <5000>; 181 vin-supply = <&vcc5v0_sys>; 182 }; 183 184 vcc3v3_sys: regulator-vcc3v3-sys { 185 compatible = "regulator-fixed"; 186 regulator-name = "vcc3v3_sys"; 187 regulator-always-on; 188 regulator-boot-on; 189 regulator-min-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>; 191 vin-supply = <&vcc12v_dcin>; 192 }; 193 194 vcc5v0_sys: regulator-vcc5v0-sys { 195 compatible = "regulator-fixed"; 196 regulator-name = "vcc5v0_sys"; 197 regulator-always-on; 198 regulator-boot-on; 199 regulator-min-microvolt = <5000000>; 200 regulator-max-microvolt = <5000000>; 201 vin-supply = <&vcc12v_dcin>; 202 }; 203 204 vcc5v0_usb20: vcc5v0_usb12: vcc5v0_usb34: regulator-vcc5v0-usb { 205 compatible = "regulator-fixed"; 206 enable-active-high; 207 gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&usb_host_pwren_h>; 210 regulator-name = "vcc5v0_usb"; 211 regulator-min-microvolt = <5000000>; 212 regulator-max-microvolt = <5000000>; 213 vin-supply = <&vcc5v0_sys>; 214 }; 215 216 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 217 compatible = "regulator-fixed"; 218 regulator-name = "vcc_1v1_nldo_s3"; 219 regulator-always-on; 220 regulator-boot-on; 221 regulator-min-microvolt = <1100000>; 222 regulator-max-microvolt = <1100000>; 223 vin-supply = <&vcc5v0_sys>; 224 }; 225}; 226 227&combphy0_ps { 228 status = "okay"; 229}; 230 231&combphy1_ps { 232 status = "okay"; 233}; 234 235&combphy2_psu { 236 status = "okay"; 237}; 238 239&cpu_b0 { 240 cpu-supply = <&vdd_cpu_big0_s0>; 241}; 242 243&cpu_b1 { 244 cpu-supply = <&vdd_cpu_big0_s0>; 245}; 246 247&cpu_b2 { 248 cpu-supply = <&vdd_cpu_big1_s0>; 249}; 250 251&cpu_b3 { 252 cpu-supply = <&vdd_cpu_big1_s0>; 253}; 254 255&cpu_l0 { 256 cpu-supply = <&vdd_cpu_lit_s0>; 257}; 258 259&cpu_l1 { 260 cpu-supply = <&vdd_cpu_lit_s0>; 261}; 262 263&cpu_l2 { 264 cpu-supply = <&vdd_cpu_lit_s0>; 265}; 266 267&cpu_l3 { 268 cpu-supply = <&vdd_cpu_lit_s0>; 269}; 270 271&gpu { 272 mali-supply = <&vdd_gpu_s0>; 273 status = "okay"; 274}; 275 276&hdmi1 { 277 pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd 278 &hdmim1_tx1_scl &hdmim1_tx1_sda>; 279 status = "okay"; 280}; 281 282&hdmi1_in { 283 hdmi1_in_vp1: endpoint { 284 remote-endpoint = <&vp1_out_hdmi1>; 285 }; 286}; 287 288&hdmi1_out { 289 hdmi1_out_con: endpoint { 290 remote-endpoint = <&hdmi1_con_in>; 291 }; 292}; 293 294&hdptxphy1 { 295 status = "okay"; 296}; 297 298&i2c0 { 299 pinctrl-names = "default"; 300 pinctrl-0 = <&i2c0m2_xfer>; 301 status = "okay"; 302 303 vdd_cpu_big0_s0: regulator@42 { 304 compatible = "rockchip,rk8602"; 305 reg = <0x42>; 306 fcs,suspend-voltage-selector = <1>; 307 regulator-name = "vdd_cpu_big0_s0"; 308 regulator-always-on; 309 regulator-boot-on; 310 regulator-min-microvolt = <550000>; 311 regulator-max-microvolt = <1050000>; 312 regulator-ramp-delay = <2300>; 313 vin-supply = <&vcc5v0_sys>; 314 315 regulator-state-mem { 316 regulator-off-in-suspend; 317 }; 318 }; 319 320 vdd_cpu_big1_s0: regulator@43 { 321 compatible = "rockchip,rk8603", "rockchip,rk8602"; 322 reg = <0x43>; 323 fcs,suspend-voltage-selector = <1>; 324 regulator-name = "vdd_cpu_big1_s0"; 325 regulator-always-on; 326 regulator-boot-on; 327 regulator-min-microvolt = <550000>; 328 regulator-max-microvolt = <1050000>; 329 regulator-ramp-delay = <2300>; 330 vin-supply = <&vcc5v0_sys>; 331 332 regulator-state-mem { 333 regulator-off-in-suspend; 334 }; 335 }; 336}; 337 338&i2c1 { 339 pinctrl-names = "default"; 340 pinctrl-0 = <&i2c1m2_xfer>; 341 status = "okay"; 342 343 vdd_npu_s0: regulator@42 { 344 compatible = "rockchip,rk8602"; 345 reg = <0x42>; 346 fcs,suspend-voltage-selector = <1>; 347 regulator-name = "vdd_npu_s0"; 348 regulator-always-on; 349 regulator-boot-on; 350 regulator-min-microvolt = <550000>; 351 regulator-max-microvolt = <950000>; 352 regulator-ramp-delay = <2300>; 353 vin-supply = <&vcc5v0_sys>; 354 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359}; 360 361/* CAM0 connector */ 362&i2c3 { 363 pinctrl-names = "default"; 364 pinctrl-0 = <&i2c3m0_xfer>; 365}; 366 367/* M.2 E-key */ 368&i2c4 { 369 pinctrl-names = "default"; 370 pinctrl-0 = <&i2c4m1_xfer>; 371}; 372 373/* RTC and LCD0 connector */ 374&i2c6 { 375 pinctrl-names = "default"; 376 pinctrl-0 = <&i2c6m0_xfer>; 377 status = "okay"; 378 379 hym8563: rtc@51 { 380 compatible = "haoyu,hym8563"; 381 reg = <0x51>; 382 #clock-cells = <0>; 383 clock-output-names = "wifi_32kout"; 384 interrupt-parent = <&gpio0>; 385 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 386 pinctrl-names = "default"; 387 pinctrl-0 = <&rtc_int>; 388 }; 389}; 390 391/* Audio codec and CAM1 connector */ 392&i2c7 { 393 pinctrl-names = "default"; 394 pinctrl-0 = <&i2c7m0_xfer>; 395 status = "okay"; 396 397 es8316: audio-codec@11 { 398 compatible = "everest,es8316"; 399 reg = <0x11>; 400 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 401 assigned-clock-rates = <12288000>; 402 clocks = <&cru I2S0_8CH_MCLKOUT>; 403 clock-names = "mclk"; 404 #sound-dai-cells = <0>; 405 406 port { 407 es8316_p0_0: endpoint { 408 remote-endpoint = <&i2s0_8ch_p0_0>; 409 }; 410 }; 411 }; 412}; 413 414/* FUSB302 and LCD1 connector */ 415&i2c8 { 416 pinctrl-names = "default"; 417 pinctrl-0 = <&i2c8m4_xfer>; 418 status = "okay"; 419 420 usbc0: usb-typec@22 { 421 compatible = "fcs,fusb302"; 422 reg = <0x22>; 423 interrupt-parent = <&gpio3>; 424 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>; 425 pinctrl-names = "default"; 426 pinctrl-0 = <&usbc0_int>; 427 vbus-supply = <&typec_vin>; 428 429 usb_con: connector { 430 compatible = "usb-c-connector"; 431 data-role = "dual"; 432 label = "USB-C"; 433 power-role = "source"; 434 source-pdos = 435 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 436 437 ports { 438 #address-cells = <1>; 439 #size-cells = <0>; 440 441 port@0 { 442 reg = <0>; 443 444 usbc0_orien_sw: endpoint { 445 remote-endpoint = <&usbdp_phy0_orientation_switch>; 446 }; 447 }; 448 449 port@1 { 450 reg = <1>; 451 452 usbc0_role_sw: endpoint { 453 remote-endpoint = <&dwc3_0_role_switch>; 454 }; 455 }; 456 457 port@2 { 458 reg = <2>; 459 460 dp_altmode_mux: endpoint { 461 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 462 }; 463 }; 464 }; 465 }; 466 }; 467}; 468 469&i2c8m4_xfer { 470 rockchip,pins = 471 /* i2c8_scl_m4 */ 472 <3 RK_PC2 9 &pcfg_pull_up_drv_level_6>, 473 /* i2c8_sda_m4 */ 474 <3 RK_PC3 9 &pcfg_pull_up_drv_level_6>; 475}; 476 477&i2s0_8ch { 478 pinctrl-names = "default"; 479 pinctrl-0 = <&i2s0_lrck 480 &i2s0_mclk 481 &i2s0_sclk 482 &i2s0_sdi0 483 &i2s0_sdo0>; 484 status = "okay"; 485 486 i2s0_8ch_p0: port { 487 i2s0_8ch_p0_0: endpoint { 488 dai-format = "i2s"; 489 mclk-fs = <256>; 490 remote-endpoint = <&es8316_p0_0>; 491 }; 492 }; 493}; 494 495&package_thermal { 496 polling-delay = <1000>; 497 498 trips { 499 package_fan0: package-fan0 { 500 hysteresis = <2000>; 501 temperature = <50000>; 502 type = "active"; 503 }; 504 505 package_fan1: package-fan1 { 506 hysteresis = <2000>; 507 temperature = <65000>; 508 type = "active"; 509 }; 510 }; 511 512 cooling-maps { 513 map0 { 514 cooling-device = <&fan0 THERMAL_NO_LIMIT 1>; 515 trip = <&package_fan0>; 516 }; 517 map1 { 518 cooling-device = <&fan0 2 THERMAL_NO_LIMIT>; 519 trip = <&package_fan1>; 520 }; 521 }; 522}; 523 524/* M.2 E-key */ 525&pcie2x1l0 { 526 pinctrl-names = "default"; 527 pinctrl-0 = <&pcie30x1_0_perstn_m1_l>; 528 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 529 vpcie3v3-supply = <&vcc3v3_ekey>; 530 status = "okay"; 531}; 532 533/* RTL8125B_1 */ 534&pcie2x1l1 { 535 pinctrl-names = "default"; 536 pinctrl-0 = <&pcie30x1_1_perstn>; 537 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 538 vpcie3v3-supply = <&vcc3v3_lan>; 539 status = "okay"; 540}; 541 542/* RTL8125B_2 */ 543&pcie2x1l2 { 544 pinctrl-names = "default"; 545 pinctrl-0 = <&pcie20x1_2_perstn>; 546 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 547 vpcie3v3-supply = <&vcc3v3_lan_phy2>; 548 status = "okay"; 549}; 550 551&pcie30phy { 552 data-lanes = <1 1 2 2>; 553 /* separate clock lines from the clock generator to phy and devices */ 554 rockchip,rx-common-refclk-mode = <0 0 0 0>; 555 status = "okay"; 556}; 557 558/* ASMedia ASM1164 Sata controller */ 559&pcie3x2 { 560 /* 561 * The board has a "pcie_refclk" oscillator that needs enabling, 562 * so add it to the list of clocks. 563 */ 564 clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>, 565 <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>, 566 <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>, 567 <&pcie30_port1_refclk>; 568 clock-names = "aclk_mst", "aclk_slv", 569 "aclk_dbi", "pclk", 570 "aux", "pipe", 571 "ref"; 572 pinctrl-names = "default"; 573 pinctrl-0 = <&pcie30x2_perstn_m1_l>; 574 reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 575 vpcie3v3-supply = <&vcc33_io64>; 576 status = "okay"; 577}; 578 579/* M.2 M.key */ 580&pcie3x4 { 581 /* 582 * The board has a "pcie_refclk" oscillator that needs enabling, 583 * so add it to the list of clocks. 584 */ 585 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 586 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 587 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 588 <&pcie30_port0_refclk>; 589 clock-names = "aclk_mst", "aclk_slv", 590 "aclk_dbi", "pclk", 591 "aux", "pipe", 592 "ref"; 593 num-lanes = <2>; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&pcie30x4_perstn_m1_l>; 596 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 597 vpcie3v3-supply = <&vcc3v3_mkey>; 598 status = "okay"; 599}; 600 601&pd_gpu { 602 domain-supply = <&vdd_gpu_s0>; 603}; 604 605&pinctrl { 606 hym8563 { 607 rtc_int: rtc-int { 608 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 609 }; 610 }; 611 612 leds { 613 led_pins: led-pins { 614 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, 615 <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 616 }; 617 }; 618 619 pcie { 620 pcie20x1_2_perstn: pcie20x1-2-perstn { 621 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 622 }; 623 624 pcie30x1_0_perstn_m1_l: pcie30x1-0-perstn-m1-l { 625 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 626 }; 627 628 pcie30x1_1_perstn: pcie30x1-1-perstn { 629 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 630 }; 631 632 pcie30x2_perstn_m1_l: pcie30x2-perstn-m1-l { 633 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 634 }; 635 636 pcie30x4_perstn_m1_l: pcie30x4-perstn-m1-l { 637 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 638 }; 639 640 ekey_en: ekey-en { 641 rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>; 642 }; 643 644 pcie30x4_pwren_h: pcie30x4-pwren-h { 645 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; 646 }; 647 }; 648 649 sound { 650 hp_detect: hp-detect { 651 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; 652 }; 653 }; 654 655 usb { 656 usb_host_pwren_h: usb-host-pwren-h { 657 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 658 }; 659 660 vcc5v0_otg_en: vcc5v0-otg-en { 661 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 662 }; 663 664 gl3523_reset: rl3523-reset { 665 rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 666 }; 667 }; 668 669 usb-typec { 670 usbc0_int: usbc0-int { 671 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 672 }; 673 674 vbus5v0_typec_en: vbus5v0-typec-en { 675 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 676 }; 677 }; 678 679 hdmirx { 680 hdmirx_det: hdmirx-det { 681 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 682 }; 683 }; 684 685 sdio-pwrseq { 686 wifi_enable_h: wifi-enable-h { 687 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 688 }; 689 }; 690 691 wireless-wlan { 692 wifi_host_wake_irq: wifi-host-wake-irq { 693 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 694 }; 695 }; 696 697 bt { 698 bt_enable_h: bt-enable-h { 699 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 700 }; 701 702 bt_host_wake_l: bt-host-wake-l { 703 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 704 }; 705 706 bt_wake_l: bt-wake-l { 707 rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 708 }; 709 }; 710 711 dp { 712 dp1_hpd: dp1-hpd { 713 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 714 }; 715 }; 716}; 717 718&pwm14 { 719 pinctrl-names = "default"; 720 pinctrl-0 = <&pwm14m1_pins>; 721 status = "okay"; 722}; 723 724&saradc { 725 vref-supply = <&avcc_1v8_s0>; 726 status = "okay"; 727}; 728 729&sdhci { 730 bus-width = <8>; 731 max-frequency = <150000000>; 732 mmc-hs400-1_8v; 733 mmc-hs400-enhanced-strobe; 734 no-sdio; 735 no-sd; 736 non-removable; 737 status = "okay"; 738}; 739 740&sdmmc { 741 bus-width = <4>; 742 cap-mmc-highspeed; 743 cap-sd-highspeed; 744 disable-wp; 745 max-frequency = <200000000>; 746 no-sdio; 747 no-mmc; 748 pinctrl-names = "default"; 749 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; 750 sd-uhs-sdr104; 751 vmmc-supply = <&vcc_3v3_s3>; 752 vqmmc-supply = <&vccio_sd_s0>; 753 status = "okay"; 754}; 755 756/* M.2 E-KEY */ 757&sdio { 758 broken-cd; 759 bus-width = <4>; 760 cap-sdio-irq; 761 keep-power-in-suspend; 762 max-frequency = <150000000>; 763 mmc-pwrseq = <&sdio_pwrseq>; 764 no-sd; 765 no-mmc; 766 non-removable; 767 pinctrl-names = "default"; 768 pinctrl-0 = <&sdiom0_pins>; 769 sd-uhs-sdr104; 770 vmmc-supply = <&vcc3v3_ekey>; 771 status = "okay"; 772}; 773 774&sfc { 775 pinctrl-names = "default"; 776 pinctrl-0 = <&fspim2_pins>; 777 status = "okay"; 778 779 spi_flash: flash@0 { 780 compatible = "jedec,spi-nor"; 781 reg = <0x0>; 782 spi-max-frequency = <50000000>; 783 spi-rx-bus-width = <4>; 784 spi-tx-bus-width = <1>; 785 }; 786}; 787 788&spi2 { 789 status = "okay"; 790 assigned-clocks = <&cru CLK_SPI2>; 791 assigned-clock-rates = <200000000>; 792 num-cs = <1>; 793 pinctrl-names = "default"; 794 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 795 796 pmic@0 { 797 compatible = "rockchip,rk806"; 798 reg = <0x0>; 799 gpio-controller; 800 #gpio-cells = <2>; 801 interrupt-parent = <&gpio0>; 802 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 803 pinctrl-names = "default"; 804 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 805 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 806 spi-max-frequency = <1000000>; 807 system-power-controller; 808 809 vcc1-supply = <&vcc5v0_sys>; 810 vcc2-supply = <&vcc5v0_sys>; 811 vcc3-supply = <&vcc5v0_sys>; 812 vcc4-supply = <&vcc5v0_sys>; 813 vcc5-supply = <&vcc5v0_sys>; 814 vcc6-supply = <&vcc5v0_sys>; 815 vcc7-supply = <&vcc5v0_sys>; 816 vcc8-supply = <&vcc5v0_sys>; 817 vcc9-supply = <&vcc5v0_sys>; 818 vcc10-supply = <&vcc5v0_sys>; 819 vcc11-supply = <&vcc_2v0_pldo_s3>; 820 vcc12-supply = <&vcc5v0_sys>; 821 vcc13-supply = <&vcc_1v1_nldo_s3>; 822 vcc14-supply = <&vcc_1v1_nldo_s3>; 823 vcca-supply = <&vcc5v0_sys>; 824 825 rk806_dvs1_null: dvs1-null-pins { 826 pins = "gpio_pwrctrl1"; 827 function = "pin_fun0"; 828 }; 829 830 rk806_dvs2_null: dvs2-null-pins { 831 pins = "gpio_pwrctrl2"; 832 function = "pin_fun0"; 833 }; 834 835 rk806_dvs3_null: dvs3-null-pins { 836 pins = "gpio_pwrctrl3"; 837 function = "pin_fun0"; 838 }; 839 840 regulators { 841 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 842 regulator-boot-on; 843 regulator-min-microvolt = <550000>; 844 regulator-max-microvolt = <950000>; 845 regulator-ramp-delay = <12500>; 846 regulator-name = "vdd_gpu_s0"; 847 regulator-enable-ramp-delay = <400>; 848 849 regulator-state-mem { 850 regulator-off-in-suspend; 851 }; 852 }; 853 854 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 855 regulator-always-on; 856 regulator-boot-on; 857 regulator-min-microvolt = <550000>; 858 regulator-max-microvolt = <950000>; 859 regulator-ramp-delay = <12500>; 860 regulator-name = "vdd_cpu_lit_s0"; 861 862 regulator-state-mem { 863 regulator-off-in-suspend; 864 }; 865 }; 866 867 vdd_log_s0: dcdc-reg3 { 868 regulator-always-on; 869 regulator-boot-on; 870 regulator-min-microvolt = <675000>; 871 regulator-max-microvolt = <750000>; 872 regulator-ramp-delay = <12500>; 873 regulator-name = "vdd_log_s0"; 874 875 regulator-state-mem { 876 regulator-on-in-suspend; 877 regulator-suspend-microvolt = <750000>; 878 }; 879 }; 880 881 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 882 regulator-always-on; 883 regulator-boot-on; 884 regulator-min-microvolt = <550000>; 885 regulator-max-microvolt = <950000>; 886 regulator-ramp-delay = <12500>; 887 regulator-name = "vdd_vdenc_s0"; 888 889 regulator-state-mem { 890 regulator-off-in-suspend; 891 }; 892 }; 893 894 vdd_ddr_s0: dcdc-reg5 { 895 regulator-always-on; 896 regulator-boot-on; 897 regulator-min-microvolt = <675000>; 898 regulator-max-microvolt = <900000>; 899 regulator-ramp-delay = <12500>; 900 regulator-name = "vdd_ddr_s0"; 901 902 regulator-state-mem { 903 regulator-off-in-suspend; 904 regulator-suspend-microvolt = <850000>; 905 }; 906 }; 907 908 vdd2_ddr_s3: dcdc-reg6 { 909 regulator-always-on; 910 regulator-boot-on; 911 regulator-name = "vdd2_ddr_s3"; 912 913 regulator-state-mem { 914 regulator-on-in-suspend; 915 }; 916 }; 917 918 vcc_2v0_pldo_s3: dcdc-reg7 { 919 regulator-always-on; 920 regulator-boot-on; 921 regulator-min-microvolt = <2000000>; 922 regulator-max-microvolt = <2000000>; 923 regulator-ramp-delay = <12500>; 924 regulator-name = "vdd_2v0_pldo_s3"; 925 926 regulator-state-mem { 927 regulator-on-in-suspend; 928 regulator-suspend-microvolt = <2000000>; 929 }; 930 }; 931 932 vcc_3v3_s3: dcdc-reg8 { 933 regulator-always-on; 934 regulator-boot-on; 935 regulator-min-microvolt = <3300000>; 936 regulator-max-microvolt = <3300000>; 937 regulator-name = "vcc_3v3_s3"; 938 939 regulator-state-mem { 940 regulator-on-in-suspend; 941 regulator-suspend-microvolt = <3300000>; 942 }; 943 }; 944 945 vddq_ddr_s0: dcdc-reg9 { 946 regulator-always-on; 947 regulator-boot-on; 948 regulator-name = "vddq_ddr_s0"; 949 950 regulator-state-mem { 951 regulator-off-in-suspend; 952 }; 953 }; 954 955 vcc_1v8_s3: dcdc-reg10 { 956 regulator-always-on; 957 regulator-boot-on; 958 regulator-min-microvolt = <1800000>; 959 regulator-max-microvolt = <1800000>; 960 regulator-name = "vcc_1v8_s3"; 961 962 regulator-state-mem { 963 regulator-on-in-suspend; 964 regulator-suspend-microvolt = <1800000>; 965 }; 966 }; 967 968 avcc_1v8_s0: pldo-reg1 { 969 regulator-always-on; 970 regulator-boot-on; 971 regulator-min-microvolt = <1800000>; 972 regulator-max-microvolt = <1800000>; 973 regulator-name = "avcc_1v8_s0"; 974 975 regulator-state-mem { 976 regulator-on-in-suspend; 977 regulator-suspend-microvolt = <1800000>; 978 }; 979 }; 980 981 vcc_1v8_s0: pldo-reg2 { 982 regulator-always-on; 983 regulator-boot-on; 984 regulator-min-microvolt = <1800000>; 985 regulator-max-microvolt = <1800000>; 986 regulator-name = "vcc_1v8_s0"; 987 988 regulator-state-mem { 989 regulator-on-in-suspend; 990 regulator-suspend-microvolt = <1800000>; 991 }; 992 }; 993 994 avdd_1v2_s0: pldo-reg3 { 995 regulator-always-on; 996 regulator-boot-on; 997 regulator-min-microvolt = <1200000>; 998 regulator-max-microvolt = <1200000>; 999 regulator-name = "avdd_1v2_s0"; 1000 1001 regulator-state-mem { 1002 regulator-off-in-suspend; 1003 }; 1004 }; 1005 1006 vcc_3v3_s0: pldo-reg4 { 1007 regulator-always-on; 1008 regulator-boot-on; 1009 regulator-min-microvolt = <3300000>; 1010 regulator-max-microvolt = <3300000>; 1011 regulator-ramp-delay = <12500>; 1012 regulator-name = "vcc_3v3_s0"; 1013 1014 regulator-state-mem { 1015 regulator-on-in-suspend; 1016 regulator-suspend-microvolt = <3300000>; 1017 }; 1018 }; 1019 1020 vccio_sd_s0: pldo-reg5 { 1021 regulator-always-on; 1022 regulator-boot-on; 1023 regulator-min-microvolt = <1800000>; 1024 regulator-max-microvolt = <3300000>; 1025 regulator-ramp-delay = <12500>; 1026 regulator-name = "vccio_sd_s0"; 1027 1028 regulator-state-mem { 1029 regulator-off-in-suspend; 1030 }; 1031 }; 1032 1033 pldo6_s3: pldo-reg6 { 1034 regulator-always-on; 1035 regulator-boot-on; 1036 regulator-min-microvolt = <1800000>; 1037 regulator-max-microvolt = <1800000>; 1038 regulator-name = "pldo6_s3"; 1039 1040 regulator-state-mem { 1041 regulator-on-in-suspend; 1042 regulator-suspend-microvolt = <1800000>; 1043 }; 1044 }; 1045 1046 vdd_0v75_s3: nldo-reg1 { 1047 regulator-always-on; 1048 regulator-boot-on; 1049 regulator-min-microvolt = <750000>; 1050 regulator-max-microvolt = <750000>; 1051 regulator-name = "vdd_0v75_s3"; 1052 1053 regulator-state-mem { 1054 regulator-on-in-suspend; 1055 regulator-suspend-microvolt = <750000>; 1056 }; 1057 }; 1058 1059 vdd_ddr_pll_s0: nldo-reg2 { 1060 regulator-always-on; 1061 regulator-boot-on; 1062 regulator-min-microvolt = <850000>; 1063 regulator-max-microvolt = <850000>; 1064 regulator-name = "vdd_ddr_pll_s0"; 1065 1066 regulator-state-mem { 1067 regulator-on-in-suspend; 1068 regulator-suspend-microvolt = <850000>; 1069 }; 1070 }; 1071 1072 avdd_0v75_s0: nldo-reg3 { 1073 regulator-always-on; 1074 regulator-boot-on; 1075 regulator-min-microvolt = <750000>; 1076 regulator-max-microvolt = <750000>; 1077 regulator-name = "avdd_0v75_s0"; 1078 1079 regulator-state-mem { 1080 regulator-off-in-suspend; 1081 }; 1082 }; 1083 1084 vdd_0v85_s0: nldo-reg4 { 1085 regulator-always-on; 1086 regulator-boot-on; 1087 regulator-min-microvolt = <850000>; 1088 regulator-max-microvolt = <850000>; 1089 regulator-name = "vdd_0v85_s0"; 1090 1091 regulator-state-mem { 1092 regulator-on-in-suspend; 1093 regulator-suspend-microvolt = <837500>; 1094 }; 1095 }; 1096 1097 vdd_0v75_s0: nldo-reg5 { 1098 regulator-always-on; 1099 regulator-boot-on; 1100 regulator-min-microvolt = <750000>; 1101 regulator-max-microvolt = <750000>; 1102 regulator-name = "vdd_0v75_s0"; 1103 1104 regulator-state-mem { 1105 regulator-on-in-suspend; 1106 regulator-suspend-microvolt = <750000>; 1107 }; 1108 }; 1109 }; 1110 }; 1111}; 1112 1113&tsadc { 1114 status = "okay"; 1115}; 1116 1117&uart2 { 1118 pinctrl-0 = <&uart2m0_xfer>; 1119 status = "okay"; 1120}; 1121 1122/* Connected to M.2 E-key */ 1123&uart6 { 1124 pinctrl-names = "default"; 1125 pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; 1126 status = "okay"; 1127}; 1128 1129&u2phy0 { 1130 status = "okay"; 1131}; 1132 1133&u2phy0_otg { 1134 status = "okay"; 1135}; 1136 1137&u2phy1 { 1138 status = "okay"; 1139}; 1140 1141&u2phy1_otg { 1142 /* connected to USB3 hub, which is powered by vcc5v0_usb12 */ 1143 phy-supply = <&vcc5v0_usb12>; 1144 status = "okay"; 1145}; 1146 1147&u2phy2 { 1148 status = "okay"; 1149}; 1150 1151&u2phy2_host { 1152 /* connected to USB2 hub, which is powered by vcc5v0_usb20 */ 1153 phy-supply = <&vcc5v0_usb20>; 1154 status = "okay"; 1155}; 1156 1157&u2phy3 { 1158 status = "okay"; 1159}; 1160 1161&u2phy3_host { 1162 phy-supply = <&vcc5v0_usb20>; 1163 status = "okay"; 1164}; 1165 1166&usb_host0_ehci { 1167 status = "okay"; 1168}; 1169 1170&usb_host0_ohci { 1171 status = "okay"; 1172}; 1173 1174&usb_host1_ehci { 1175 status = "okay"; 1176}; 1177 1178&usb_host1_ohci { 1179 status = "okay"; 1180}; 1181 1182&usb_host0_xhci { 1183 usb-role-switch; 1184 status = "okay"; 1185 1186 port { 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 1190 dwc3_0_role_switch: endpoint@0 { 1191 reg = <0>; 1192 remote-endpoint = <&usbc0_role_sw>; 1193 }; 1194 }; 1195}; 1196 1197&usb_host1_xhci { 1198 dr_mode = "host"; 1199 #address-cells = <1>; 1200 #size-cells = <0>; 1201 status = "okay"; 1202 1203 /* 2.0 hub on port 1 */ 1204 hub_2_0: hub@1 { 1205 compatible = "usb5e3,610"; 1206 reg = <1>; 1207 peer-hub = <&hub_3_0>; 1208 vdd-supply = <&vcc_3v3_s3>; 1209 }; 1210 1211 /* 3.0 hub on port 4 */ 1212 hub_3_0: hub@2 { 1213 compatible = "usb5e3,620"; 1214 reg = <2>; 1215 peer-hub = <&hub_2_0>; 1216 pinctrl-names = "default"; 1217 pinctrl-0 = <&gl3523_reset>; 1218 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 1219 vdd-supply = <&vcc_3v3_s3>; 1220 }; 1221}; 1222 1223&usbdp_phy0 { 1224 mode-switch; 1225 orientation-switch; 1226 sbu1-dc-gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>; 1227 sbu2-dc-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; 1228 status = "okay"; 1229 1230 port { 1231 #address-cells = <1>; 1232 #size-cells = <0>; 1233 usbdp_phy0_orientation_switch: endpoint@0 { 1234 reg = <0>; 1235 remote-endpoint = <&usbc0_orien_sw>; 1236 }; 1237 1238 usbdp_phy0_dp_altmode_mux: endpoint@1 { 1239 reg = <1>; 1240 remote-endpoint = <&dp_altmode_mux>; 1241 }; 1242 }; 1243}; 1244 1245&usbdp_phy1 { 1246 rockchip,dp-lane-mux = <2 3>; 1247 status = "okay"; 1248}; 1249 1250&vop { 1251 status = "okay"; 1252}; 1253 1254&vop_mmu { 1255 status = "okay"; 1256}; 1257 1258&vp1 { 1259 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 1260 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 1261 remote-endpoint = <&hdmi1_in_vp1>; 1262 }; 1263}; 1264