1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Ondřej Jirman <megi@xff.cz> 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include <dt-bindings/soc/rockchip,vop2.h> 11#include <dt-bindings/usb/pd.h> 12#include "rk3588-orangepi-5.dtsi" 13 14/ { 15 model = "Xunlong Orange Pi 5 Plus"; 16 compatible = "xunlong,orangepi-5-plus", "rockchip,rk3588"; 17 18 hdmi0-con { 19 compatible = "hdmi-connector"; 20 type = "a"; 21 22 port { 23 hdmi0_con_in: endpoint { 24 remote-endpoint = <&hdmi0_out_con>; 25 }; 26 }; 27 }; 28 29 hdmi1-con { 30 compatible = "hdmi-connector"; 31 type = "a"; 32 33 port { 34 hdmi1_con_in: endpoint { 35 remote-endpoint = <&hdmi1_out_con>; 36 }; 37 }; 38 }; 39 40 ir-receiver { 41 compatible = "gpio-ir-receiver"; 42 gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&ir_receiver_pin>; 45 }; 46 47 rfkill { 48 compatible = "rfkill-gpio"; 49 label = "rfkill-pcie-wlan"; 50 radio-type = "wlan"; 51 shutdown-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 52 }; 53 54 vbus5v0_typec: regulator-vbus-typec { 55 compatible = "regulator-fixed"; 56 enable-active-high; 57 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&typec5v_pwren>; 60 regulator-name = "vbus5v0_typec"; 61 regulator-min-microvolt = <5000000>; 62 regulator-max-microvolt = <5000000>; 63 vin-supply = <&vcc5v0_sys>; 64 }; 65}; 66 67&speaker_amp { 68 enable-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; 69 status = "okay"; 70}; 71 72&headphone_amp { 73 enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; 74}; 75 76&analog_sound { 77 pinctrl-names = "default"; 78 pinctrl-0 = <&hp_detect>; 79 simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; 80 simple-audio-card,hp-det-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; 81 simple-audio-card,widgets = 82 "Microphone", "Onboard Microphone", 83 "Microphone", "Microphone Jack", 84 "Speaker", "Speaker", 85 "Headphone", "Headphones"; 86 87 simple-audio-card,routing = 88 "Headphones", "LOUT1", 89 "Headphones", "ROUT1", 90 "Speaker", "LOUT2", 91 "Speaker", "ROUT2", 92 93 "Headphones", "Headphones Amp OUTL", 94 "Headphones", "Headphones Amp OUTR", 95 "Headphones Amp INL", "LOUT1", 96 "Headphones Amp INR", "ROUT1", 97 98 "Speaker", "Speaker Amp OUTL", 99 "Speaker", "Speaker Amp OUTR", 100 "Speaker Amp INL", "LOUT2", 101 "Speaker Amp INR", "ROUT2", 102 103 /* single ended signal to LINPUT1 */ 104 "LINPUT1", "Microphone Jack", 105 "RINPUT1", "Microphone Jack", 106 /* differential signal */ 107 "LINPUT2", "Onboard Microphone", 108 "RINPUT2", "Onboard Microphone"; 109}; 110 111&combphy0_ps { 112 status = "okay"; 113}; 114 115&combphy1_ps { 116 status = "okay"; 117}; 118 119&fan { 120 pwms = <&pwm3 0 50000 0>; 121}; 122 123&hdmi0 { 124 status = "okay"; 125}; 126 127&hdmi0_sound { 128 status = "okay"; 129}; 130 131&hdmi0_in { 132 hdmi0_in_vp0: endpoint { 133 remote-endpoint = <&vp0_out_hdmi0>; 134 }; 135}; 136 137&hdmi0_out { 138 hdmi0_out_con: endpoint { 139 remote-endpoint = <&hdmi0_con_in>; 140 }; 141}; 142 143&hdmi1 { 144 status = "okay"; 145}; 146 147&hdmi1_in { 148 hdmi1_in_vp1: endpoint { 149 remote-endpoint = <&vp1_out_hdmi1>; 150 }; 151}; 152 153&hdmi1_out { 154 hdmi1_out_con: endpoint { 155 remote-endpoint = <&hdmi1_con_in>; 156 }; 157}; 158 159&hdmi1_sound { 160 status = "okay"; 161}; 162 163&hdptxphy0 { 164 status = "okay"; 165}; 166 167&hdptxphy1 { 168 status = "okay"; 169}; 170 171&hym8563 { 172 interrupt-parent = <&gpio0>; 173 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&hym8563_int>; 176}; 177 178&i2c6 { 179 usbc0: usb-typec@22 { 180 compatible = "fcs,fusb302"; 181 reg = <0x22>; 182 interrupt-parent = <&gpio0>; 183 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 184 pinctrl-names = "default"; 185 pinctrl-0 = <&usbc0_int>; 186 vbus-supply = <&vbus5v0_typec>; 187 status = "okay"; 188 189 usb_con: connector { 190 compatible = "usb-c-connector"; 191 data-role = "dual"; 192 label = "USB-C"; 193 power-role = "dual"; 194 op-sink-microwatt = <10>; 195 source-pdos = <PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>; 196 sink-pdos = <PDO_FIXED(5000, 10, PDO_FIXED_USB_COMM)>; 197 try-power-role = "source"; 198 199 ports { 200 #address-cells = <1>; 201 #size-cells = <0>; 202 203 port@0 { 204 reg = <0>; 205 206 usbc0_hs: endpoint { 207 remote-endpoint = <&usb_host0_xhci_drd_sw>; 208 }; 209 }; 210 211 port@1 { 212 reg = <1>; 213 214 usbc0_ss: endpoint { 215 remote-endpoint = <&usbdp_phy0_typec_ss>; 216 }; 217 }; 218 219 port@2 { 220 reg = <2>; 221 222 usbc0_sbu: endpoint { 223 remote-endpoint = <&usbdp_phy0_typec_sbu>; 224 }; 225 }; 226 }; 227 }; 228 }; 229}; 230 231&i2s5_8ch { 232 status = "okay"; 233}; 234 235&i2s6_8ch { 236 status = "okay"; 237}; 238 239&led_blue_gpio { 240 gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; 241 status = "okay"; 242}; 243 244&led_green_pwm { 245 pwms = <&pwm2 0 25000 0>; 246}; 247 248/* phy1 - M.KEY socket */ 249&pcie2x1l0 { 250 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 251 vpcie3v3-supply = <&vcc3v3_wf>; 252 status = "okay"; 253}; 254 255/* phy2 - right ethernet port */ 256&pcie2x1l1 { 257 reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; 258 vpcie3v3-supply = <&vcc3v3_pcie_eth>; 259 status = "okay"; 260}; 261 262/* phy0 - left ethernet port */ 263&pcie2x1l2 { 264 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 265 vpcie3v3-supply = <&vcc3v3_pcie_eth>; 266 status = "okay"; 267}; 268 269&pinctrl { 270 hym8563 { 271 hym8563_int: hym8563-int { 272 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 273 }; 274 }; 275 276 leds { 277 blue_led_pin: blue-led { 278 rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 279 }; 280 }; 281 282 ir-receiver { 283 ir_receiver_pin: ir-receiver-pin { 284 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 285 }; 286 }; 287 288 sound { 289 hp_detect: hp-detect { 290 rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 291 }; 292 }; 293 294 usb { 295 vcc5v0_usb20_en: vcc5v0-usb20-en { 296 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 297 }; 298 }; 299 300 usb-typec { 301 usbc0_int: usbc0-int { 302 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 303 }; 304 305 typec5v_pwren: typec5v-pwren { 306 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 307 }; 308 }; 309}; 310 311&pwm2 { 312 pinctrl-0 = <&pwm2m1_pins>; 313 pinctrl-names = "default"; 314 status = "okay"; 315}; 316 317&pwm3 { 318 pinctrl-0 = <&pwm3m1_pins>; 319 status = "okay"; 320}; 321 322&recovery_button { 323 status = "okay"; 324}; 325 326&sfc { 327 pinctrl-names = "default"; 328 pinctrl-0 = <&fspim1_pins>; 329}; 330 331&u2phy1_otg { 332 phy-supply = <&vcc5v0_sys>; 333}; 334 335&uart9 { 336 pinctrl-0 = <&uart9m0_xfer>; 337 status = "okay"; 338}; 339 340&usbdp_phy0 { 341 mode-switch; 342 orientation-switch; 343 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 344 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 345 346 port { 347 #address-cells = <1>; 348 #size-cells = <0>; 349 350 usbdp_phy0_typec_ss: endpoint@0 { 351 reg = <0>; 352 remote-endpoint = <&usbc0_ss>; 353 }; 354 355 usbdp_phy0_typec_sbu: endpoint@1 { 356 reg = <1>; 357 remote-endpoint = <&usbc0_sbu>; 358 }; 359 }; 360}; 361 362&usb_host0_xhci { 363 usb-role-switch; 364 365 port { 366 usb_host0_xhci_drd_sw: endpoint { 367 remote-endpoint = <&usbc0_hs>; 368 }; 369 }; 370}; 371 372&vcc3v3_pcie_eth { 373 gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; 374}; 375 376&vcc3v3_wf { 377 status = "okay"; 378}; 379 380&vcc5v0_usb20 { 381 gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 382 pinctrl-names = "default"; 383 pinctrl-0 = <&vcc5v0_usb20_en>; 384}; 385 386&vp0 { 387 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 388 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 389 remote-endpoint = <&hdmi0_in_vp0>; 390 }; 391}; 392 393&vp1 { 394 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 395 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 396 remote-endpoint = <&hdmi1_in_vp1>; 397 }; 398}; 399