1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4 */
5
6#include "amlogic-a4-common.dtsi"
7#include <dt-bindings/power/amlogic,a4-pwrc.h>
8/ {
9	cpus {
10		#address-cells = <2>;
11		#size-cells = <0>;
12
13		cpu0: cpu@0 {
14			device_type = "cpu";
15			compatible = "arm,cortex-a53";
16			reg = <0x0 0x0>;
17			enable-method = "psci";
18		};
19
20		cpu1: cpu@1 {
21			device_type = "cpu";
22			compatible = "arm,cortex-a53";
23			reg = <0x0 0x1>;
24			enable-method = "psci";
25		};
26
27		cpu2: cpu@2 {
28			device_type = "cpu";
29			compatible = "arm,cortex-a53";
30			reg = <0x0 0x2>;
31			enable-method = "psci";
32		};
33
34		cpu3: cpu@3 {
35			device_type = "cpu";
36			compatible = "arm,cortex-a53";
37			reg = <0x0 0x3>;
38			enable-method = "psci";
39		};
40	};
41
42	sm: secure-monitor {
43		compatible = "amlogic,meson-gxbb-sm";
44
45		pwrc: power-controller {
46			compatible = "amlogic,a4-pwrc";
47			#power-domain-cells = <1>;
48		};
49	};
50};
51
52&apb {
53	gpio_intc: interrupt-controller@4080 {
54		compatible = "amlogic,a4-gpio-intc",
55			     "amlogic,meson-gpio-intc";
56		reg = <0x0 0x4080 0x0 0x20>;
57		interrupt-controller;
58		#interrupt-cells = <2>;
59		amlogic,channel-interrupts =
60			<10 11 12 13 14 15 16 17 18 19 20 21>;
61	};
62
63	gpio_ao_intc: interrupt-controller@8e72c {
64		compatible = "amlogic,a4-gpio-ao-intc",
65			     "amlogic,meson-gpio-intc";
66		reg = <0x0 0x8e72c 0x0 0x0c>;
67		interrupt-controller;
68		#interrupt-cells = <2>;
69		amlogic,channel-interrupts = <140 141>;
70	};
71};
72